18731 lines
767 KiB
Plaintext
18731 lines
767 KiB
Plaintext
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/Users/rq/pico/car/cmake-build-debug/frtos/car/rtos_car.elf: file format elf32-littlearm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 .boot2 00000100 10000000 10000000 00001000 2**0
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 .text 000090f8 10000100 10000100 00001100 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .rodata 0000213c 100091f8 100091f8 0000a1f8 2**3
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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3 .binary_info 00000020 1000b334 1000b334 0000c334 2**2
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CONTENTS, ALLOC, LOAD, READONLY, DATA
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4 .ram_vector_table 000000c0 20000000 20000000 0000e000 2**2
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ALLOC
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5 .data 00000b30 200000c0 1000b354 0000d0c0 2**4
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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6 .uninitialized_data 00000000 20000bf0 20000bf0 0000dbf0 2**0
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CONTENTS
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7 .scratch_x 00000000 20040000 20040000 0000dbf0 2**0
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CONTENTS
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8 .scratch_y 00000000 20041000 20041000 0000dbf0 2**0
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CONTENTS
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9 .bss 00021158 20000bf0 20000bf0 0000e000 2**3
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ALLOC
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10 .heap 00000800 20021d48 20021d48 0000dbf0 2**2
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CONTENTS, READONLY
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11 .stack_dummy 00000800 20041000 20041000 0000e400 2**5
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CONTENTS, READONLY
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12 .ARM.attributes 00000028 00000000 00000000 0000ec00 2**0
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CONTENTS, READONLY
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13 .comment 00000045 00000000 00000000 0000ec28 2**0
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CONTENTS, READONLY
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14 .debug_info 0002f462 00000000 00000000 0000ec6d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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15 .debug_abbrev 00008a14 00000000 00000000 0003e0cf 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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16 .debug_loclists 000137e5 00000000 00000000 00046ae3 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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17 .debug_aranges 00001c50 00000000 00000000 0005a2c8 2**3
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CONTENTS, READONLY, DEBUGGING, OCTETS
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18 .debug_rnglists 00001caf 00000000 00000000 0005bf18 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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19 .debug_line 0001d776 00000000 00000000 0005dbc7 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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20 .debug_str 00009957 00000000 00000000 0007b33d 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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21 .debug_frame 00004348 00000000 00000000 00084c94 2**2
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CONTENTS, READONLY, DEBUGGING, OCTETS
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22 .debug_line_str 000002ec 00000000 00000000 00088fdc 2**0
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CONTENTS, READONLY, DEBUGGING, OCTETS
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/Users/rq/pico/car/cmake-build-debug/frtos/car/rtos_car.elf: file format elf32-littlearm
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Disassembly of section .boot2:
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10000000 <__boot2_start__>:
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10000000: 4b32b500 .word 0x4b32b500
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10000004: 60582021 .word 0x60582021
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10000008: 21026898 .word 0x21026898
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1000000c: 60984388 .word 0x60984388
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10000010: 611860d8 .word 0x611860d8
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10000014: 4b2e6158 .word 0x4b2e6158
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10000018: 60992100 .word 0x60992100
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1000001c: 61592102 .word 0x61592102
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10000020: 22f02101 .word 0x22f02101
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10000024: 492b5099 .word 0x492b5099
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10000028: 21016019 .word 0x21016019
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1000002c: 20356099 .word 0x20356099
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10000030: f844f000 .word 0xf844f000
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10000034: 42902202 .word 0x42902202
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10000038: 2106d014 .word 0x2106d014
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1000003c: f0006619 .word 0xf0006619
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10000040: 6e19f834 .word 0x6e19f834
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10000044: 66192101 .word 0x66192101
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10000048: 66182000 .word 0x66182000
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1000004c: f000661a .word 0xf000661a
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10000050: 6e19f82c .word 0x6e19f82c
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10000054: 6e196e19 .word 0x6e196e19
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10000058: f0002005 .word 0xf0002005
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1000005c: 2101f82f .word 0x2101f82f
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10000060: d1f94208 .word 0xd1f94208
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10000064: 60992100 .word 0x60992100
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10000068: 6019491b .word 0x6019491b
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1000006c: 60592100 .word 0x60592100
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10000070: 481b491a .word 0x481b491a
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10000074: 21016001 .word 0x21016001
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10000078: 21eb6099 .word 0x21eb6099
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1000007c: 21a06619 .word 0x21a06619
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10000080: f0006619 .word 0xf0006619
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10000084: 2100f812 .word 0x2100f812
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10000088: 49166099 .word 0x49166099
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1000008c: 60014814 .word 0x60014814
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10000090: 60992101 .word 0x60992101
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10000094: 2800bc01 .word 0x2800bc01
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10000098: 4700d000 .word 0x4700d000
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1000009c: 49134812 .word 0x49134812
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100000a0: c8036008 .word 0xc8036008
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100000a4: 8808f380 .word 0x8808f380
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100000a8: b5034708 .word 0xb5034708
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100000ac: 20046a99 .word 0x20046a99
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100000b0: d0fb4201 .word 0xd0fb4201
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100000b4: 42012001 .word 0x42012001
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100000b8: bd03d1f8 .word 0xbd03d1f8
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100000bc: 6618b502 .word 0x6618b502
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100000c0: f7ff6618 .word 0xf7ff6618
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100000c4: 6e18fff2 .word 0x6e18fff2
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100000c8: bd026e18 .word 0xbd026e18
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100000cc: 40020000 .word 0x40020000
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100000d0: 18000000 .word 0x18000000
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100000d4: 00070000 .word 0x00070000
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100000d8: 005f0300 .word 0x005f0300
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100000dc: 00002221 .word 0x00002221
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100000e0: 180000f4 .word 0x180000f4
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100000e4: a0002022 .word 0xa0002022
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100000e8: 10000100 .word 0x10000100
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100000ec: e000ed08 .word 0xe000ed08
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...
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100000fc: 7a4eb274 .word 0x7a4eb274
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Disassembly of section .text:
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10000100 <__VECTOR_TABLE>:
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10000100: 20042000 .word 0x20042000
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10000104: 100001f7 .word 0x100001f7
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10000108: 100001c3 .word 0x100001c3
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1000010c: 100001c5 .word 0x100001c5
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10000110: 100001c1 .word 0x100001c1
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10000114: 100001c1 .word 0x100001c1
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10000118: 100001c1 .word 0x100001c1
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1000011c: 100001c1 .word 0x100001c1
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10000120: 100001c1 .word 0x100001c1
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10000124: 100001c1 .word 0x100001c1
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10000128: 100001c1 .word 0x100001c1
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1000012c: 100001c7 .word 0x100001c7
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10000130: 100001c1 .word 0x100001c1
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10000134: 100001c1 .word 0x100001c1
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10000138: 100001c9 .word 0x100001c9
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1000013c: 100001cb .word 0x100001cb
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10000140: 100001cd .word 0x100001cd
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10000144: 100001cd .word 0x100001cd
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10000148: 100001cd .word 0x100001cd
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1000014c: 100001cd .word 0x100001cd
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10000150: 100001cd .word 0x100001cd
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10000154: 100001cd .word 0x100001cd
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10000158: 100001cd .word 0x100001cd
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1000015c: 100001cd .word 0x100001cd
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10000160: 100001cd .word 0x100001cd
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10000164: 100001cd .word 0x100001cd
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10000168: 100001cd .word 0x100001cd
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1000016c: 100001cd .word 0x100001cd
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10000170: 100001cd .word 0x100001cd
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10000174: 100001cd .word 0x100001cd
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10000178: 100001cd .word 0x100001cd
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1000017c: 100001cd .word 0x100001cd
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10000180: 100001cd .word 0x100001cd
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10000184: 100001cd .word 0x100001cd
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10000188: 100001cd .word 0x100001cd
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1000018c: 100001cd .word 0x100001cd
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10000190: 100001cd .word 0x100001cd
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10000194: 100001cd .word 0x100001cd
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10000198: 100001cd .word 0x100001cd
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1000019c: 100001cd .word 0x100001cd
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100001a0: 100001cd .word 0x100001cd
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100001a4: 100001cd .word 0x100001cd
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100001a8: 100001cd .word 0x100001cd
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100001ac: 100001cd .word 0x100001cd
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100001b0: 100001cd .word 0x100001cd
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100001b4: 100001cd .word 0x100001cd
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100001b8: 100001cd .word 0x100001cd
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100001bc: 100001cd .word 0x100001cd
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100001c0 <isr_invalid>:
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100001c0: be00 bkpt 0x0000
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100001c2 <isr_nmi>:
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100001c2: be00 bkpt 0x0000
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100001c4 <isr_hardfault>:
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100001c4: be00 bkpt 0x0000
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100001c6 <isr_svcall>:
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100001c6: be00 bkpt 0x0000
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100001c8 <isr_pendsv>:
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100001c8: be00 bkpt 0x0000
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100001ca <isr_systick>:
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100001ca: be00 bkpt 0x0000
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100001cc <__unhandled_user_irq>:
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100001cc: f3ef 8005 mrs r0, IPSR
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100001d0: 3810 subs r0, #16
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100001d2 <unhandled_user_irq_num_in_r0>:
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100001d2: be00 bkpt 0x0000
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100001d4 <binary_info_header>:
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100001d4: 7188ebf2 .word 0x7188ebf2
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100001d8: 1000b334 .word 0x1000b334
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100001dc: 1000b354 .word 0x1000b354
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100001e0: 10000234 .word 0x10000234
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100001e4: e71aa390 .word 0xe71aa390
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100001e8 <_entry_point>:
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100001e8: 2000 movs r0, #0
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100001ea: 491f ldr r1, [pc, #124] @ (10000268 <hold_non_core0_in_bootrom+0xa>)
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100001ec: 6008 str r0, [r1, #0]
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100001ee: c806 ldmia r0!, {r1, r2}
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100001f0: f381 8808 msr MSP, r1
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100001f4: 4710 bx r2
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100001f6 <_reset_handler>:
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100001f6: 481d ldr r0, [pc, #116] @ (1000026c <hold_non_core0_in_bootrom+0xe>)
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100001f8: 6800 ldr r0, [r0, #0]
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100001fa: 2800 cmp r0, #0
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100001fc: d12f bne.n 1000025e <hold_non_core0_in_bootrom>
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100001fe: a40d add r4, pc, #52 @ (adr r4, 10000234 <data_cpy_table>)
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10000200: cc0e ldmia r4!, {r1, r2, r3}
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10000202: 2900 cmp r1, #0
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10000204: d002 beq.n 1000020c <_reset_handler+0x16>
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10000206: f000 f812 bl 1000022e <data_cpy>
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1000020a: e7f9 b.n 10000200 <_reset_handler+0xa>
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1000020c: 4918 ldr r1, [pc, #96] @ (10000270 <hold_non_core0_in_bootrom+0x12>)
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1000020e: 4a19 ldr r2, [pc, #100] @ (10000274 <hold_non_core0_in_bootrom+0x16>)
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10000210: 2000 movs r0, #0
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10000212: e000 b.n 10000216 <bss_fill_test>
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10000214 <bss_fill_loop>:
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10000214: c101 stmia r1!, {r0}
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10000216 <bss_fill_test>:
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10000216: 4291 cmp r1, r2
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10000218: d1fc bne.n 10000214 <bss_fill_loop>
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1000021a <platform_entry>:
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1000021a: 4917 ldr r1, [pc, #92] @ (10000278 <hold_non_core0_in_bootrom+0x1a>)
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1000021c: 4788 blx r1
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1000021e: 4917 ldr r1, [pc, #92] @ (1000027c <hold_non_core0_in_bootrom+0x1e>)
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10000220: 4788 blx r1
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10000222: 4917 ldr r1, [pc, #92] @ (10000280 <hold_non_core0_in_bootrom+0x22>)
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10000224: 4788 blx r1
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10000226: be00 bkpt 0x0000
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10000228: e7fd b.n 10000226 <platform_entry+0xc>
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1000022a <data_cpy_loop>:
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1000022a: c901 ldmia r1!, {r0}
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1000022c: c201 stmia r2!, {r0}
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1000022e <data_cpy>:
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1000022e: 429a cmp r2, r3
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10000230: d3fb bcc.n 1000022a <data_cpy_loop>
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10000232: 4770 bx lr
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10000234 <data_cpy_table>:
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10000234: 1000b354 .word 0x1000b354
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10000238: 200000c0 .word 0x200000c0
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1000023c: 20000bf0 .word 0x20000bf0
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10000240: 1000be84 .word 0x1000be84
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10000244: 20040000 .word 0x20040000
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10000248: 20040000 .word 0x20040000
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1000024c: 1000be84 .word 0x1000be84
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10000250: 20041000 .word 0x20041000
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10000254: 20041000 .word 0x20041000
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10000258: 00000000 .word 0x00000000
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1000025c: 4770 bx lr
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1000025e <hold_non_core0_in_bootrom>:
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1000025e: 4809 ldr r0, [pc, #36] @ (10000284 <hold_non_core0_in_bootrom+0x26>)
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10000260: f000 fab4 bl 100007cc <rom_func_lookup>
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10000264: 4700 bx r0
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10000266: 0000 .short 0x0000
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10000268: e000ed08 .word 0xe000ed08
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1000026c: d0000000 .word 0xd0000000
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10000270: 20000bf0 .word 0x20000bf0
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10000274: 20021d48 .word 0x20021d48
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10000278: 100024bd .word 0x100024bd
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1000027c: 100005cd .word 0x100005cd
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10000280: 1000247d .word 0x1000247d
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10000284: 00005657 .word 0x00005657
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10000288 <__bi_50>:
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10000288: 50520006 5360b3ab 1000a37c ..RP..`S|...
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10000294 <__bi_38>:
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10000294: 50520006 02031c86 1000a38c ..RP........
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100002a0 <__bi_30>:
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100002a0: 50520006 9da22254 1000a398 ..RPT"......
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100002ac <__bi_22>:
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100002ac: 50520005 68f465de 1000be84 ..RP.e.h....
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100002b8 <_init>:
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100002b8: b5f8 push {r3, r4, r5, r6, r7, lr}
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100002ba: 46c0 nop @ (mov r8, r8)
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100002bc <register_tm_clones>:
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100002bc: 4806 ldr r0, [pc, #24] @ (100002d8 <register_tm_clones+0x1c>)
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100002be: 4907 ldr r1, [pc, #28] @ (100002dc <register_tm_clones+0x20>)
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100002c0: 1a09 subs r1, r1, r0
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100002c2: 108b asrs r3, r1, #2
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100002c4: 0fc9 lsrs r1, r1, #31
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100002c6: 18c9 adds r1, r1, r3
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100002c8: b510 push {r4, lr}
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100002ca: 1049 asrs r1, r1, #1
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100002cc: d003 beq.n 100002d6 <register_tm_clones+0x1a>
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100002ce: 4b04 ldr r3, [pc, #16] @ (100002e0 <register_tm_clones+0x24>)
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100002d0: 2b00 cmp r3, #0
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100002d2: d000 beq.n 100002d6 <register_tm_clones+0x1a>
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100002d4: 4798 blx r3
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100002d6: bd10 pop {r4, pc}
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100002d8: 20000bf0 .word 0x20000bf0
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100002dc: 20000bf0 .word 0x20000bf0
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100002e0: 00000000 .word 0x00000000
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100002e4 <frame_dummy>:
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100002e4: 4b05 ldr r3, [pc, #20] @ (100002fc <frame_dummy+0x18>)
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100002e6: b510 push {r4, lr}
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100002e8: 2b00 cmp r3, #0
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100002ea: d003 beq.n 100002f4 <frame_dummy+0x10>
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100002ec: 4904 ldr r1, [pc, #16] @ (10000300 <frame_dummy+0x1c>)
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100002ee: 4805 ldr r0, [pc, #20] @ (10000304 <frame_dummy+0x20>)
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100002f0: e000 b.n 100002f4 <frame_dummy+0x10>
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100002f2: bf00 nop
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100002f4: f7ff ffe2 bl 100002bc <register_tm_clones>
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100002f8: bd10 pop {r4, pc}
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100002fa: 46c0 nop @ (mov r8, r8)
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100002fc: 00000000 .word 0x00000000
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10000300: 20001708 .word 0x20001708
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10000304: 100091f8 .word 0x100091f8
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10000308 <adc_gpio_init>:
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10000308: b510 push {r4, lr}
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1000030a: 0004 movs r4, r0
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1000030c: 211f movs r1, #31
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1000030e: f000 fb93 bl 10000a38 <gpio_set_function>
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10000312: 2200 movs r2, #0
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10000314: 2100 movs r1, #0
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10000316: 0020 movs r0, r4
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10000318: f000 fba6 bl 10000a68 <gpio_set_pulls>
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1000031c: 2100 movs r1, #0
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1000031e: 0020 movs r0, r4
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10000320: f000 fbbc bl 10000a9c <gpio_set_input_enabled>
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10000324: bd10 pop {r4, pc}
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...
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10000328 <set_wheel_direction>:
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10000328: 23d0 movs r3, #208 @ 0xd0
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1000032a: 061b lsls r3, r3, #24
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1000032c: 691a ldr r2, [r3, #16]
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1000032e: 4902 ldr r1, [pc, #8] @ (10000338 <set_wheel_direction+0x10>)
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10000330: 400a ands r2, r1
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10000332: 61da str r2, [r3, #28]
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10000334: 6158 str r0, [r3, #20]
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10000336: 4770 bx lr
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10000338: 00181800 .word 0x00181800
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1000033c <get_wheel_slot_count>:
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1000033c: b570 push {r4, r5, r6, lr}
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1000033e: 0300 lsls r0, r0, #12
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10000340: 4b21 ldr r3, [pc, #132] @ (100003c8 <get_wheel_slot_count+0x8c>)
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10000342: 681b ldr r3, [r3, #0]
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10000344: 4058 eors r0, r3
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10000346: 23e0 movs r3, #224 @ 0xe0
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10000348: 01db lsls r3, r3, #7
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1000034a: 4018 ands r0, r3
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1000034c: 4b1f ldr r3, [pc, #124] @ (100003cc <get_wheel_slot_count+0x90>)
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1000034e: 6018 str r0, [r3, #0]
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10000350: f007 ff96 bl 10008280 <xTaskGetTickCount>
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10000354: 23fa movs r3, #250 @ 0xfa
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10000356: 009b lsls r3, r3, #2
|
|
10000358: 18c4 adds r4, r0, r3
|
|
1000035a: 2500 movs r5, #0
|
|
1000035c: e011 b.n 10000382 <get_wheel_slot_count+0x46>
|
|
1000035e: 4b1c ldr r3, [pc, #112] @ (100003d0 <get_wheel_slot_count+0x94>)
|
|
10000360: 2204 movs r2, #4
|
|
10000362: 601a str r2, [r3, #0]
|
|
10000364: 4b18 ldr r3, [pc, #96] @ (100003c8 <get_wheel_slot_count+0x8c>)
|
|
10000366: 681b ldr r3, [r3, #0]
|
|
10000368: 05db lsls r3, r3, #23
|
|
1000036a: d5fb bpl.n 10000364 <get_wheel_slot_count+0x28>
|
|
1000036c: 4b16 ldr r3, [pc, #88] @ (100003c8 <get_wheel_slot_count+0x8c>)
|
|
1000036e: 685b ldr r3, [r3, #4]
|
|
10000370: b29b uxth r3, r3
|
|
10000372: 4a18 ldr r2, [pc, #96] @ (100003d4 <get_wheel_slot_count+0x98>)
|
|
10000374: 4293 cmp r3, r2
|
|
10000376: d80c bhi.n 10000392 <get_wheel_slot_count+0x56>
|
|
10000378: 3501 adds r5, #1
|
|
1000037a: b2ed uxtb r5, r5
|
|
1000037c: 4b16 ldr r3, [pc, #88] @ (100003d8 <get_wheel_slot_count+0x9c>)
|
|
1000037e: 2200 movs r2, #0
|
|
10000380: 701a strb r2, [r3, #0]
|
|
10000382: f007 ff7d bl 10008280 <xTaskGetTickCount>
|
|
10000386: 42a0 cmp r0, r4
|
|
10000388: d218 bcs.n 100003bc <get_wheel_slot_count+0x80>
|
|
1000038a: 4b13 ldr r3, [pc, #76] @ (100003d8 <get_wheel_slot_count+0x9c>)
|
|
1000038c: 781b ldrb r3, [r3, #0]
|
|
1000038e: 2b00 cmp r3, #0
|
|
10000390: d1e5 bne.n 1000035e <get_wheel_slot_count+0x22>
|
|
10000392: 4b11 ldr r3, [pc, #68] @ (100003d8 <get_wheel_slot_count+0x9c>)
|
|
10000394: 781b ldrb r3, [r3, #0]
|
|
10000396: 2b00 cmp r3, #0
|
|
10000398: d1f3 bne.n 10000382 <get_wheel_slot_count+0x46>
|
|
1000039a: 4b0d ldr r3, [pc, #52] @ (100003d0 <get_wheel_slot_count+0x94>)
|
|
1000039c: 2204 movs r2, #4
|
|
1000039e: 601a str r2, [r3, #0]
|
|
100003a0: 4b09 ldr r3, [pc, #36] @ (100003c8 <get_wheel_slot_count+0x8c>)
|
|
100003a2: 681b ldr r3, [r3, #0]
|
|
100003a4: 05db lsls r3, r3, #23
|
|
100003a6: d5fb bpl.n 100003a0 <get_wheel_slot_count+0x64>
|
|
100003a8: 4b07 ldr r3, [pc, #28] @ (100003c8 <get_wheel_slot_count+0x8c>)
|
|
100003aa: 685b ldr r3, [r3, #4]
|
|
100003ac: b29b uxth r3, r3
|
|
100003ae: 4a09 ldr r2, [pc, #36] @ (100003d4 <get_wheel_slot_count+0x98>)
|
|
100003b0: 4293 cmp r3, r2
|
|
100003b2: d9e6 bls.n 10000382 <get_wheel_slot_count+0x46>
|
|
100003b4: 4b08 ldr r3, [pc, #32] @ (100003d8 <get_wheel_slot_count+0x9c>)
|
|
100003b6: 2201 movs r2, #1
|
|
100003b8: 701a strb r2, [r3, #0]
|
|
100003ba: e7e2 b.n 10000382 <get_wheel_slot_count+0x46>
|
|
100003bc: 4b06 ldr r3, [pc, #24] @ (100003d8 <get_wheel_slot_count+0x9c>)
|
|
100003be: 2200 movs r2, #0
|
|
100003c0: 701a strb r2, [r3, #0]
|
|
100003c2: 0028 movs r0, r5
|
|
100003c4: bd70 pop {r4, r5, r6, pc}
|
|
100003c6: 46c0 nop @ (mov r8, r8)
|
|
100003c8: 4004c000 .word 0x4004c000
|
|
100003cc: 4004d000 .word 0x4004d000
|
|
100003d0: 4004e000 .word 0x4004e000
|
|
100003d4: 00000dab .word 0x00000dab
|
|
100003d8: 20021d3e .word 0x20021d3e
|
|
|
|
100003dc <monitor_left_wheel_speed_task>:
|
|
100003dc: b510 push {r4, lr}
|
|
100003de: 2101 movs r1, #1
|
|
100003e0: 4c0b ldr r4, [pc, #44] @ (10000410 <monitor_left_wheel_speed_task+0x34>)
|
|
100003e2: 6820 ldr r0, [r4, #0]
|
|
100003e4: 4249 negs r1, r1
|
|
100003e6: f007 fc25 bl 10007c34 <xQueueSemaphoreTake>
|
|
100003ea: 2000 movs r0, #0
|
|
100003ec: f7ff ffa6 bl 1000033c <get_wheel_slot_count>
|
|
100003f0: 0001 movs r1, r0
|
|
100003f2: 4b08 ldr r3, [pc, #32] @ (10000414 <monitor_left_wheel_speed_task+0x38>)
|
|
100003f4: 0018 movs r0, r3
|
|
100003f6: f004 f821 bl 1000443c <__wrap_printf>
|
|
100003fa: 6820 ldr r0, [r4, #0]
|
|
100003fc: 2300 movs r3, #0
|
|
100003fe: 2200 movs r2, #0
|
|
10000400: 2100 movs r1, #0
|
|
10000402: f007 f9f5 bl 100077f0 <xQueueGenericSend>
|
|
10000406: 200a movs r0, #10
|
|
10000408: f008 f8b2 bl 10008570 <vTaskDelay>
|
|
1000040c: e7e7 b.n 100003de <monitor_left_wheel_speed_task+0x2>
|
|
1000040e: 46c0 nop @ (mov r8, r8)
|
|
10000410: 200012fc .word 0x200012fc
|
|
10000414: 100091f8 .word 0x100091f8
|
|
|
|
10000418 <monitor_right_wheel_speed_task>:
|
|
10000418: b510 push {r4, lr}
|
|
1000041a: 2101 movs r1, #1
|
|
1000041c: 4c0f ldr r4, [pc, #60] @ (1000045c <monitor_right_wheel_speed_task+0x44>)
|
|
1000041e: 6820 ldr r0, [r4, #0]
|
|
10000420: 4249 negs r1, r1
|
|
10000422: f007 fc07 bl 10007c34 <xQueueSemaphoreTake>
|
|
10000426: 2001 movs r0, #1
|
|
10000428: f7ff ff88 bl 1000033c <get_wheel_slot_count>
|
|
1000042c: 4b0c ldr r3, [pc, #48] @ (10000460 <monitor_right_wheel_speed_task+0x48>)
|
|
1000042e: 7018 strb r0, [r3, #0]
|
|
10000430: f003 fdba bl 10003fa8 <__wrap___aeabi_ui2f>
|
|
10000434: 490b ldr r1, [pc, #44] @ (10000464 <monitor_right_wheel_speed_task+0x4c>)
|
|
10000436: f003 fd9c bl 10003f72 <__wrap___aeabi_fdiv>
|
|
1000043a: f003 fe11 bl 10004060 <__wrap___aeabi_f2d>
|
|
1000043e: 0002 movs r2, r0
|
|
10000440: 000b movs r3, r1
|
|
10000442: 4809 ldr r0, [pc, #36] @ (10000468 <monitor_right_wheel_speed_task+0x50>)
|
|
10000444: f003 fffa bl 1000443c <__wrap_printf>
|
|
10000448: 6820 ldr r0, [r4, #0]
|
|
1000044a: 2300 movs r3, #0
|
|
1000044c: 2200 movs r2, #0
|
|
1000044e: 2100 movs r1, #0
|
|
10000450: f007 f9ce bl 100077f0 <xQueueGenericSend>
|
|
10000454: 200a movs r0, #10
|
|
10000456: f008 f88b bl 10008570 <vTaskDelay>
|
|
1000045a: e7de b.n 1000041a <monitor_right_wheel_speed_task+0x2>
|
|
1000045c: 200012fc .word 0x200012fc
|
|
10000460: 20021d41 .word 0x20021d41
|
|
10000464: 41a00000 .word 0x41a00000
|
|
10000468: 10009208 .word 0x10009208
|
|
|
|
1000046c <set_wheel_speed>:
|
|
1000046c: b510 push {r4, lr}
|
|
1000046e: 4b12 ldr r3, [pc, #72] @ (100004b8 <set_wheel_speed+0x4c>)
|
|
10000470: 681c ldr r4, [r3, #0]
|
|
10000472: 4912 ldr r1, [pc, #72] @ (100004bc <set_wheel_speed+0x50>)
|
|
10000474: f003 fd91 bl 10003f9a <__wrap___aeabi_fmul>
|
|
10000478: f003 fdbe bl 10003ff8 <__wrap___aeabi_f2iz>
|
|
1000047c: b280 uxth r0, r0
|
|
1000047e: 00a3 lsls r3, r4, #2
|
|
10000480: 191b adds r3, r3, r4
|
|
10000482: 009b lsls r3, r3, #2
|
|
10000484: 4a0e ldr r2, [pc, #56] @ (100004c0 <set_wheel_speed+0x54>)
|
|
10000486: 4694 mov ip, r2
|
|
10000488: 4463 add r3, ip
|
|
1000048a: 681a ldr r2, [r3, #0]
|
|
1000048c: 4042 eors r2, r0
|
|
1000048e: 0412 lsls r2, r2, #16
|
|
10000490: 0c12 lsrs r2, r2, #16
|
|
10000492: 2180 movs r1, #128 @ 0x80
|
|
10000494: 0149 lsls r1, r1, #5
|
|
10000496: 430b orrs r3, r1
|
|
10000498: 601a str r2, [r3, #0]
|
|
1000049a: 4b0a ldr r3, [pc, #40] @ (100004c4 <set_wheel_speed+0x58>)
|
|
1000049c: 681a ldr r2, [r3, #0]
|
|
1000049e: 0093 lsls r3, r2, #2
|
|
100004a0: 189b adds r3, r3, r2
|
|
100004a2: 009b lsls r3, r3, #2
|
|
100004a4: 4463 add r3, ip
|
|
100004a6: 0400 lsls r0, r0, #16
|
|
100004a8: 681a ldr r2, [r3, #0]
|
|
100004aa: 4050 eors r0, r2
|
|
100004ac: 0c00 lsrs r0, r0, #16
|
|
100004ae: 0400 lsls r0, r0, #16
|
|
100004b0: 4319 orrs r1, r3
|
|
100004b2: 6008 str r0, [r1, #0]
|
|
100004b4: bd10 pop {r4, pc}
|
|
100004b6: 46c0 nop @ (mov r8, r8)
|
|
100004b8: 200012f4 .word 0x200012f4
|
|
100004bc: 459c4000 .word 0x459c4000
|
|
100004c0: 4005000c .word 0x4005000c
|
|
100004c4: 200012f8 .word 0x200012f8
|
|
|
|
100004c8 <wheel_setup>:
|
|
100004c8: b510 push {r4, lr}
|
|
100004ca: 2001 movs r0, #1
|
|
100004cc: f007 fa62 bl 10007994 <xQueueCreateMutex>
|
|
100004d0: 4b25 ldr r3, [pc, #148] @ (10000568 <wheel_setup+0xa0>)
|
|
100004d2: 6018 str r0, [r3, #0]
|
|
100004d4: f008 fdd4 bl 10009080 <adc_init>
|
|
100004d8: 201b movs r0, #27
|
|
100004da: f7ff ff15 bl 10000308 <adc_gpio_init>
|
|
100004de: 201a movs r0, #26
|
|
100004e0: f7ff ff12 bl 10000308 <adc_gpio_init>
|
|
100004e4: 200b movs r0, #11
|
|
100004e6: f000 faf1 bl 10000acc <gpio_init>
|
|
100004ea: 200c movs r0, #12
|
|
100004ec: f000 faee bl 10000acc <gpio_init>
|
|
100004f0: 2013 movs r0, #19
|
|
100004f2: f000 faeb bl 10000acc <gpio_init>
|
|
100004f6: 2014 movs r0, #20
|
|
100004f8: f000 fae8 bl 10000acc <gpio_init>
|
|
100004fc: 23d0 movs r3, #208 @ 0xd0
|
|
100004fe: 061b lsls r3, r3, #24
|
|
10000500: 2280 movs r2, #128 @ 0x80
|
|
10000502: 0112 lsls r2, r2, #4
|
|
10000504: 625a str r2, [r3, #36] @ 0x24
|
|
10000506: 2480 movs r4, #128 @ 0x80
|
|
10000508: 0164 lsls r4, r4, #5
|
|
1000050a: 625c str r4, [r3, #36] @ 0x24
|
|
1000050c: 2280 movs r2, #128 @ 0x80
|
|
1000050e: 0312 lsls r2, r2, #12
|
|
10000510: 625a str r2, [r3, #36] @ 0x24
|
|
10000512: 2280 movs r2, #128 @ 0x80
|
|
10000514: 0352 lsls r2, r2, #13
|
|
10000516: 625a str r2, [r3, #36] @ 0x24
|
|
10000518: 2104 movs r1, #4
|
|
1000051a: 2000 movs r0, #0
|
|
1000051c: f000 fa8c bl 10000a38 <gpio_set_function>
|
|
10000520: 2104 movs r1, #4
|
|
10000522: 2001 movs r0, #1
|
|
10000524: f000 fa88 bl 10000a38 <gpio_set_function>
|
|
10000528: 4b10 ldr r3, [pc, #64] @ (1000056c <wheel_setup+0xa4>)
|
|
1000052a: 2200 movs r2, #0
|
|
1000052c: 601a str r2, [r3, #0]
|
|
1000052e: 4910 ldr r1, [pc, #64] @ (10000570 <wheel_setup+0xa8>)
|
|
10000530: 600a str r2, [r1, #0]
|
|
10000532: 4b10 ldr r3, [pc, #64] @ (10000574 <wheel_setup+0xac>)
|
|
10000534: 22fa movs r2, #250 @ 0xfa
|
|
10000536: 0112 lsls r2, r2, #4
|
|
10000538: 605a str r2, [r3, #4]
|
|
1000053a: 605a str r2, [r3, #4]
|
|
1000053c: 4a0e ldr r2, [pc, #56] @ (10000578 <wheel_setup+0xb0>)
|
|
1000053e: 611a str r2, [r3, #16]
|
|
10000540: 611a str r2, [r3, #16]
|
|
10000542: 681b ldr r3, [r3, #0]
|
|
10000544: 2201 movs r2, #1
|
|
10000546: 0010 movs r0, r2
|
|
10000548: 4398 bics r0, r3
|
|
1000054a: 4b0c ldr r3, [pc, #48] @ (1000057c <wheel_setup+0xb4>)
|
|
1000054c: 6018 str r0, [r3, #0]
|
|
1000054e: 6809 ldr r1, [r1, #0]
|
|
10000550: 008b lsls r3, r1, #2
|
|
10000552: 185b adds r3, r3, r1
|
|
10000554: 009b lsls r3, r3, #2
|
|
10000556: 4907 ldr r1, [pc, #28] @ (10000574 <wheel_setup+0xac>)
|
|
10000558: 468c mov ip, r1
|
|
1000055a: 4463 add r3, ip
|
|
1000055c: 6819 ldr r1, [r3, #0]
|
|
1000055e: 438a bics r2, r1
|
|
10000560: 431c orrs r4, r3
|
|
10000562: 6022 str r2, [r4, #0]
|
|
10000564: bd10 pop {r4, pc}
|
|
10000566: 46c0 nop @ (mov r8, r8)
|
|
10000568: 200012fc .word 0x200012fc
|
|
1000056c: 200012f4 .word 0x200012f4
|
|
10000570: 200012f8 .word 0x200012f8
|
|
10000574: 40050000 .word 0x40050000
|
|
10000578: 00001387 .word 0x00001387
|
|
1000057c: 40051000 .word 0x40051000
|
|
|
|
10000580 <launch>:
|
|
10000580: b570 push {r4, r5, r6, lr}
|
|
10000582: b084 sub sp, #16
|
|
10000584: 2600 movs r6, #0
|
|
10000586: 9603 str r6, [sp, #12]
|
|
10000588: 2480 movs r4, #128 @ 0x80
|
|
1000058a: 0064 lsls r4, r4, #1
|
|
1000058c: 490b ldr r1, [pc, #44] @ (100005bc <launch+0x3c>)
|
|
1000058e: 480c ldr r0, [pc, #48] @ (100005c0 <launch+0x40>)
|
|
10000590: ab03 add r3, sp, #12
|
|
10000592: 9301 str r3, [sp, #4]
|
|
10000594: 2501 movs r5, #1
|
|
10000596: 9500 str r5, [sp, #0]
|
|
10000598: 2300 movs r3, #0
|
|
1000059a: 0022 movs r2, r4
|
|
1000059c: f007 fdf4 bl 10008188 <xTaskCreate>
|
|
100005a0: 9602 str r6, [sp, #8]
|
|
100005a2: 4908 ldr r1, [pc, #32] @ (100005c4 <launch+0x44>)
|
|
100005a4: 4808 ldr r0, [pc, #32] @ (100005c8 <launch+0x48>)
|
|
100005a6: ab02 add r3, sp, #8
|
|
100005a8: 9301 str r3, [sp, #4]
|
|
100005aa: 9500 str r5, [sp, #0]
|
|
100005ac: 2300 movs r3, #0
|
|
100005ae: 0022 movs r2, r4
|
|
100005b0: f007 fdea bl 10008188 <xTaskCreate>
|
|
100005b4: f007 fe1a bl 100081ec <vTaskStartScheduler>
|
|
100005b8: b004 add sp, #16
|
|
100005ba: bd70 pop {r4, r5, r6, pc}
|
|
100005bc: 10009220 .word 0x10009220
|
|
100005c0: 100003dd .word 0x100003dd
|
|
100005c4: 10009240 .word 0x10009240
|
|
100005c8: 10000419 .word 0x10000419
|
|
|
|
100005cc <main>:
|
|
100005cc: b510 push {r4, lr}
|
|
100005ce: f004 f8ef bl 100047b0 <stdio_usb_init>
|
|
100005d2: f7ff ff79 bl 100004c8 <wheel_setup>
|
|
100005d6: 20fa movs r0, #250 @ 0xfa
|
|
100005d8: 00c0 lsls r0, r0, #3
|
|
100005da: f001 fb00 bl 10001bde <sleep_ms>
|
|
100005de: 2080 movs r0, #128 @ 0x80
|
|
100005e0: 0140 lsls r0, r0, #5
|
|
100005e2: f7ff fea1 bl 10000328 <set_wheel_direction>
|
|
100005e6: 20fe movs r0, #254 @ 0xfe
|
|
100005e8: 0580 lsls r0, r0, #22
|
|
100005ea: f7ff ff3f bl 1000046c <set_wheel_speed>
|
|
100005ee: f7ff ffc7 bl 10000580 <launch>
|
|
100005f2: e7fe b.n 100005f2 <main+0x26>
|
|
|
|
100005f4 <running_on_fpga>:
|
|
100005f4: 4b03 ldr r3, [pc, #12] @ (10000604 <running_on_fpga+0x10>)
|
|
100005f6: 681b ldr r3, [r3, #0]
|
|
100005f8: 2002 movs r0, #2
|
|
100005fa: 4018 ands r0, r3
|
|
100005fc: 1e43 subs r3, r0, #1
|
|
100005fe: 4198 sbcs r0, r3
|
|
10000600: b2c0 uxtb r0, r0
|
|
10000602: 4770 bx lr
|
|
10000604: 4006c000 .word 0x4006c000
|
|
|
|
10000608 <_retrieve_unique_id_on_boot>:
|
|
10000608: b510 push {r4, lr}
|
|
1000060a: 4802 ldr r0, [pc, #8] @ (10000614 <_retrieve_unique_id_on_boot+0xc>)
|
|
1000060c: f000 f832 bl 10000674 <flash_get_unique_id>
|
|
10000610: bd10 pop {r4, pc}
|
|
10000612: 46c0 nop @ (mov r8, r8)
|
|
10000614: 200019d4 .word 0x200019d4
|
|
|
|
10000618 <pico_get_unique_board_id_string>:
|
|
10000618: b510 push {r4, lr}
|
|
1000061a: 2900 cmp r1, #0
|
|
1000061c: d001 beq.n 10000622 <pico_get_unique_board_id_string+0xa>
|
|
1000061e: 2300 movs r3, #0
|
|
10000620: e00a b.n 10000638 <pico_get_unique_board_id_string+0x20>
|
|
10000622: 4b10 ldr r3, [pc, #64] @ (10000664 <pico_get_unique_board_id_string+0x4c>)
|
|
10000624: 4a10 ldr r2, [pc, #64] @ (10000668 <pico_get_unique_board_id_string+0x50>)
|
|
10000626: 4811 ldr r0, [pc, #68] @ (1000066c <pico_get_unique_board_id_string+0x54>)
|
|
10000628: 311f adds r1, #31
|
|
1000062a: f001 ff2b bl 10002484 <__assert_func>
|
|
1000062e: 2200 movs r2, #0
|
|
10000630: e00d b.n 1000064e <pico_get_unique_board_id_string+0x36>
|
|
10000632: 3237 adds r2, #55 @ 0x37
|
|
10000634: 54c2 strb r2, [r0, r3]
|
|
10000636: 3301 adds r3, #1
|
|
10000638: 1e4a subs r2, r1, #1
|
|
1000063a: 429a cmp r2, r3
|
|
1000063c: d90e bls.n 1000065c <pico_get_unique_board_id_string+0x44>
|
|
1000063e: 2b0f cmp r3, #15
|
|
10000640: d80c bhi.n 1000065c <pico_get_unique_board_id_string+0x44>
|
|
10000642: 085a lsrs r2, r3, #1
|
|
10000644: 4c0a ldr r4, [pc, #40] @ (10000670 <pico_get_unique_board_id_string+0x58>)
|
|
10000646: 5ca4 ldrb r4, [r4, r2]
|
|
10000648: 07da lsls r2, r3, #31
|
|
1000064a: d4f0 bmi.n 1000062e <pico_get_unique_board_id_string+0x16>
|
|
1000064c: 2204 movs r2, #4
|
|
1000064e: 4114 asrs r4, r2
|
|
10000650: 220f movs r2, #15
|
|
10000652: 4022 ands r2, r4
|
|
10000654: 2a09 cmp r2, #9
|
|
10000656: dcec bgt.n 10000632 <pico_get_unique_board_id_string+0x1a>
|
|
10000658: 3230 adds r2, #48 @ 0x30
|
|
1000065a: e7eb b.n 10000634 <pico_get_unique_board_id_string+0x1c>
|
|
1000065c: 18c0 adds r0, r0, r3
|
|
1000065e: 2300 movs r3, #0
|
|
10000660: 7003 strb r3, [r0, #0]
|
|
10000662: bd10 pop {r4, pc}
|
|
10000664: 10009260 .word 0x10009260
|
|
10000668: 100092ac .word 0x100092ac
|
|
1000066c: 10009268 .word 0x10009268
|
|
10000670: 200019d4 .word 0x200019d4
|
|
|
|
10000674 <flash_get_unique_id>:
|
|
10000674: b570 push {r4, r5, r6, lr}
|
|
10000676: b088 sub sp, #32
|
|
10000678: 0004 movs r4, r0
|
|
1000067a: ad04 add r5, sp, #16
|
|
1000067c: 2600 movs r6, #0
|
|
1000067e: 9604 str r6, [sp, #16]
|
|
10000680: 2209 movs r2, #9
|
|
10000682: 2100 movs r1, #0
|
|
10000684: a805 add r0, sp, #20
|
|
10000686: f003 fd43 bl 10004110 <__wrap_memset>
|
|
1000068a: 9600 str r6, [sp, #0]
|
|
1000068c: 2209 movs r2, #9
|
|
1000068e: 2100 movs r1, #0
|
|
10000690: a801 add r0, sp, #4
|
|
10000692: f003 fd3d bl 10004110 <__wrap_memset>
|
|
10000696: 234b movs r3, #75 @ 0x4b
|
|
10000698: 702b strb r3, [r5, #0]
|
|
1000069a: 220d movs r2, #13
|
|
1000069c: 4669 mov r1, sp
|
|
1000069e: 0028 movs r0, r5
|
|
100006a0: f008 fd3a bl 10009118 <__flash_do_cmd_veneer>
|
|
100006a4: 2300 movs r3, #0
|
|
100006a6: e004 b.n 100006b2 <flash_get_unique_id+0x3e>
|
|
100006a8: 1d5a adds r2, r3, #5
|
|
100006aa: 4669 mov r1, sp
|
|
100006ac: 5c8a ldrb r2, [r1, r2]
|
|
100006ae: 54e2 strb r2, [r4, r3]
|
|
100006b0: 3301 adds r3, #1
|
|
100006b2: 2b07 cmp r3, #7
|
|
100006b4: ddf8 ble.n 100006a8 <flash_get_unique_id+0x34>
|
|
100006b6: b008 add sp, #32
|
|
100006b8: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
100006bc <hw_claim_lock>:
|
|
100006bc: f3ef 8010 mrs r0, PRIMASK
|
|
100006c0: b672 cpsid i
|
|
100006c2: 4b03 ldr r3, [pc, #12] @ (100006d0 <hw_claim_lock+0x14>)
|
|
100006c4: 681b ldr r3, [r3, #0]
|
|
100006c6: 2b00 cmp r3, #0
|
|
100006c8: d0fb beq.n 100006c2 <hw_claim_lock+0x6>
|
|
100006ca: f3bf 8f5f dmb sy
|
|
100006ce: 4770 bx lr
|
|
100006d0: d000012c .word 0xd000012c
|
|
|
|
100006d4 <hw_claim_unlock>:
|
|
100006d4: f3bf 8f5f dmb sy
|
|
100006d8: 4b02 ldr r3, [pc, #8] @ (100006e4 <hw_claim_unlock+0x10>)
|
|
100006da: 2200 movs r2, #0
|
|
100006dc: 601a str r2, [r3, #0]
|
|
100006de: f380 8810 msr PRIMASK, r0
|
|
100006e2: 4770 bx lr
|
|
100006e4: d000012c .word 0xd000012c
|
|
|
|
100006e8 <hw_claim_or_assert>:
|
|
100006e8: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100006ea: 0006 movs r6, r0
|
|
100006ec: 000c movs r4, r1
|
|
100006ee: 0015 movs r5, r2
|
|
100006f0: f7ff ffe4 bl 100006bc <hw_claim_lock>
|
|
100006f4: 08e3 lsrs r3, r4, #3
|
|
100006f6: 18f7 adds r7, r6, r3
|
|
100006f8: 5cf1 ldrb r1, [r6, r3]
|
|
100006fa: 2207 movs r2, #7
|
|
100006fc: 4022 ands r2, r4
|
|
100006fe: 2301 movs r3, #1
|
|
10000700: 4093 lsls r3, r2
|
|
10000702: 420b tst r3, r1
|
|
10000704: d105 bne.n 10000712 <hw_claim_or_assert+0x2a>
|
|
10000706: b2db uxtb r3, r3
|
|
10000708: 430b orrs r3, r1
|
|
1000070a: 703b strb r3, [r7, #0]
|
|
1000070c: f7ff ffe2 bl 100006d4 <hw_claim_unlock>
|
|
10000710: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10000712: 0021 movs r1, r4
|
|
10000714: 0028 movs r0, r5
|
|
10000716: f001 ff4d bl 100025b4 <panic>
|
|
|
|
1000071a <hw_claim_unused_from_range>:
|
|
1000071a: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000071c: b083 sub sp, #12
|
|
1000071e: 0006 movs r6, r0
|
|
10000720: 9101 str r1, [sp, #4]
|
|
10000722: 0014 movs r4, r2
|
|
10000724: 001f movs r7, r3
|
|
10000726: f7ff ffc9 bl 100006bc <hw_claim_lock>
|
|
1000072a: e000 b.n 1000072e <hw_claim_unused_from_range+0x14>
|
|
1000072c: 3401 adds r4, #1
|
|
1000072e: 42bc cmp r4, r7
|
|
10000730: d80c bhi.n 1000074c <hw_claim_unused_from_range+0x32>
|
|
10000732: 08e3 lsrs r3, r4, #3
|
|
10000734: 18f5 adds r5, r6, r3
|
|
10000736: 5cf3 ldrb r3, [r6, r3]
|
|
10000738: 2107 movs r1, #7
|
|
1000073a: 4021 ands r1, r4
|
|
1000073c: 2201 movs r2, #1
|
|
1000073e: 408a lsls r2, r1
|
|
10000740: 421a tst r2, r3
|
|
10000742: d1f3 bne.n 1000072c <hw_claim_unused_from_range+0x12>
|
|
10000744: b2d2 uxtb r2, r2
|
|
10000746: 431a orrs r2, r3
|
|
10000748: 702a strb r2, [r5, #0]
|
|
1000074a: e001 b.n 10000750 <hw_claim_unused_from_range+0x36>
|
|
1000074c: 2401 movs r4, #1
|
|
1000074e: 4264 negs r4, r4
|
|
10000750: f7ff ffc0 bl 100006d4 <hw_claim_unlock>
|
|
10000754: 2c00 cmp r4, #0
|
|
10000756: db02 blt.n 1000075e <hw_claim_unused_from_range+0x44>
|
|
10000758: 0020 movs r0, r4
|
|
1000075a: b003 add sp, #12
|
|
1000075c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000075e: 9b01 ldr r3, [sp, #4]
|
|
10000760: 2b00 cmp r3, #0
|
|
10000762: d0f9 beq.n 10000758 <hw_claim_unused_from_range+0x3e>
|
|
10000764: 9808 ldr r0, [sp, #32]
|
|
10000766: f001 ff25 bl 100025b4 <panic>
|
|
...
|
|
|
|
1000076c <spin_locks_reset>:
|
|
1000076c: 2300 movs r3, #0
|
|
1000076e: e007 b.n 10000780 <spin_locks_reset+0x14>
|
|
10000770: 4a05 ldr r2, [pc, #20] @ (10000788 <spin_locks_reset+0x1c>)
|
|
10000772: 189a adds r2, r3, r2
|
|
10000774: 0092 lsls r2, r2, #2
|
|
10000776: f3bf 8f5f dmb sy
|
|
1000077a: 2100 movs r1, #0
|
|
1000077c: 6011 str r1, [r2, #0]
|
|
1000077e: 3301 adds r3, #1
|
|
10000780: 2b1f cmp r3, #31
|
|
10000782: d9f5 bls.n 10000770 <spin_locks_reset+0x4>
|
|
10000784: 4770 bx lr
|
|
10000786: 46c0 nop @ (mov r8, r8)
|
|
10000788: 34000040 .word 0x34000040
|
|
|
|
1000078c <next_striped_spin_lock_num>:
|
|
1000078c: 4a05 ldr r2, [pc, #20] @ (100007a4 <next_striped_spin_lock_num+0x18>)
|
|
1000078e: 7810 ldrb r0, [r2, #0]
|
|
10000790: 1c43 adds r3, r0, #1
|
|
10000792: b2db uxtb r3, r3
|
|
10000794: 7013 strb r3, [r2, #0]
|
|
10000796: 2b17 cmp r3, #23
|
|
10000798: d902 bls.n 100007a0 <next_striped_spin_lock_num+0x14>
|
|
1000079a: 0013 movs r3, r2
|
|
1000079c: 2210 movs r2, #16
|
|
1000079e: 701a strb r2, [r3, #0]
|
|
100007a0: 4770 bx lr
|
|
100007a2: 46c0 nop @ (mov r8, r8)
|
|
100007a4: 20000ae8 .word 0x20000ae8
|
|
|
|
100007a8 <spin_lock_claim_unused>:
|
|
100007a8: b510 push {r4, lr}
|
|
100007aa: b082 sub sp, #8
|
|
100007ac: 0001 movs r1, r0
|
|
100007ae: 4c05 ldr r4, [pc, #20] @ (100007c4 <spin_lock_claim_unused+0x1c>)
|
|
100007b0: 4b05 ldr r3, [pc, #20] @ (100007c8 <spin_lock_claim_unused+0x20>)
|
|
100007b2: 9300 str r3, [sp, #0]
|
|
100007b4: 231f movs r3, #31
|
|
100007b6: 2218 movs r2, #24
|
|
100007b8: 0020 movs r0, r4
|
|
100007ba: f7ff ffae bl 1000071a <hw_claim_unused_from_range>
|
|
100007be: b002 add sp, #8
|
|
100007c0: bd10 pop {r4, pc}
|
|
100007c2: 46c0 nop @ (mov r8, r8)
|
|
100007c4: 20001254 .word 0x20001254
|
|
100007c8: 10009434 .word 0x10009434
|
|
|
|
100007cc <rom_func_lookup>:
|
|
100007cc: b510 push {r4, lr}
|
|
100007ce: 0001 movs r1, r0
|
|
100007d0: 2318 movs r3, #24
|
|
100007d2: 881b ldrh r3, [r3, #0]
|
|
100007d4: 2214 movs r2, #20
|
|
100007d6: 8810 ldrh r0, [r2, #0]
|
|
100007d8: 4798 blx r3
|
|
100007da: bd10 pop {r4, pc}
|
|
|
|
100007dc <rom_data_lookup>:
|
|
100007dc: b510 push {r4, lr}
|
|
100007de: 0001 movs r1, r0
|
|
100007e0: 2318 movs r3, #24
|
|
100007e2: 881b ldrh r3, [r3, #0]
|
|
100007e4: 2216 movs r2, #22
|
|
100007e6: 8810 ldrh r0, [r2, #0]
|
|
100007e8: 4798 blx r3
|
|
100007ea: bd10 pop {r4, pc}
|
|
|
|
100007ec <rom_funcs_lookup>:
|
|
100007ec: b5f0 push {r4, r5, r6, r7, lr}
|
|
100007ee: 46c6 mov lr, r8
|
|
100007f0: b500 push {lr}
|
|
100007f2: 0007 movs r7, r0
|
|
100007f4: 000e movs r6, r1
|
|
100007f6: 2500 movs r5, #0
|
|
100007f8: 2301 movs r3, #1
|
|
100007fa: 4698 mov r8, r3
|
|
100007fc: e000 b.n 10000800 <rom_funcs_lookup+0x14>
|
|
100007fe: 3501 adds r5, #1
|
|
10000800: 42b5 cmp r5, r6
|
|
10000802: d20a bcs.n 1000081a <rom_funcs_lookup+0x2e>
|
|
10000804: 00ac lsls r4, r5, #2
|
|
10000806: 193c adds r4, r7, r4
|
|
10000808: 6820 ldr r0, [r4, #0]
|
|
1000080a: f7ff ffdf bl 100007cc <rom_func_lookup>
|
|
1000080e: 6020 str r0, [r4, #0]
|
|
10000810: 2800 cmp r0, #0
|
|
10000812: d1f4 bne.n 100007fe <rom_funcs_lookup+0x12>
|
|
10000814: 2300 movs r3, #0
|
|
10000816: 4698 mov r8, r3
|
|
10000818: e7f1 b.n 100007fe <rom_funcs_lookup+0x12>
|
|
1000081a: 4640 mov r0, r8
|
|
1000081c: bc80 pop {r7}
|
|
1000081e: 46b8 mov r8, r7
|
|
10000820: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
10000824 <clock_configure>:
|
|
10000824: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10000826: 46de mov lr, fp
|
|
10000828: 4657 mov r7, sl
|
|
1000082a: 464e mov r6, r9
|
|
1000082c: 4645 mov r5, r8
|
|
1000082e: b5e0 push {r5, r6, r7, lr}
|
|
10000830: 0006 movs r6, r0
|
|
10000832: 000f movs r7, r1
|
|
10000834: 0015 movs r5, r2
|
|
10000836: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10000838: 4293 cmp r3, r2
|
|
1000083a: d350 bcc.n 100008de <clock_configure+0xba>
|
|
1000083c: 0e1a lsrs r2, r3, #24
|
|
1000083e: 4692 mov sl, r2
|
|
10000840: 021b lsls r3, r3, #8
|
|
10000842: 4698 mov r8, r3
|
|
10000844: 9a0a ldr r2, [sp, #40] @ 0x28
|
|
10000846: 2300 movs r3, #0
|
|
10000848: 4640 mov r0, r8
|
|
1000084a: 4651 mov r1, sl
|
|
1000084c: f003 f814 bl 10003878 <__wrap___aeabi_uldivmod>
|
|
10000850: 4681 mov r9, r0
|
|
10000852: 0074 lsls r4, r6, #1
|
|
10000854: 19a4 adds r4, r4, r6
|
|
10000856: 00a4 lsls r4, r4, #2
|
|
10000858: 4b2f ldr r3, [pc, #188] @ (10000918 <clock_configure+0xf4>)
|
|
1000085a: 469c mov ip, r3
|
|
1000085c: 4464 add r4, ip
|
|
1000085e: 6863 ldr r3, [r4, #4]
|
|
10000860: 4283 cmp r3, r0
|
|
10000862: d200 bcs.n 10000866 <clock_configure+0x42>
|
|
10000864: 6060 str r0, [r4, #4]
|
|
10000866: 1f33 subs r3, r6, #4
|
|
10000868: b2db uxtb r3, r3
|
|
1000086a: 469b mov fp, r3
|
|
1000086c: 2b01 cmp r3, #1
|
|
1000086e: d93c bls.n 100008ea <clock_configure+0xc6>
|
|
10000870: 23c0 movs r3, #192 @ 0xc0
|
|
10000872: 019b lsls r3, r3, #6
|
|
10000874: 4323 orrs r3, r4
|
|
10000876: 2280 movs r2, #128 @ 0x80
|
|
10000878: 0112 lsls r2, r2, #4
|
|
1000087a: 601a str r2, [r3, #0]
|
|
1000087c: 4b27 ldr r3, [pc, #156] @ (1000091c <clock_configure+0xf8>)
|
|
1000087e: 00b2 lsls r2, r6, #2
|
|
10000880: 58d1 ldr r1, [r2, r3]
|
|
10000882: 2900 cmp r1, #0
|
|
10000884: d007 beq.n 10000896 <clock_configure+0x72>
|
|
10000886: 6958 ldr r0, [r3, #20]
|
|
10000888: f002 ffb8 bl 100037fc <__wrap___aeabi_uidiv>
|
|
1000088c: 3001 adds r0, #1
|
|
1000088e: 0043 lsls r3, r0, #1
|
|
10000890: 181b adds r3, r3, r0
|
|
10000892: 3b03 subs r3, #3
|
|
10000894: d2fd bcs.n 10000892 <clock_configure+0x6e>
|
|
10000896: 016d lsls r5, r5, #5
|
|
10000898: 6823 ldr r3, [r4, #0]
|
|
1000089a: 405d eors r5, r3
|
|
1000089c: 22e0 movs r2, #224 @ 0xe0
|
|
1000089e: 402a ands r2, r5
|
|
100008a0: 2380 movs r3, #128 @ 0x80
|
|
100008a2: 015b lsls r3, r3, #5
|
|
100008a4: 4323 orrs r3, r4
|
|
100008a6: 601a str r2, [r3, #0]
|
|
100008a8: 465a mov r2, fp
|
|
100008aa: 2a01 cmp r2, #1
|
|
100008ac: d928 bls.n 10000900 <clock_configure+0xdc>
|
|
100008ae: 2380 movs r3, #128 @ 0x80
|
|
100008b0: 019b lsls r3, r3, #6
|
|
100008b2: 4323 orrs r3, r4
|
|
100008b4: 2280 movs r2, #128 @ 0x80
|
|
100008b6: 0112 lsls r2, r2, #4
|
|
100008b8: 601a str r2, [r3, #0]
|
|
100008ba: 464b mov r3, r9
|
|
100008bc: 6063 str r3, [r4, #4]
|
|
100008be: 464a mov r2, r9
|
|
100008c0: 2300 movs r3, #0
|
|
100008c2: 4640 mov r0, r8
|
|
100008c4: 4651 mov r1, sl
|
|
100008c6: f002 ffd7 bl 10003878 <__wrap___aeabi_uldivmod>
|
|
100008ca: 4b14 ldr r3, [pc, #80] @ (1000091c <clock_configure+0xf8>)
|
|
100008cc: 00b6 lsls r6, r6, #2
|
|
100008ce: 5198 str r0, [r3, r6]
|
|
100008d0: 2001 movs r0, #1
|
|
100008d2: bcf0 pop {r4, r5, r6, r7}
|
|
100008d4: 46bb mov fp, r7
|
|
100008d6: 46b2 mov sl, r6
|
|
100008d8: 46a9 mov r9, r5
|
|
100008da: 46a0 mov r8, r4
|
|
100008dc: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100008de: 4b10 ldr r3, [pc, #64] @ (10000920 <clock_configure+0xfc>)
|
|
100008e0: 4a10 ldr r2, [pc, #64] @ (10000924 <clock_configure+0x100>)
|
|
100008e2: 4811 ldr r0, [pc, #68] @ (10000928 <clock_configure+0x104>)
|
|
100008e4: 2133 movs r1, #51 @ 0x33
|
|
100008e6: f001 fdcd bl 10002484 <__assert_func>
|
|
100008ea: 2f01 cmp r7, #1
|
|
100008ec: d1c0 bne.n 10000870 <clock_configure+0x4c>
|
|
100008ee: 23c0 movs r3, #192 @ 0xc0
|
|
100008f0: 019b lsls r3, r3, #6
|
|
100008f2: 4323 orrs r3, r4
|
|
100008f4: 2203 movs r2, #3
|
|
100008f6: 601a str r2, [r3, #0]
|
|
100008f8: 68a3 ldr r3, [r4, #8]
|
|
100008fa: 07db lsls r3, r3, #31
|
|
100008fc: d5fc bpl.n 100008f8 <clock_configure+0xd4>
|
|
100008fe: e7ca b.n 10000896 <clock_configure+0x72>
|
|
10000900: 6821 ldr r1, [r4, #0]
|
|
10000902: 4079 eors r1, r7
|
|
10000904: 2203 movs r2, #3
|
|
10000906: 400a ands r2, r1
|
|
10000908: 601a str r2, [r3, #0]
|
|
1000090a: 68a3 ldr r3, [r4, #8]
|
|
1000090c: 2501 movs r5, #1
|
|
1000090e: 40bd lsls r5, r7
|
|
10000910: 421d tst r5, r3
|
|
10000912: d0fa beq.n 1000090a <clock_configure+0xe6>
|
|
10000914: e7cb b.n 100008ae <clock_configure+0x8a>
|
|
10000916: 46c0 nop @ (mov r8, r8)
|
|
10000918: 40008000 .word 0x40008000
|
|
1000091c: 20001258 .word 0x20001258
|
|
10000920: 10009450 .word 0x10009450
|
|
10000924: 100094a4 .word 0x100094a4
|
|
10000928: 10009464 .word 0x10009464
|
|
|
|
1000092c <clocks_init>:
|
|
1000092c: b530 push {r4, r5, lr}
|
|
1000092e: b083 sub sp, #12
|
|
10000930: 200c movs r0, #12
|
|
10000932: f001 fcd5 bl 100022e0 <watchdog_start_tick>
|
|
10000936: f7ff fe5d bl 100005f4 <running_on_fpga>
|
|
1000093a: 2800 cmp r0, #0
|
|
1000093c: d00d beq.n 1000095a <clocks_init+0x2e>
|
|
1000093e: 2300 movs r3, #0
|
|
10000940: e004 b.n 1000094c <clocks_init+0x20>
|
|
10000942: 4a2e ldr r2, [pc, #184] @ (100009fc <clocks_init+0xd0>)
|
|
10000944: 0099 lsls r1, r3, #2
|
|
10000946: 482e ldr r0, [pc, #184] @ (10000a00 <clocks_init+0xd4>)
|
|
10000948: 5088 str r0, [r1, r2]
|
|
1000094a: 3301 adds r3, #1
|
|
1000094c: 2b09 cmp r3, #9
|
|
1000094e: d9f8 bls.n 10000942 <clocks_init+0x16>
|
|
10000950: 4b2a ldr r3, [pc, #168] @ (100009fc <clocks_init+0xd0>)
|
|
10000952: 4a2c ldr r2, [pc, #176] @ (10000a04 <clocks_init+0xd8>)
|
|
10000954: 625a str r2, [r3, #36] @ 0x24
|
|
10000956: b003 add sp, #12
|
|
10000958: bd30 pop {r4, r5, pc}
|
|
1000095a: 4b2b ldr r3, [pc, #172] @ (10000a08 <clocks_init+0xdc>)
|
|
1000095c: 2200 movs r2, #0
|
|
1000095e: 679a str r2, [r3, #120] @ 0x78
|
|
10000960: f001 fd30 bl 100023c4 <xosc_init>
|
|
10000964: 4b29 ldr r3, [pc, #164] @ (10000a0c <clocks_init+0xe0>)
|
|
10000966: 2201 movs r2, #1
|
|
10000968: 601a str r2, [r3, #0]
|
|
1000096a: 4b27 ldr r3, [pc, #156] @ (10000a08 <clocks_init+0xdc>)
|
|
1000096c: 6c5b ldr r3, [r3, #68] @ 0x44
|
|
1000096e: 2b01 cmp r3, #1
|
|
10000970: d1fb bne.n 1000096a <clocks_init+0x3e>
|
|
10000972: 4b27 ldr r3, [pc, #156] @ (10000a10 <clocks_init+0xe4>)
|
|
10000974: 2203 movs r2, #3
|
|
10000976: 601a str r2, [r3, #0]
|
|
10000978: 4b23 ldr r3, [pc, #140] @ (10000a08 <clocks_init+0xdc>)
|
|
1000097a: 6b9b ldr r3, [r3, #56] @ 0x38
|
|
1000097c: 2b01 cmp r3, #1
|
|
1000097e: d1fb bne.n 10000978 <clocks_init+0x4c>
|
|
10000980: 3301 adds r3, #1
|
|
10000982: 9300 str r3, [sp, #0]
|
|
10000984: 3304 adds r3, #4
|
|
10000986: 4a23 ldr r2, [pc, #140] @ (10000a14 <clocks_init+0xe8>)
|
|
10000988: 2101 movs r1, #1
|
|
1000098a: 4823 ldr r0, [pc, #140] @ (10000a18 <clocks_init+0xec>)
|
|
1000098c: f001 fc18 bl 100021c0 <pll_init>
|
|
10000990: 2305 movs r3, #5
|
|
10000992: 9300 str r3, [sp, #0]
|
|
10000994: 4a21 ldr r2, [pc, #132] @ (10000a1c <clocks_init+0xf0>)
|
|
10000996: 2101 movs r1, #1
|
|
10000998: 4821 ldr r0, [pc, #132] @ (10000a20 <clocks_init+0xf4>)
|
|
1000099a: f001 fc11 bl 100021c0 <pll_init>
|
|
1000099e: 4b21 ldr r3, [pc, #132] @ (10000a24 <clocks_init+0xf8>)
|
|
100009a0: 9300 str r3, [sp, #0]
|
|
100009a2: 2200 movs r2, #0
|
|
100009a4: 2102 movs r1, #2
|
|
100009a6: 2004 movs r0, #4
|
|
100009a8: f7ff ff3c bl 10000824 <clock_configure>
|
|
100009ac: 4d1e ldr r5, [pc, #120] @ (10000a28 <clocks_init+0xfc>)
|
|
100009ae: 9500 str r5, [sp, #0]
|
|
100009b0: 002b movs r3, r5
|
|
100009b2: 2200 movs r2, #0
|
|
100009b4: 2101 movs r1, #1
|
|
100009b6: 2005 movs r0, #5
|
|
100009b8: f7ff ff34 bl 10000824 <clock_configure>
|
|
100009bc: 4c10 ldr r4, [pc, #64] @ (10000a00 <clocks_init+0xd4>)
|
|
100009be: 9400 str r4, [sp, #0]
|
|
100009c0: 0023 movs r3, r4
|
|
100009c2: 2200 movs r2, #0
|
|
100009c4: 2100 movs r1, #0
|
|
100009c6: 2007 movs r0, #7
|
|
100009c8: f7ff ff2c bl 10000824 <clock_configure>
|
|
100009cc: 9400 str r4, [sp, #0]
|
|
100009ce: 0023 movs r3, r4
|
|
100009d0: 2200 movs r2, #0
|
|
100009d2: 2100 movs r1, #0
|
|
100009d4: 2008 movs r0, #8
|
|
100009d6: f7ff ff25 bl 10000824 <clock_configure>
|
|
100009da: 4b0a ldr r3, [pc, #40] @ (10000a04 <clocks_init+0xd8>)
|
|
100009dc: 9300 str r3, [sp, #0]
|
|
100009de: 0023 movs r3, r4
|
|
100009e0: 2200 movs r2, #0
|
|
100009e2: 2100 movs r1, #0
|
|
100009e4: 2009 movs r0, #9
|
|
100009e6: f7ff ff1d bl 10000824 <clock_configure>
|
|
100009ea: 9500 str r5, [sp, #0]
|
|
100009ec: 002b movs r3, r5
|
|
100009ee: 2200 movs r2, #0
|
|
100009f0: 2100 movs r1, #0
|
|
100009f2: 2006 movs r0, #6
|
|
100009f4: f7ff ff16 bl 10000824 <clock_configure>
|
|
100009f8: e7ad b.n 10000956 <clocks_init+0x2a>
|
|
100009fa: 46c0 nop @ (mov r8, r8)
|
|
100009fc: 20001258 .word 0x20001258
|
|
10000a00: 02dc6c00 .word 0x02dc6c00
|
|
10000a04: 0000b71b .word 0x0000b71b
|
|
10000a08: 40008000 .word 0x40008000
|
|
10000a0c: 4000b03c .word 0x4000b03c
|
|
10000a10: 4000b030 .word 0x4000b030
|
|
10000a14: 59682f00 .word 0x59682f00
|
|
10000a18: 40028000 .word 0x40028000
|
|
10000a1c: 47868c00 .word 0x47868c00
|
|
10000a20: 4002c000 .word 0x4002c000
|
|
10000a24: 00b71b00 .word 0x00b71b00
|
|
10000a28: 07735940 .word 0x07735940
|
|
|
|
10000a2c <clock_get_hz>:
|
|
10000a2c: 4b01 ldr r3, [pc, #4] @ (10000a34 <clock_get_hz+0x8>)
|
|
10000a2e: 0080 lsls r0, r0, #2
|
|
10000a30: 58c0 ldr r0, [r0, r3]
|
|
10000a32: 4770 bx lr
|
|
10000a34: 20001258 .word 0x20001258
|
|
|
|
10000a38 <gpio_set_function>:
|
|
10000a38: b510 push {r4, lr}
|
|
10000a3a: 0083 lsls r3, r0, #2
|
|
10000a3c: 4a08 ldr r2, [pc, #32] @ (10000a60 <gpio_set_function+0x28>)
|
|
10000a3e: 4694 mov ip, r2
|
|
10000a40: 4463 add r3, ip
|
|
10000a42: 681a ldr r2, [r3, #0]
|
|
10000a44: 2440 movs r4, #64 @ 0x40
|
|
10000a46: 4062 eors r2, r4
|
|
10000a48: 3480 adds r4, #128 @ 0x80
|
|
10000a4a: 4014 ands r4, r2
|
|
10000a4c: 2280 movs r2, #128 @ 0x80
|
|
10000a4e: 0152 lsls r2, r2, #5
|
|
10000a50: 4313 orrs r3, r2
|
|
10000a52: 601c str r4, [r3, #0]
|
|
10000a54: 00c0 lsls r0, r0, #3
|
|
10000a56: 4b03 ldr r3, [pc, #12] @ (10000a64 <gpio_set_function+0x2c>)
|
|
10000a58: 469c mov ip, r3
|
|
10000a5a: 4460 add r0, ip
|
|
10000a5c: 6041 str r1, [r0, #4]
|
|
10000a5e: bd10 pop {r4, pc}
|
|
10000a60: 4001c004 .word 0x4001c004
|
|
10000a64: 40014000 .word 0x40014000
|
|
|
|
10000a68 <gpio_set_pulls>:
|
|
10000a68: 0080 lsls r0, r0, #2
|
|
10000a6a: 4b0b ldr r3, [pc, #44] @ (10000a98 <gpio_set_pulls+0x30>)
|
|
10000a6c: 469c mov ip, r3
|
|
10000a6e: 4460 add r0, ip
|
|
10000a70: 2900 cmp r1, #0
|
|
10000a72: d00d beq.n 10000a90 <gpio_set_pulls+0x28>
|
|
10000a74: 2308 movs r3, #8
|
|
10000a76: 2a00 cmp r2, #0
|
|
10000a78: d00c beq.n 10000a94 <gpio_set_pulls+0x2c>
|
|
10000a7a: 2204 movs r2, #4
|
|
10000a7c: 4313 orrs r3, r2
|
|
10000a7e: 6802 ldr r2, [r0, #0]
|
|
10000a80: 4053 eors r3, r2
|
|
10000a82: 220c movs r2, #12
|
|
10000a84: 401a ands r2, r3
|
|
10000a86: 2380 movs r3, #128 @ 0x80
|
|
10000a88: 015b lsls r3, r3, #5
|
|
10000a8a: 4303 orrs r3, r0
|
|
10000a8c: 601a str r2, [r3, #0]
|
|
10000a8e: 4770 bx lr
|
|
10000a90: 2300 movs r3, #0
|
|
10000a92: e7f0 b.n 10000a76 <gpio_set_pulls+0xe>
|
|
10000a94: 2200 movs r2, #0
|
|
10000a96: e7f1 b.n 10000a7c <gpio_set_pulls+0x14>
|
|
10000a98: 4001c004 .word 0x4001c004
|
|
|
|
10000a9c <gpio_set_input_enabled>:
|
|
10000a9c: 2900 cmp r1, #0
|
|
10000a9e: d009 beq.n 10000ab4 <gpio_set_input_enabled+0x18>
|
|
10000aa0: 0080 lsls r0, r0, #2
|
|
10000aa2: 4b09 ldr r3, [pc, #36] @ (10000ac8 <gpio_set_input_enabled+0x2c>)
|
|
10000aa4: 469c mov ip, r3
|
|
10000aa6: 4460 add r0, ip
|
|
10000aa8: 2380 movs r3, #128 @ 0x80
|
|
10000aaa: 019b lsls r3, r3, #6
|
|
10000aac: 4303 orrs r3, r0
|
|
10000aae: 2240 movs r2, #64 @ 0x40
|
|
10000ab0: 601a str r2, [r3, #0]
|
|
10000ab2: 4770 bx lr
|
|
10000ab4: 0080 lsls r0, r0, #2
|
|
10000ab6: 4b04 ldr r3, [pc, #16] @ (10000ac8 <gpio_set_input_enabled+0x2c>)
|
|
10000ab8: 469c mov ip, r3
|
|
10000aba: 4460 add r0, ip
|
|
10000abc: 23c0 movs r3, #192 @ 0xc0
|
|
10000abe: 019b lsls r3, r3, #6
|
|
10000ac0: 4303 orrs r3, r0
|
|
10000ac2: 2240 movs r2, #64 @ 0x40
|
|
10000ac4: 601a str r2, [r3, #0]
|
|
10000ac6: e7f4 b.n 10000ab2 <gpio_set_input_enabled+0x16>
|
|
10000ac8: 4001c004 .word 0x4001c004
|
|
|
|
10000acc <gpio_init>:
|
|
10000acc: b510 push {r4, lr}
|
|
10000ace: 2301 movs r3, #1
|
|
10000ad0: 4083 lsls r3, r0
|
|
10000ad2: 22d0 movs r2, #208 @ 0xd0
|
|
10000ad4: 0612 lsls r2, r2, #24
|
|
10000ad6: 6293 str r3, [r2, #40] @ 0x28
|
|
10000ad8: 6193 str r3, [r2, #24]
|
|
10000ada: 2105 movs r1, #5
|
|
10000adc: f7ff ffac bl 10000a38 <gpio_set_function>
|
|
10000ae0: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000ae4 <set_raw_irq_handler_and_unlock>:
|
|
10000ae4: 4b07 ldr r3, [pc, #28] @ (10000b04 <set_raw_irq_handler_and_unlock+0x20>)
|
|
10000ae6: 689b ldr r3, [r3, #8]
|
|
10000ae8: 3010 adds r0, #16
|
|
10000aea: 0080 lsls r0, r0, #2
|
|
10000aec: 5019 str r1, [r3, r0]
|
|
10000aee: f3bf 8f5f dmb sy
|
|
10000af2: f3bf 8f5f dmb sy
|
|
10000af6: 4b04 ldr r3, [pc, #16] @ (10000b08 <set_raw_irq_handler_and_unlock+0x24>)
|
|
10000af8: 2100 movs r1, #0
|
|
10000afa: 6019 str r1, [r3, #0]
|
|
10000afc: f382 8810 msr PRIMASK, r2
|
|
10000b00: 4770 bx lr
|
|
10000b02: 46c0 nop @ (mov r8, r8)
|
|
10000b04: e000ed00 .word 0xe000ed00
|
|
10000b08: d0000124 .word 0xd0000124
|
|
|
|
10000b0c <resolve_branch>:
|
|
10000b0c: b510 push {r4, lr}
|
|
10000b0e: 8803 ldrh r3, [r0, #0]
|
|
10000b10: 0ada lsrs r2, r3, #11
|
|
10000b12: 2a1c cmp r2, #28
|
|
10000b14: d105 bne.n 10000b22 <resolve_branch+0x16>
|
|
10000b16: 055b lsls r3, r3, #21
|
|
10000b18: 155b asrs r3, r3, #21
|
|
10000b1a: 3302 adds r3, #2
|
|
10000b1c: 005b lsls r3, r3, #1
|
|
10000b1e: 18c0 adds r0, r0, r3
|
|
10000b20: bd10 pop {r4, pc}
|
|
10000b22: 4b03 ldr r3, [pc, #12] @ (10000b30 <resolve_branch+0x24>)
|
|
10000b24: 4a03 ldr r2, [pc, #12] @ (10000b34 <resolve_branch+0x28>)
|
|
10000b26: 4804 ldr r0, [pc, #16] @ (10000b38 <resolve_branch+0x2c>)
|
|
10000b28: 21b1 movs r1, #177 @ 0xb1
|
|
10000b2a: f001 fcab bl 10002484 <__assert_func>
|
|
10000b2e: 46c0 nop @ (mov r8, r8)
|
|
10000b30: 100094b4 .word 0x100094b4
|
|
10000b34: 1000972c .word 0x1000972c
|
|
10000b38: 100094cc .word 0x100094cc
|
|
|
|
10000b3c <make_branch>:
|
|
10000b3c: b510 push {r4, lr}
|
|
10000b3e: 1a09 subs r1, r1, r0
|
|
10000b40: 1f0b subs r3, r1, #4
|
|
10000b42: 4a0a ldr r2, [pc, #40] @ (10000b6c <make_branch+0x30>)
|
|
10000b44: 1888 adds r0, r1, r2
|
|
10000b46: 4a0a ldr r2, [pc, #40] @ (10000b70 <make_branch+0x34>)
|
|
10000b48: 4290 cmp r0, r2
|
|
10000b4a: d808 bhi.n 10000b5e <make_branch+0x22>
|
|
10000b4c: 07c9 lsls r1, r1, #31
|
|
10000b4e: d406 bmi.n 10000b5e <make_branch+0x22>
|
|
10000b50: 105b asrs r3, r3, #1
|
|
10000b52: 055b lsls r3, r3, #21
|
|
10000b54: 0d5b lsrs r3, r3, #21
|
|
10000b56: 4807 ldr r0, [pc, #28] @ (10000b74 <make_branch+0x38>)
|
|
10000b58: 4318 orrs r0, r3
|
|
10000b5a: b280 uxth r0, r0
|
|
10000b5c: bd10 pop {r4, pc}
|
|
10000b5e: 4b06 ldr r3, [pc, #24] @ (10000b78 <make_branch+0x3c>)
|
|
10000b60: 4a06 ldr r2, [pc, #24] @ (10000b7c <make_branch+0x40>)
|
|
10000b62: 4807 ldr r0, [pc, #28] @ (10000b80 <make_branch+0x44>)
|
|
10000b64: 21a3 movs r1, #163 @ 0xa3
|
|
10000b66: f001 fc8d bl 10002484 <__assert_func>
|
|
10000b6a: 46c0 nop @ (mov r8, r8)
|
|
10000b6c: 000007fc .word 0x000007fc
|
|
10000b70: 00000ffe .word 0x00000ffe
|
|
10000b74: ffffe000 .word 0xffffe000
|
|
10000b78: 10009508 .word 0x10009508
|
|
10000b7c: 10009720 .word 0x10009720
|
|
10000b80: 100094cc .word 0x100094cc
|
|
|
|
10000b84 <insert_branch_and_link>:
|
|
10000b84: b510 push {r4, lr}
|
|
10000b86: 1a09 subs r1, r1, r0
|
|
10000b88: 3904 subs r1, #4
|
|
10000b8a: 084a lsrs r2, r1, #1
|
|
10000b8c: 0b09 lsrs r1, r1, #12
|
|
10000b8e: d108 bne.n 10000ba2 <insert_branch_and_link+0x1e>
|
|
10000b90: 0549 lsls r1, r1, #21
|
|
10000b92: 0d49 lsrs r1, r1, #21
|
|
10000b94: 4b06 ldr r3, [pc, #24] @ (10000bb0 <insert_branch_and_link+0x2c>)
|
|
10000b96: 430b orrs r3, r1
|
|
10000b98: 8003 strh r3, [r0, #0]
|
|
10000b9a: 4b06 ldr r3, [pc, #24] @ (10000bb4 <insert_branch_and_link+0x30>)
|
|
10000b9c: 4313 orrs r3, r2
|
|
10000b9e: 8043 strh r3, [r0, #2]
|
|
10000ba0: bd10 pop {r4, pc}
|
|
10000ba2: 4b05 ldr r3, [pc, #20] @ (10000bb8 <insert_branch_and_link+0x34>)
|
|
10000ba4: 4a05 ldr r2, [pc, #20] @ (10000bbc <insert_branch_and_link+0x38>)
|
|
10000ba6: 4806 ldr r0, [pc, #24] @ (10000bc0 <insert_branch_and_link+0x3c>)
|
|
10000ba8: 21ab movs r1, #171 @ 0xab
|
|
10000baa: f001 fc6b bl 10002484 <__assert_func>
|
|
10000bae: 46c0 nop @ (mov r8, r8)
|
|
10000bb0: fffff000 .word 0xfffff000
|
|
10000bb4: fffff800 .word 0xfffff800
|
|
10000bb8: 10009538 .word 0x10009538
|
|
10000bbc: 100096f4 .word 0x100096f4
|
|
10000bc0: 100094cc .word 0x100094cc
|
|
|
|
10000bc4 <irq_is_enabled>:
|
|
10000bc4: 2301 movs r3, #1
|
|
10000bc6: 4083 lsls r3, r0
|
|
10000bc8: 4a03 ldr r2, [pc, #12] @ (10000bd8 <irq_is_enabled+0x14>)
|
|
10000bca: 6810 ldr r0, [r2, #0]
|
|
10000bcc: 4018 ands r0, r3
|
|
10000bce: 1e43 subs r3, r0, #1
|
|
10000bd0: 4198 sbcs r0, r3
|
|
10000bd2: b2c0 uxtb r0, r0
|
|
10000bd4: 4770 bx lr
|
|
10000bd6: 46c0 nop @ (mov r8, r8)
|
|
10000bd8: e000e100 .word 0xe000e100
|
|
|
|
10000bdc <irq_set_mask_enabled>:
|
|
10000bdc: 2900 cmp r1, #0
|
|
10000bde: d004 beq.n 10000bea <irq_set_mask_enabled+0xe>
|
|
10000be0: 4b03 ldr r3, [pc, #12] @ (10000bf0 <irq_set_mask_enabled+0x14>)
|
|
10000be2: 6018 str r0, [r3, #0]
|
|
10000be4: 4b03 ldr r3, [pc, #12] @ (10000bf4 <irq_set_mask_enabled+0x18>)
|
|
10000be6: 6018 str r0, [r3, #0]
|
|
10000be8: 4770 bx lr
|
|
10000bea: 4b03 ldr r3, [pc, #12] @ (10000bf8 <irq_set_mask_enabled+0x1c>)
|
|
10000bec: 6018 str r0, [r3, #0]
|
|
10000bee: e7fb b.n 10000be8 <irq_set_mask_enabled+0xc>
|
|
10000bf0: e000e280 .word 0xe000e280
|
|
10000bf4: e000e100 .word 0xe000e100
|
|
10000bf8: e000e180 .word 0xe000e180
|
|
|
|
10000bfc <irq_set_enabled>:
|
|
10000bfc: b510 push {r4, lr}
|
|
10000bfe: 2301 movs r3, #1
|
|
10000c00: 4083 lsls r3, r0
|
|
10000c02: 0018 movs r0, r3
|
|
10000c04: f7ff ffea bl 10000bdc <irq_set_mask_enabled>
|
|
10000c08: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10000c0c <irq_set_pending>:
|
|
10000c0c: 2301 movs r3, #1
|
|
10000c0e: 4083 lsls r3, r0
|
|
10000c10: 4a01 ldr r2, [pc, #4] @ (10000c18 <irq_set_pending+0xc>)
|
|
10000c12: 6013 str r3, [r2, #0]
|
|
10000c14: 4770 bx lr
|
|
10000c16: 46c0 nop @ (mov r8, r8)
|
|
10000c18: e000e200 .word 0xe000e200
|
|
|
|
10000c1c <irq_get_vtable_handler>:
|
|
10000c1c: 4b02 ldr r3, [pc, #8] @ (10000c28 <irq_get_vtable_handler+0xc>)
|
|
10000c1e: 689b ldr r3, [r3, #8]
|
|
10000c20: 3010 adds r0, #16
|
|
10000c22: 0080 lsls r0, r0, #2
|
|
10000c24: 58c0 ldr r0, [r0, r3]
|
|
10000c26: 4770 bx lr
|
|
10000c28: e000ed00 .word 0xe000ed00
|
|
|
|
10000c2c <irq_has_shared_handler>:
|
|
10000c2c: b510 push {r4, lr}
|
|
10000c2e: f7ff fff5 bl 10000c1c <irq_get_vtable_handler>
|
|
10000c32: 2800 cmp r0, #0
|
|
10000c34: d005 beq.n 10000c42 <irq_has_shared_handler+0x16>
|
|
10000c36: 4b05 ldr r3, [pc, #20] @ (10000c4c <irq_has_shared_handler+0x20>)
|
|
10000c38: 1ac0 subs r0, r0, r3
|
|
10000c3a: 282f cmp r0, #47 @ 0x2f
|
|
10000c3c: d803 bhi.n 10000c46 <irq_has_shared_handler+0x1a>
|
|
10000c3e: 2001 movs r0, #1
|
|
10000c40: bd10 pop {r4, pc}
|
|
10000c42: 2000 movs r0, #0
|
|
10000c44: e7fc b.n 10000c40 <irq_has_shared_handler+0x14>
|
|
10000c46: 2000 movs r0, #0
|
|
10000c48: e7fa b.n 10000c40 <irq_has_shared_handler+0x14>
|
|
10000c4a: 46c0 nop @ (mov r8, r8)
|
|
10000c4c: 20000aec .word 0x20000aec
|
|
|
|
10000c50 <irq_set_exclusive_handler>:
|
|
10000c50: b570 push {r4, r5, r6, lr}
|
|
10000c52: 0004 movs r4, r0
|
|
10000c54: 000d movs r5, r1
|
|
10000c56: f3ef 8610 mrs r6, PRIMASK
|
|
10000c5a: b672 cpsid i
|
|
10000c5c: 4b0c ldr r3, [pc, #48] @ (10000c90 <irq_set_exclusive_handler+0x40>)
|
|
10000c5e: 681b ldr r3, [r3, #0]
|
|
10000c60: 2b00 cmp r3, #0
|
|
10000c62: d0fb beq.n 10000c5c <irq_set_exclusive_handler+0xc>
|
|
10000c64: f3bf 8f5f dmb sy
|
|
10000c68: 0020 movs r0, r4
|
|
10000c6a: f7ff ffd7 bl 10000c1c <irq_get_vtable_handler>
|
|
10000c6e: 4b09 ldr r3, [pc, #36] @ (10000c94 <irq_set_exclusive_handler+0x44>)
|
|
10000c70: 4298 cmp r0, r3
|
|
10000c72: d001 beq.n 10000c78 <irq_set_exclusive_handler+0x28>
|
|
10000c74: 42a8 cmp r0, r5
|
|
10000c76: d105 bne.n 10000c84 <irq_set_exclusive_handler+0x34>
|
|
10000c78: 0032 movs r2, r6
|
|
10000c7a: 0029 movs r1, r5
|
|
10000c7c: 0020 movs r0, r4
|
|
10000c7e: f7ff ff31 bl 10000ae4 <set_raw_irq_handler_and_unlock>
|
|
10000c82: bd70 pop {r4, r5, r6, pc}
|
|
10000c84: 4b04 ldr r3, [pc, #16] @ (10000c98 <irq_set_exclusive_handler+0x48>)
|
|
10000c86: 4a05 ldr r2, [pc, #20] @ (10000c9c <irq_set_exclusive_handler+0x4c>)
|
|
10000c88: 4805 ldr r0, [pc, #20] @ (10000ca0 <irq_set_exclusive_handler+0x50>)
|
|
10000c8a: 2186 movs r1, #134 @ 0x86
|
|
10000c8c: f001 fbfa bl 10002484 <__assert_func>
|
|
10000c90: d0000124 .word 0xd0000124
|
|
10000c94: 100001cd .word 0x100001cd
|
|
10000c98: 10009548 .word 0x10009548
|
|
10000c9c: 10009754 .word 0x10009754
|
|
10000ca0: 100094cc .word 0x100094cc
|
|
|
|
10000ca4 <irq_add_shared_handler>:
|
|
10000ca4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000ca6: 46de mov lr, fp
|
|
10000ca8: 4657 mov r7, sl
|
|
10000caa: 464e mov r6, r9
|
|
10000cac: 4645 mov r5, r8
|
|
10000cae: b5e0 push {r5, r6, r7, lr}
|
|
10000cb0: b089 sub sp, #36 @ 0x24
|
|
10000cb2: 4681 mov r9, r0
|
|
10000cb4: 9101 str r1, [sp, #4]
|
|
10000cb6: 0015 movs r5, r2
|
|
10000cb8: f3ef 8a10 mrs sl, PRIMASK
|
|
10000cbc: b672 cpsid i
|
|
10000cbe: 4b6d ldr r3, [pc, #436] @ (10000e74 <irq_add_shared_handler+0x1d0>)
|
|
10000cc0: 681b ldr r3, [r3, #0]
|
|
10000cc2: 2b00 cmp r3, #0
|
|
10000cc4: d0fb beq.n 10000cbe <irq_add_shared_handler+0x1a>
|
|
10000cc6: f3bf 8f5f dmb sy
|
|
10000cca: 4b6b ldr r3, [pc, #428] @ (10000e78 <irq_add_shared_handler+0x1d4>)
|
|
10000ccc: 2600 movs r6, #0
|
|
10000cce: 579e ldrsb r6, [r3, r6]
|
|
10000cd0: 2e00 cmp r6, #0
|
|
10000cd2: db41 blt.n 10000d58 <irq_add_shared_handler+0xb4>
|
|
10000cd4: 0074 lsls r4, r6, #1
|
|
10000cd6: 19a4 adds r4, r4, r6
|
|
10000cd8: 00a4 lsls r4, r4, #2
|
|
10000cda: 4868 ldr r0, [pc, #416] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000cdc: 1824 adds r4, r4, r0
|
|
10000cde: 2206 movs r2, #6
|
|
10000ce0: 56a2 ldrsb r2, [r4, r2]
|
|
10000ce2: 4b65 ldr r3, [pc, #404] @ (10000e78 <irq_add_shared_handler+0x1d4>)
|
|
10000ce4: 701a strb r2, [r3, #0]
|
|
10000ce6: 4b66 ldr r3, [pc, #408] @ (10000e80 <irq_add_shared_handler+0x1dc>)
|
|
10000ce8: 689a ldr r2, [r3, #8]
|
|
10000cea: 464b mov r3, r9
|
|
10000cec: 3310 adds r3, #16
|
|
10000cee: 009b lsls r3, r3, #2
|
|
10000cf0: 58d3 ldr r3, [r2, r3]
|
|
10000cf2: 4698 mov r8, r3
|
|
10000cf4: 001f movs r7, r3
|
|
10000cf6: 1a18 subs r0, r3, r0
|
|
10000cf8: 282f cmp r0, #47 @ 0x2f
|
|
10000cfa: d939 bls.n 10000d70 <irq_add_shared_handler+0xcc>
|
|
10000cfc: 4b61 ldr r3, [pc, #388] @ (10000e84 <irq_add_shared_handler+0x1e0>)
|
|
10000cfe: 4598 cmp r8, r3
|
|
10000d00: d130 bne.n 10000d64 <irq_add_shared_handler+0xc0>
|
|
10000d02: af05 add r7, sp, #20
|
|
10000d04: 4b60 ldr r3, [pc, #384] @ (10000e88 <irq_add_shared_handler+0x1e4>)
|
|
10000d06: 803b strh r3, [r7, #0]
|
|
10000d08: 4960 ldr r1, [pc, #384] @ (10000e8c <irq_add_shared_handler+0x1e8>)
|
|
10000d0a: 0073 lsls r3, r6, #1
|
|
10000d0c: 469b mov fp, r3
|
|
10000d0e: 1998 adds r0, r3, r6
|
|
10000d10: 0080 lsls r0, r0, #2
|
|
10000d12: 4b5a ldr r3, [pc, #360] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000d14: 4698 mov r8, r3
|
|
10000d16: 4440 add r0, r8
|
|
10000d18: 3002 adds r0, #2
|
|
10000d1a: f7ff ff0f bl 10000b3c <make_branch>
|
|
10000d1e: 8078 strh r0, [r7, #2]
|
|
10000d20: 4b5b ldr r3, [pc, #364] @ (10000e90 <irq_add_shared_handler+0x1ec>)
|
|
10000d22: 80bb strh r3, [r7, #4]
|
|
10000d24: 23ff movs r3, #255 @ 0xff
|
|
10000d26: 71bb strb r3, [r7, #6]
|
|
10000d28: 71fd strb r5, [r7, #7]
|
|
10000d2a: 9b01 ldr r3, [sp, #4]
|
|
10000d2c: 9307 str r3, [sp, #28]
|
|
10000d2e: 0033 movs r3, r6
|
|
10000d30: 445b add r3, fp
|
|
10000d32: 009b lsls r3, r3, #2
|
|
10000d34: 4443 add r3, r8
|
|
10000d36: cf07 ldmia r7!, {r0, r1, r2}
|
|
10000d38: c307 stmia r3!, {r0, r1, r2}
|
|
10000d3a: 2301 movs r3, #1
|
|
10000d3c: 431c orrs r4, r3
|
|
10000d3e: 46a0 mov r8, r4
|
|
10000d40: 4652 mov r2, sl
|
|
10000d42: 4641 mov r1, r8
|
|
10000d44: 4648 mov r0, r9
|
|
10000d46: f7ff fecd bl 10000ae4 <set_raw_irq_handler_and_unlock>
|
|
10000d4a: b009 add sp, #36 @ 0x24
|
|
10000d4c: bcf0 pop {r4, r5, r6, r7}
|
|
10000d4e: 46bb mov fp, r7
|
|
10000d50: 46b2 mov sl, r6
|
|
10000d52: 46a9 mov r9, r5
|
|
10000d54: 46a0 mov r8, r4
|
|
10000d56: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000d58: 4b4e ldr r3, [pc, #312] @ (10000e94 <irq_add_shared_handler+0x1f0>)
|
|
10000d5a: 4a4f ldr r2, [pc, #316] @ (10000e98 <irq_add_shared_handler+0x1f4>)
|
|
10000d5c: 484f ldr r0, [pc, #316] @ (10000e9c <irq_add_shared_handler+0x1f8>)
|
|
10000d5e: 21d7 movs r1, #215 @ 0xd7
|
|
10000d60: f001 fb90 bl 10002484 <__assert_func>
|
|
10000d64: 4b4e ldr r3, [pc, #312] @ (10000ea0 <irq_add_shared_handler+0x1fc>)
|
|
10000d66: 4a4c ldr r2, [pc, #304] @ (10000e98 <irq_add_shared_handler+0x1f4>)
|
|
10000d68: 484c ldr r0, [pc, #304] @ (10000e9c <irq_add_shared_handler+0x1f8>)
|
|
10000d6a: 21de movs r1, #222 @ 0xde
|
|
10000d6c: f001 fb8a bl 10002484 <__assert_func>
|
|
10000d70: 3801 subs r0, #1
|
|
10000d72: 210c movs r1, #12
|
|
10000d74: f002 fd42 bl 100037fc <__wrap___aeabi_uidiv>
|
|
10000d78: 2900 cmp r1, #0
|
|
10000d7a: d112 bne.n 10000da2 <irq_add_shared_handler+0xfe>
|
|
10000d7c: 2301 movs r3, #1
|
|
10000d7e: 439f bics r7, r3
|
|
10000d80: 46bb mov fp, r7
|
|
10000d82: 003b movs r3, r7
|
|
10000d84: 2700 movs r7, #0
|
|
10000d86: 79da ldrb r2, [r3, #7]
|
|
10000d88: 42aa cmp r2, r5
|
|
10000d8a: d911 bls.n 10000db0 <irq_add_shared_handler+0x10c>
|
|
10000d8c: 2106 movs r1, #6
|
|
10000d8e: 5659 ldrsb r1, [r3, r1]
|
|
10000d90: 2900 cmp r1, #0
|
|
10000d92: db0c blt.n 10000dae <irq_add_shared_handler+0x10a>
|
|
10000d94: 004a lsls r2, r1, #1
|
|
10000d96: 1852 adds r2, r2, r1
|
|
10000d98: 0092 lsls r2, r2, #2
|
|
10000d9a: 4938 ldr r1, [pc, #224] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000d9c: 001f movs r7, r3
|
|
10000d9e: 188b adds r3, r1, r2
|
|
10000da0: e7f1 b.n 10000d86 <irq_add_shared_handler+0xe2>
|
|
10000da2: 4b40 ldr r3, [pc, #256] @ (10000ea4 <irq_add_shared_handler+0x200>)
|
|
10000da4: 4a3c ldr r2, [pc, #240] @ (10000e98 <irq_add_shared_handler+0x1f4>)
|
|
10000da6: 483d ldr r0, [pc, #244] @ (10000e9c <irq_add_shared_handler+0x1f8>)
|
|
10000da8: 21ea movs r1, #234 @ 0xea
|
|
10000daa: f001 fb6b bl 10002484 <__assert_func>
|
|
10000dae: 001f movs r7, r3
|
|
10000db0: 2f00 cmp r7, #0
|
|
10000db2: d02e beq.n 10000e12 <irq_add_shared_handler+0x16e>
|
|
10000db4: ab05 add r3, sp, #20
|
|
10000db6: 4a3c ldr r2, [pc, #240] @ (10000ea8 <irq_add_shared_handler+0x204>)
|
|
10000db8: 801a strh r2, [r3, #0]
|
|
10000dba: 3a81 subs r2, #129 @ 0x81
|
|
10000dbc: 805a strh r2, [r3, #2]
|
|
10000dbe: 2306 movs r3, #6
|
|
10000dc0: 56fb ldrsb r3, [r7, r3]
|
|
10000dc2: 9302 str r3, [sp, #8]
|
|
10000dc4: 2b00 cmp r3, #0
|
|
10000dc6: da17 bge.n 10000df8 <irq_add_shared_handler+0x154>
|
|
10000dc8: 4838 ldr r0, [pc, #224] @ (10000eac <irq_add_shared_handler+0x208>)
|
|
10000dca: ab05 add r3, sp, #20
|
|
10000dcc: 469b mov fp, r3
|
|
10000dce: 8098 strh r0, [r3, #4]
|
|
10000dd0: 9a02 ldr r2, [sp, #8]
|
|
10000dd2: 719a strb r2, [r3, #6]
|
|
10000dd4: 71dd strb r5, [r3, #7]
|
|
10000dd6: 9a01 ldr r2, [sp, #4]
|
|
10000dd8: 9207 str r2, [sp, #28]
|
|
10000dda: 1d38 adds r0, r7, #4
|
|
10000ddc: 0021 movs r1, r4
|
|
10000dde: f7ff fead bl 10000b3c <make_branch>
|
|
10000de2: 80b8 strh r0, [r7, #4]
|
|
10000de4: 71be strb r6, [r7, #6]
|
|
10000de6: 4b25 ldr r3, [pc, #148] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000de8: 0072 lsls r2, r6, #1
|
|
10000dea: 1992 adds r2, r2, r6
|
|
10000dec: 0092 lsls r2, r2, #2
|
|
10000dee: 189b adds r3, r3, r2
|
|
10000df0: 465a mov r2, fp
|
|
10000df2: ca13 ldmia r2!, {r0, r1, r4}
|
|
10000df4: c313 stmia r3!, {r0, r1, r4}
|
|
10000df6: e7a3 b.n 10000d40 <irq_add_shared_handler+0x9c>
|
|
10000df8: 1d38 adds r0, r7, #4
|
|
10000dfa: f7ff fe87 bl 10000b0c <resolve_branch>
|
|
10000dfe: 0001 movs r1, r0
|
|
10000e00: 0070 lsls r0, r6, #1
|
|
10000e02: 1980 adds r0, r0, r6
|
|
10000e04: 0080 lsls r0, r0, #2
|
|
10000e06: 4b1d ldr r3, [pc, #116] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000e08: 18c0 adds r0, r0, r3
|
|
10000e0a: 3004 adds r0, #4
|
|
10000e0c: f7ff fe96 bl 10000b3c <make_branch>
|
|
10000e10: e7db b.n 10000dca <irq_add_shared_handler+0x126>
|
|
10000e12: af05 add r7, sp, #20
|
|
10000e14: 4b1c ldr r3, [pc, #112] @ (10000e88 <irq_add_shared_handler+0x1e4>)
|
|
10000e16: 803b strh r3, [r7, #0]
|
|
10000e18: 491c ldr r1, [pc, #112] @ (10000e8c <irq_add_shared_handler+0x1e8>)
|
|
10000e1a: 0073 lsls r3, r6, #1
|
|
10000e1c: 9302 str r3, [sp, #8]
|
|
10000e1e: 199b adds r3, r3, r6
|
|
10000e20: 009b lsls r3, r3, #2
|
|
10000e22: 4a16 ldr r2, [pc, #88] @ (10000e7c <irq_add_shared_handler+0x1d8>)
|
|
10000e24: 4690 mov r8, r2
|
|
10000e26: 001a movs r2, r3
|
|
10000e28: 4442 add r2, r8
|
|
10000e2a: 9203 str r2, [sp, #12]
|
|
10000e2c: 1c90 adds r0, r2, #2
|
|
10000e2e: f7ff fe85 bl 10000b3c <make_branch>
|
|
10000e32: 8078 strh r0, [r7, #2]
|
|
10000e34: 9a03 ldr r2, [sp, #12]
|
|
10000e36: 1d10 adds r0, r2, #4
|
|
10000e38: 4659 mov r1, fp
|
|
10000e3a: f7ff fe7f bl 10000b3c <make_branch>
|
|
10000e3e: 80b8 strh r0, [r7, #4]
|
|
10000e40: 4b1b ldr r3, [pc, #108] @ (10000eb0 <irq_add_shared_handler+0x20c>)
|
|
10000e42: 465a mov r2, fp
|
|
10000e44: 4641 mov r1, r8
|
|
10000e46: 1a52 subs r2, r2, r1
|
|
10000e48: 4152 adcs r2, r2
|
|
10000e4a: 4353 muls r3, r2
|
|
10000e4c: 0d1b lsrs r3, r3, #20
|
|
10000e4e: 71bb strb r3, [r7, #6]
|
|
10000e50: 71fd strb r5, [r7, #7]
|
|
10000e52: 9a01 ldr r2, [sp, #4]
|
|
10000e54: 9207 str r2, [sp, #28]
|
|
10000e56: 9b02 ldr r3, [sp, #8]
|
|
10000e58: 199b adds r3, r3, r6
|
|
10000e5a: 009b lsls r3, r3, #2
|
|
10000e5c: 4443 add r3, r8
|
|
10000e5e: cf07 ldmia r7!, {r0, r1, r2}
|
|
10000e60: c307 stmia r3!, {r0, r1, r2}
|
|
10000e62: 4b11 ldr r3, [pc, #68] @ (10000ea8 <irq_add_shared_handler+0x204>)
|
|
10000e64: 465a mov r2, fp
|
|
10000e66: 8013 strh r3, [r2, #0]
|
|
10000e68: 3b81 subs r3, #129 @ 0x81
|
|
10000e6a: 8053 strh r3, [r2, #2]
|
|
10000e6c: 2301 movs r3, #1
|
|
10000e6e: 431c orrs r4, r3
|
|
10000e70: 46a0 mov r8, r4
|
|
10000e72: e765 b.n 10000d40 <irq_add_shared_handler+0x9c>
|
|
10000e74: d0000124 .word 0xd0000124
|
|
10000e78: 20021d42 .word 0x20021d42
|
|
10000e7c: 20000aec .word 0x20000aec
|
|
10000e80: e000ed00 .word 0xe000ed00
|
|
10000e84: 100001cd .word 0x100001cd
|
|
10000e88: ffffa100 .word 0xffffa100
|
|
10000e8c: 20000b1c .word 0x20000b1c
|
|
10000e90: ffffbd01 .word 0xffffbd01
|
|
10000e94: 10009580 .word 0x10009580
|
|
10000e98: 1000973c .word 0x1000973c
|
|
10000e9c: 100094cc .word 0x100094cc
|
|
10000ea0: 100095a8 .word 0x100095a8
|
|
10000ea4: 100095d0 .word 0x100095d0
|
|
10000ea8: 00004801 .word 0x00004801
|
|
10000eac: 0000bd01 .word 0x0000bd01
|
|
10000eb0: 0000aaaa .word 0x0000aaaa
|
|
|
|
10000eb4 <irq_remove_handler>:
|
|
10000eb4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10000eb6: 46ce mov lr, r9
|
|
10000eb8: 4647 mov r7, r8
|
|
10000eba: b580 push {r7, lr}
|
|
10000ebc: b083 sub sp, #12
|
|
10000ebe: 0006 movs r6, r0
|
|
10000ec0: 000d movs r5, r1
|
|
10000ec2: f3ef 8810 mrs r8, PRIMASK
|
|
10000ec6: b672 cpsid i
|
|
10000ec8: 4b4f ldr r3, [pc, #316] @ (10001008 <irq_remove_handler+0x154>)
|
|
10000eca: 681b ldr r3, [r3, #0]
|
|
10000ecc: 2b00 cmp r3, #0
|
|
10000ece: d0fb beq.n 10000ec8 <irq_remove_handler+0x14>
|
|
10000ed0: f3bf 8f5f dmb sy
|
|
10000ed4: 4b4d ldr r3, [pc, #308] @ (1000100c <irq_remove_handler+0x158>)
|
|
10000ed6: 689a ldr r2, [r3, #8]
|
|
10000ed8: 0034 movs r4, r6
|
|
10000eda: 3410 adds r4, #16
|
|
10000edc: 00a3 lsls r3, r4, #2
|
|
10000ede: 58d7 ldr r7, [r2, r3]
|
|
10000ee0: 4b4b ldr r3, [pc, #300] @ (10001010 <irq_remove_handler+0x15c>)
|
|
10000ee2: 429f cmp r7, r3
|
|
10000ee4: d007 beq.n 10000ef6 <irq_remove_handler+0x42>
|
|
10000ee6: 42af cmp r7, r5
|
|
10000ee8: d100 bne.n 10000eec <irq_remove_handler+0x38>
|
|
10000eea: e08b b.n 10001004 <irq_remove_handler+0x150>
|
|
10000eec: 9701 str r7, [sp, #4]
|
|
10000eee: 4b49 ldr r3, [pc, #292] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000ef0: 1afb subs r3, r7, r3
|
|
10000ef2: 2b2f cmp r3, #47 @ 0x2f
|
|
10000ef4: d909 bls.n 10000f0a <irq_remove_handler+0x56>
|
|
10000ef6: 4642 mov r2, r8
|
|
10000ef8: 0039 movs r1, r7
|
|
10000efa: 0030 movs r0, r6
|
|
10000efc: f7ff fdf2 bl 10000ae4 <set_raw_irq_handler_and_unlock>
|
|
10000f00: b003 add sp, #12
|
|
10000f02: bcc0 pop {r6, r7}
|
|
10000f04: 46b9 mov r9, r7
|
|
10000f06: 46b0 mov r8, r6
|
|
10000f08: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10000f0a: 0030 movs r0, r6
|
|
10000f0c: f7ff fe5a bl 10000bc4 <irq_is_enabled>
|
|
10000f10: 4681 mov r9, r0
|
|
10000f12: 2100 movs r1, #0
|
|
10000f14: 0030 movs r0, r6
|
|
10000f16: f7ff fe71 bl 10000bfc <irq_set_enabled>
|
|
10000f1a: f3bf 8f5f dmb sy
|
|
10000f1e: f3ef 8105 mrs r1, IPSR
|
|
10000f22: 2900 cmp r1, #0
|
|
10000f24: d001 beq.n 10000f2a <irq_remove_handler+0x76>
|
|
10000f26: 428c cmp r4, r1
|
|
10000f28: d111 bne.n 10000f4e <irq_remove_handler+0x9a>
|
|
10000f2a: 2301 movs r3, #1
|
|
10000f2c: 9c01 ldr r4, [sp, #4]
|
|
10000f2e: 439c bics r4, r3
|
|
10000f30: 2000 movs r0, #0
|
|
10000f32: 68a3 ldr r3, [r4, #8]
|
|
10000f34: 42ab cmp r3, r5
|
|
10000f36: d012 beq.n 10000f5e <irq_remove_handler+0xaa>
|
|
10000f38: 2206 movs r2, #6
|
|
10000f3a: 56a2 ldrsb r2, [r4, r2]
|
|
10000f3c: 2a00 cmp r2, #0
|
|
10000f3e: db0d blt.n 10000f5c <irq_remove_handler+0xa8>
|
|
10000f40: 0053 lsls r3, r2, #1
|
|
10000f42: 189b adds r3, r3, r2
|
|
10000f44: 009b lsls r3, r3, #2
|
|
10000f46: 4a33 ldr r2, [pc, #204] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000f48: 0020 movs r0, r4
|
|
10000f4a: 18d4 adds r4, r2, r3
|
|
10000f4c: e7f1 b.n 10000f32 <irq_remove_handler+0x7e>
|
|
10000f4e: 4b32 ldr r3, [pc, #200] @ (10001018 <irq_remove_handler+0x164>)
|
|
10000f50: 4a32 ldr r2, [pc, #200] @ (1000101c <irq_remove_handler+0x168>)
|
|
10000f52: 2136 movs r1, #54 @ 0x36
|
|
10000f54: 4832 ldr r0, [pc, #200] @ (10001020 <irq_remove_handler+0x16c>)
|
|
10000f56: 31ff adds r1, #255 @ 0xff
|
|
10000f58: f001 fa94 bl 10002484 <__assert_func>
|
|
10000f5c: 0020 movs r0, r4
|
|
10000f5e: 42ab cmp r3, r5
|
|
10000f60: d149 bne.n 10000ff6 <irq_remove_handler+0x142>
|
|
10000f62: 2506 movs r5, #6
|
|
10000f64: 5765 ldrsb r5, [r4, r5]
|
|
10000f66: 2d00 cmp r5, #0
|
|
10000f68: db2b blt.n 10000fc2 <irq_remove_handler+0x10e>
|
|
10000f6a: 4b2a ldr r3, [pc, #168] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000f6c: 006a lsls r2, r5, #1
|
|
10000f6e: 1952 adds r2, r2, r5
|
|
10000f70: 0092 lsls r2, r2, #2
|
|
10000f72: 189b adds r3, r3, r2
|
|
10000f74: 689a ldr r2, [r3, #8]
|
|
10000f76: 60a2 str r2, [r4, #8]
|
|
10000f78: 79da ldrb r2, [r3, #7]
|
|
10000f7a: 71e2 strb r2, [r4, #7]
|
|
10000f7c: 799b ldrb r3, [r3, #6]
|
|
10000f7e: b25b sxtb r3, r3
|
|
10000f80: 71a3 strb r3, [r4, #6]
|
|
10000f82: 2b00 cmp r3, #0
|
|
10000f84: da0f bge.n 10000fa6 <irq_remove_handler+0xf2>
|
|
10000f86: 4827 ldr r0, [pc, #156] @ (10001024 <irq_remove_handler+0x170>)
|
|
10000f88: 80a0 strh r0, [r4, #4]
|
|
10000f8a: 4b22 ldr r3, [pc, #136] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000f8c: 006a lsls r2, r5, #1
|
|
10000f8e: 1952 adds r2, r2, r5
|
|
10000f90: 0092 lsls r2, r2, #2
|
|
10000f92: 189b adds r3, r3, r2
|
|
10000f94: 4a24 ldr r2, [pc, #144] @ (10001028 <irq_remove_handler+0x174>)
|
|
10000f96: 7811 ldrb r1, [r2, #0]
|
|
10000f98: 7199 strb r1, [r3, #6]
|
|
10000f9a: 7015 strb r5, [r2, #0]
|
|
10000f9c: 4649 mov r1, r9
|
|
10000f9e: 0030 movs r0, r6
|
|
10000fa0: f7ff fe2c bl 10000bfc <irq_set_enabled>
|
|
10000fa4: e7a7 b.n 10000ef6 <irq_remove_handler+0x42>
|
|
10000fa6: 0068 lsls r0, r5, #1
|
|
10000fa8: 1940 adds r0, r0, r5
|
|
10000faa: 0080 lsls r0, r0, #2
|
|
10000fac: 4b19 ldr r3, [pc, #100] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000fae: 18c0 adds r0, r0, r3
|
|
10000fb0: 3004 adds r0, #4
|
|
10000fb2: f7ff fdab bl 10000b0c <resolve_branch>
|
|
10000fb6: 0001 movs r1, r0
|
|
10000fb8: 1d23 adds r3, r4, #4
|
|
10000fba: 0018 movs r0, r3
|
|
10000fbc: f7ff fdbe bl 10000b3c <make_branch>
|
|
10000fc0: e7e2 b.n 10000f88 <irq_remove_handler+0xd4>
|
|
10000fc2: 2900 cmp r1, #0
|
|
10000fc4: d112 bne.n 10000fec <irq_remove_handler+0x138>
|
|
10000fc6: 2800 cmp r0, #0
|
|
10000fc8: d00e beq.n 10000fe8 <irq_remove_handler+0x134>
|
|
10000fca: 23ff movs r3, #255 @ 0xff
|
|
10000fcc: 7183 strb r3, [r0, #6]
|
|
10000fce: 4b17 ldr r3, [pc, #92] @ (1000102c <irq_remove_handler+0x178>)
|
|
10000fd0: 8083 strh r3, [r0, #4]
|
|
10000fd2: 4915 ldr r1, [pc, #84] @ (10001028 <irq_remove_handler+0x174>)
|
|
10000fd4: 780b ldrb r3, [r1, #0]
|
|
10000fd6: 71a3 strb r3, [r4, #6]
|
|
10000fd8: 4a0e ldr r2, [pc, #56] @ (10001014 <irq_remove_handler+0x160>)
|
|
10000fda: 4b15 ldr r3, [pc, #84] @ (10001030 <irq_remove_handler+0x17c>)
|
|
10000fdc: 1aa4 subs r4, r4, r2
|
|
10000fde: 4164 adcs r4, r4
|
|
10000fe0: 4363 muls r3, r4
|
|
10000fe2: 0d1b lsrs r3, r3, #20
|
|
10000fe4: 700b strb r3, [r1, #0]
|
|
10000fe6: e7d9 b.n 10000f9c <irq_remove_handler+0xe8>
|
|
10000fe8: 4f09 ldr r7, [pc, #36] @ (10001010 <irq_remove_handler+0x15c>)
|
|
10000fea: e7f2 b.n 10000fd2 <irq_remove_handler+0x11e>
|
|
10000fec: 4911 ldr r1, [pc, #68] @ (10001034 <irq_remove_handler+0x180>)
|
|
10000fee: 1d20 adds r0, r4, #4
|
|
10000ff0: f7ff fdc8 bl 10000b84 <insert_branch_and_link>
|
|
10000ff4: e7d2 b.n 10000f9c <irq_remove_handler+0xe8>
|
|
10000ff6: 4b10 ldr r3, [pc, #64] @ (10001038 <irq_remove_handler+0x184>)
|
|
10000ff8: 4a08 ldr r2, [pc, #32] @ (1000101c <irq_remove_handler+0x168>)
|
|
10000ffa: 216a movs r1, #106 @ 0x6a
|
|
10000ffc: 4808 ldr r0, [pc, #32] @ (10001020 <irq_remove_handler+0x16c>)
|
|
10000ffe: 31ff adds r1, #255 @ 0xff
|
|
10001000: f001 fa40 bl 10002484 <__assert_func>
|
|
10001004: 4f02 ldr r7, [pc, #8] @ (10001010 <irq_remove_handler+0x15c>)
|
|
10001006: e776 b.n 10000ef6 <irq_remove_handler+0x42>
|
|
10001008: d0000124 .word 0xd0000124
|
|
1000100c: e000ed00 .word 0xe000ed00
|
|
10001010: 100001cd .word 0x100001cd
|
|
10001014: 20000aec .word 0x20000aec
|
|
10001018: 10009644 .word 0x10009644
|
|
1000101c: 1000970c .word 0x1000970c
|
|
10001020: 100094cc .word 0x100094cc
|
|
10001024: 0000bd01 .word 0x0000bd01
|
|
10001028: 20021d42 .word 0x20021d42
|
|
1000102c: ffffbd01 .word 0xffffbd01
|
|
10001030: 0000aaaa .word 0x0000aaaa
|
|
10001034: 20000b26 .word 0x20000b26
|
|
10001038: 10009678 .word 0x10009678
|
|
|
|
1000103c <irq_add_tail_to_free_list>:
|
|
1000103c: b570 push {r4, r5, r6, lr}
|
|
1000103e: 2201 movs r2, #1
|
|
10001040: 4302 orrs r2, r0
|
|
10001042: 4b2e ldr r3, [pc, #184] @ (100010fc <irq_add_tail_to_free_list+0xc0>)
|
|
10001044: 1ad3 subs r3, r2, r3
|
|
10001046: 2b2f cmp r3, #47 @ 0x2f
|
|
10001048: d828 bhi.n 1000109c <irq_add_tail_to_free_list+0x60>
|
|
1000104a: f3ef 8305 mrs r3, IPSR
|
|
1000104e: 2b00 cmp r3, #0
|
|
10001050: d02b beq.n 100010aa <irq_add_tail_to_free_list+0x6e>
|
|
10001052: f3ef 8c10 mrs ip, PRIMASK
|
|
10001056: b672 cpsid i
|
|
10001058: 4929 ldr r1, [pc, #164] @ (10001100 <irq_add_tail_to_free_list+0xc4>)
|
|
1000105a: 6809 ldr r1, [r1, #0]
|
|
1000105c: 2900 cmp r1, #0
|
|
1000105e: d0fb beq.n 10001058 <irq_add_tail_to_free_list+0x1c>
|
|
10001060: f3bf 8f5f dmb sy
|
|
10001064: 4c25 ldr r4, [pc, #148] @ (100010fc <irq_add_tail_to_free_list+0xc0>)
|
|
10001066: 4927 ldr r1, [pc, #156] @ (10001104 <irq_add_tail_to_free_list+0xc8>)
|
|
10001068: 0005 movs r5, r0
|
|
1000106a: 1b2d subs r5, r5, r4
|
|
1000106c: 416d adcs r5, r5
|
|
1000106e: 4369 muls r1, r5
|
|
10001070: 0d09 lsrs r1, r1, #20
|
|
10001072: b24c sxtb r4, r1
|
|
10001074: 4924 ldr r1, [pc, #144] @ (10001108 <irq_add_tail_to_free_list+0xcc>)
|
|
10001076: 6889 ldr r1, [r1, #8]
|
|
10001078: 009b lsls r3, r3, #2
|
|
1000107a: 58c9 ldr r1, [r1, r3]
|
|
1000107c: 4291 cmp r1, r2
|
|
1000107e: d01b beq.n 100010b8 <irq_add_tail_to_free_list+0x7c>
|
|
10001080: 2100 movs r1, #0
|
|
10001082: 2903 cmp r1, #3
|
|
10001084: d832 bhi.n 100010ec <irq_add_tail_to_free_list+0xb0>
|
|
10001086: 4b1d ldr r3, [pc, #116] @ (100010fc <irq_add_tail_to_free_list+0xc0>)
|
|
10001088: 004a lsls r2, r1, #1
|
|
1000108a: 1852 adds r2, r2, r1
|
|
1000108c: 0092 lsls r2, r2, #2
|
|
1000108e: 189b adds r3, r3, r2
|
|
10001090: 799b ldrb r3, [r3, #6]
|
|
10001092: b25b sxtb r3, r3
|
|
10001094: 42a3 cmp r3, r4
|
|
10001096: d01f beq.n 100010d8 <irq_add_tail_to_free_list+0x9c>
|
|
10001098: 3101 adds r1, #1
|
|
1000109a: e7f2 b.n 10001082 <irq_add_tail_to_free_list+0x46>
|
|
1000109c: 4b1b ldr r3, [pc, #108] @ (1000110c <irq_add_tail_to_free_list+0xd0>)
|
|
1000109e: 4a1c ldr r2, [pc, #112] @ (10001110 <irq_add_tail_to_free_list+0xd4>)
|
|
100010a0: 21c7 movs r1, #199 @ 0xc7
|
|
100010a2: 481c ldr r0, [pc, #112] @ (10001114 <irq_add_tail_to_free_list+0xd8>)
|
|
100010a4: 0049 lsls r1, r1, #1
|
|
100010a6: f001 f9ed bl 10002484 <__assert_func>
|
|
100010aa: 4b1b ldr r3, [pc, #108] @ (10001118 <irq_add_tail_to_free_list+0xdc>)
|
|
100010ac: 4a18 ldr r2, [pc, #96] @ (10001110 <irq_add_tail_to_free_list+0xd4>)
|
|
100010ae: 2192 movs r1, #146 @ 0x92
|
|
100010b0: 4818 ldr r0, [pc, #96] @ (10001114 <irq_add_tail_to_free_list+0xd8>)
|
|
100010b2: 31ff adds r1, #255 @ 0xff
|
|
100010b4: f001 f9e6 bl 10002484 <__assert_func>
|
|
100010b8: 4a13 ldr r2, [pc, #76] @ (10001108 <irq_add_tail_to_free_list+0xcc>)
|
|
100010ba: 6892 ldr r2, [r2, #8]
|
|
100010bc: 4917 ldr r1, [pc, #92] @ (1000111c <irq_add_tail_to_free_list+0xe0>)
|
|
100010be: 50d1 str r1, [r2, r3]
|
|
100010c0: 4b17 ldr r3, [pc, #92] @ (10001120 <irq_add_tail_to_free_list+0xe4>)
|
|
100010c2: 781a ldrb r2, [r3, #0]
|
|
100010c4: 7182 strb r2, [r0, #6]
|
|
100010c6: 701c strb r4, [r3, #0]
|
|
100010c8: f3bf 8f5f dmb sy
|
|
100010cc: 4b0c ldr r3, [pc, #48] @ (10001100 <irq_add_tail_to_free_list+0xc4>)
|
|
100010ce: 2200 movs r2, #0
|
|
100010d0: 601a str r2, [r3, #0]
|
|
100010d2: f38c 8810 msr PRIMASK, ip
|
|
100010d6: bd70 pop {r4, r5, r6, pc}
|
|
100010d8: 4b08 ldr r3, [pc, #32] @ (100010fc <irq_add_tail_to_free_list+0xc0>)
|
|
100010da: 004a lsls r2, r1, #1
|
|
100010dc: 1855 adds r5, r2, r1
|
|
100010de: 00ad lsls r5, r5, #2
|
|
100010e0: 195d adds r5, r3, r5
|
|
100010e2: 26ff movs r6, #255 @ 0xff
|
|
100010e4: 71ae strb r6, [r5, #6]
|
|
100010e6: 4a0f ldr r2, [pc, #60] @ (10001124 <irq_add_tail_to_free_list+0xe8>)
|
|
100010e8: 80aa strh r2, [r5, #4]
|
|
100010ea: e7e9 b.n 100010c0 <irq_add_tail_to_free_list+0x84>
|
|
100010ec: 4b0e ldr r3, [pc, #56] @ (10001128 <irq_add_tail_to_free_list+0xec>)
|
|
100010ee: 4a08 ldr r2, [pc, #32] @ (10001110 <irq_add_tail_to_free_list+0xd4>)
|
|
100010f0: 21d1 movs r1, #209 @ 0xd1
|
|
100010f2: 4808 ldr r0, [pc, #32] @ (10001114 <irq_add_tail_to_free_list+0xd8>)
|
|
100010f4: 0049 lsls r1, r1, #1
|
|
100010f6: f001 f9c5 bl 10002484 <__assert_func>
|
|
100010fa: 46c0 nop @ (mov r8, r8)
|
|
100010fc: 20000aec .word 0x20000aec
|
|
10001100: d0000124 .word 0xd0000124
|
|
10001104: 0000aaaa .word 0x0000aaaa
|
|
10001108: e000ed00 .word 0xe000ed00
|
|
1000110c: 10009680 .word 0x10009680
|
|
10001110: 100096d8 .word 0x100096d8
|
|
10001114: 100094cc .word 0x100094cc
|
|
10001118: 100096a8 .word 0x100096a8
|
|
1000111c: 100001cd .word 0x100001cd
|
|
10001120: 20021d42 .word 0x20021d42
|
|
10001124: ffffbd01 .word 0xffffbd01
|
|
10001128: 100096b4 .word 0x100096b4
|
|
|
|
1000112c <irq_init_priorities>:
|
|
1000112c: 2200 movs r2, #0
|
|
1000112e: 4b04 ldr r3, [pc, #16] @ (10001140 <irq_init_priorities+0x14>)
|
|
10001130: e002 b.n 10001138 <irq_init_priorities+0xc>
|
|
10001132: 4904 ldr r1, [pc, #16] @ (10001144 <irq_init_priorities+0x18>)
|
|
10001134: c302 stmia r3!, {r1}
|
|
10001136: 3201 adds r2, #1
|
|
10001138: 2a07 cmp r2, #7
|
|
1000113a: d9fa bls.n 10001132 <irq_init_priorities+0x6>
|
|
1000113c: 4770 bx lr
|
|
1000113e: 46c0 nop @ (mov r8, r8)
|
|
10001140: e000e400 .word 0xe000e400
|
|
10001144: 80808080 .word 0x80808080
|
|
|
|
10001148 <user_irq_claim_unused>:
|
|
10001148: b510 push {r4, lr}
|
|
1000114a: b082 sub sp, #8
|
|
1000114c: 0001 movs r1, r0
|
|
1000114e: 4c07 ldr r4, [pc, #28] @ (1000116c <user_irq_claim_unused+0x24>)
|
|
10001150: 4b07 ldr r3, [pc, #28] @ (10001170 <user_irq_claim_unused+0x28>)
|
|
10001152: 9300 str r3, [sp, #0]
|
|
10001154: 2305 movs r3, #5
|
|
10001156: 2200 movs r2, #0
|
|
10001158: 0020 movs r0, r4
|
|
1000115a: f7ff fade bl 1000071a <hw_claim_unused_from_range>
|
|
1000115e: 2800 cmp r0, #0
|
|
10001160: db01 blt.n 10001166 <user_irq_claim_unused+0x1e>
|
|
10001162: 231f movs r3, #31
|
|
10001164: 1a18 subs r0, r3, r0
|
|
10001166: b002 add sp, #8
|
|
10001168: bd10 pop {r4, pc}
|
|
1000116a: 46c0 nop @ (mov r8, r8)
|
|
1000116c: 20021d47 .word 0x20021d47
|
|
10001170: 100096bc .word 0x100096bc
|
|
|
|
10001174 <lock_init>:
|
|
10001174: 4b02 ldr r3, [pc, #8] @ (10001180 <lock_init+0xc>)
|
|
10001176: 469c mov ip, r3
|
|
10001178: 4461 add r1, ip
|
|
1000117a: 0089 lsls r1, r1, #2
|
|
1000117c: 6001 str r1, [r0, #0]
|
|
1000117e: 4770 bx lr
|
|
10001180: 34000040 .word 0x34000040
|
|
|
|
10001184 <update_us_since_boot>:
|
|
10001184: b510 push {r4, lr}
|
|
10001186: 2b00 cmp r3, #0
|
|
10001188: db02 blt.n 10001190 <update_us_since_boot+0xc>
|
|
1000118a: 6002 str r2, [r0, #0]
|
|
1000118c: 6043 str r3, [r0, #4]
|
|
1000118e: bd10 pop {r4, pc}
|
|
10001190: 4b02 ldr r3, [pc, #8] @ (1000119c <update_us_since_boot+0x18>)
|
|
10001192: 4a03 ldr r2, [pc, #12] @ (100011a0 <update_us_since_boot+0x1c>)
|
|
10001194: 4803 ldr r0, [pc, #12] @ (100011a4 <update_us_since_boot+0x20>)
|
|
10001196: 213f movs r1, #63 @ 0x3f
|
|
10001198: f001 f974 bl 10002484 <__assert_func>
|
|
1000119c: 10009770 .word 0x10009770
|
|
100011a0: 10009880 .word 0x10009880
|
|
100011a4: 1000978c .word 0x1000978c
|
|
|
|
100011a8 <delayed_by_ms>:
|
|
100011a8: b570 push {r4, r5, r6, lr}
|
|
100011aa: b082 sub sp, #8
|
|
100011ac: 0006 movs r6, r0
|
|
100011ae: 0014 movs r4, r2
|
|
100011b0: 001d movs r5, r3
|
|
100011b2: 22fa movs r2, #250 @ 0xfa
|
|
100011b4: 0092 lsls r2, r2, #2
|
|
100011b6: 2300 movs r3, #0
|
|
100011b8: 9806 ldr r0, [sp, #24]
|
|
100011ba: 2100 movs r1, #0
|
|
100011bc: f002 feb6 bl 10003f2c <__wrap___aeabi_lmul>
|
|
100011c0: 0002 movs r2, r0
|
|
100011c2: 000b movs r3, r1
|
|
100011c4: 1912 adds r2, r2, r4
|
|
100011c6: 416b adcs r3, r5
|
|
100011c8: 2b00 cmp r3, #0
|
|
100011ca: db09 blt.n 100011e0 <delayed_by_ms+0x38>
|
|
100011cc: 4668 mov r0, sp
|
|
100011ce: f7ff ffd9 bl 10001184 <update_us_since_boot>
|
|
100011d2: 9a00 ldr r2, [sp, #0]
|
|
100011d4: 9b01 ldr r3, [sp, #4]
|
|
100011d6: 6032 str r2, [r6, #0]
|
|
100011d8: 6073 str r3, [r6, #4]
|
|
100011da: 0030 movs r0, r6
|
|
100011dc: b002 add sp, #8
|
|
100011de: bd70 pop {r4, r5, r6, pc}
|
|
100011e0: 2201 movs r2, #1
|
|
100011e2: 4252 negs r2, r2
|
|
100011e4: 4b00 ldr r3, [pc, #0] @ (100011e8 <delayed_by_ms+0x40>)
|
|
100011e6: e7f1 b.n 100011cc <delayed_by_ms+0x24>
|
|
100011e8: 7fffffff .word 0x7fffffff
|
|
|
|
100011ec <get_absolute_time>:
|
|
100011ec: b510 push {r4, lr}
|
|
100011ee: b082 sub sp, #8
|
|
100011f0: 0004 movs r4, r0
|
|
100011f2: f000 fd73 bl 10001cdc <time_us_64>
|
|
100011f6: 0002 movs r2, r0
|
|
100011f8: 000b movs r3, r1
|
|
100011fa: 4668 mov r0, sp
|
|
100011fc: f7ff ffc2 bl 10001184 <update_us_since_boot>
|
|
10001200: 9a00 ldr r2, [sp, #0]
|
|
10001202: 9b01 ldr r3, [sp, #4]
|
|
10001204: 6022 str r2, [r4, #0]
|
|
10001206: 6063 str r3, [r4, #4]
|
|
10001208: 0020 movs r0, r4
|
|
1000120a: b002 add sp, #8
|
|
1000120c: bd10 pop {r4, pc}
|
|
|
|
1000120e <make_timeout_time_ms>:
|
|
1000120e: b530 push {r4, r5, lr}
|
|
10001210: b085 sub sp, #20
|
|
10001212: 0004 movs r4, r0
|
|
10001214: 000d movs r5, r1
|
|
10001216: a802 add r0, sp, #8
|
|
10001218: f7ff ffe8 bl 100011ec <get_absolute_time>
|
|
1000121c: 9a02 ldr r2, [sp, #8]
|
|
1000121e: 9b03 ldr r3, [sp, #12]
|
|
10001220: 9500 str r5, [sp, #0]
|
|
10001222: 0020 movs r0, r4
|
|
10001224: f7ff ffc0 bl 100011a8 <delayed_by_ms>
|
|
10001228: 0020 movs r0, r4
|
|
1000122a: b005 add sp, #20
|
|
1000122c: bd30 pop {r4, r5, pc}
|
|
|
|
1000122e <mutex_init>:
|
|
1000122e: b510 push {r4, lr}
|
|
10001230: 0004 movs r4, r0
|
|
10001232: f7ff faab bl 1000078c <next_striped_spin_lock_num>
|
|
10001236: 0001 movs r1, r0
|
|
10001238: 0020 movs r0, r4
|
|
1000123a: f7ff ff9b bl 10001174 <lock_init>
|
|
1000123e: 2301 movs r3, #1
|
|
10001240: 425b negs r3, r3
|
|
10001242: 6063 str r3, [r4, #4]
|
|
10001244: f3bf 8f5f dmb sy
|
|
10001248: bd10 pop {r4, pc}
|
|
|
|
1000124a <recursive_mutex_init>:
|
|
1000124a: b510 push {r4, lr}
|
|
1000124c: 0004 movs r4, r0
|
|
1000124e: f7ff fa9d bl 1000078c <next_striped_spin_lock_num>
|
|
10001252: 0001 movs r1, r0
|
|
10001254: 0020 movs r0, r4
|
|
10001256: f7ff ff8d bl 10001174 <lock_init>
|
|
1000125a: 2301 movs r3, #1
|
|
1000125c: 425b negs r3, r3
|
|
1000125e: 6063 str r3, [r4, #4]
|
|
10001260: 2300 movs r3, #0
|
|
10001262: 7223 strb r3, [r4, #8]
|
|
10001264: f3bf 8f5f dmb sy
|
|
10001268: bd10 pop {r4, pc}
|
|
...
|
|
|
|
1000126c <critical_section_init_with_lock_num>:
|
|
1000126c: 4b03 ldr r3, [pc, #12] @ (1000127c <critical_section_init_with_lock_num+0x10>)
|
|
1000126e: 469c mov ip, r3
|
|
10001270: 4461 add r1, ip
|
|
10001272: 0089 lsls r1, r1, #2
|
|
10001274: 6001 str r1, [r0, #0]
|
|
10001276: f3bf 8f5f dmb sy
|
|
1000127a: 4770 bx lr
|
|
1000127c: 34000040 .word 0x34000040
|
|
|
|
10001280 <critical_section_init>:
|
|
10001280: b510 push {r4, lr}
|
|
10001282: 0004 movs r4, r0
|
|
10001284: 2001 movs r0, #1
|
|
10001286: f7ff fa8f bl 100007a8 <spin_lock_claim_unused>
|
|
1000128a: 0001 movs r1, r0
|
|
1000128c: 0020 movs r0, r4
|
|
1000128e: f7ff ffed bl 1000126c <critical_section_init_with_lock_num>
|
|
10001292: bd10 pop {r4, pc}
|
|
|
|
10001294 <time_reached>:
|
|
10001294: 4b08 ldr r3, [pc, #32] @ (100012b8 <time_reached+0x24>)
|
|
10001296: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001298: 4299 cmp r1, r3
|
|
1000129a: d809 bhi.n 100012b0 <time_reached+0x1c>
|
|
1000129c: 4a06 ldr r2, [pc, #24] @ (100012b8 <time_reached+0x24>)
|
|
1000129e: 6a92 ldr r2, [r2, #40] @ 0x28
|
|
100012a0: 4282 cmp r2, r0
|
|
100012a2: d207 bcs.n 100012b4 <time_reached+0x20>
|
|
100012a4: 4299 cmp r1, r3
|
|
100012a6: d001 beq.n 100012ac <time_reached+0x18>
|
|
100012a8: 2001 movs r0, #1
|
|
100012aa: e002 b.n 100012b2 <time_reached+0x1e>
|
|
100012ac: 2000 movs r0, #0
|
|
100012ae: e000 b.n 100012b2 <time_reached+0x1e>
|
|
100012b0: 2000 movs r0, #0
|
|
100012b2: 4770 bx lr
|
|
100012b4: 2001 movs r0, #1
|
|
100012b6: e7fc b.n 100012b2 <time_reached+0x1e>
|
|
100012b8: 40054000 .word 0x40054000
|
|
|
|
100012bc <get_entry>:
|
|
100012bc: b510 push {r4, lr}
|
|
100012be: 2900 cmp r1, #0
|
|
100012c0: d00a beq.n 100012d8 <get_entry+0x1c>
|
|
100012c2: 6803 ldr r3, [r0, #0]
|
|
100012c4: 7b1b ldrb r3, [r3, #12]
|
|
100012c6: 428b cmp r3, r1
|
|
100012c8: d306 bcc.n 100012d8 <get_entry+0x1c>
|
|
100012ca: 6880 ldr r0, [r0, #8]
|
|
100012cc: 4b05 ldr r3, [pc, #20] @ (100012e4 <get_entry+0x28>)
|
|
100012ce: 469c mov ip, r3
|
|
100012d0: 4461 add r1, ip
|
|
100012d2: 0109 lsls r1, r1, #4
|
|
100012d4: 1840 adds r0, r0, r1
|
|
100012d6: bd10 pop {r4, pc}
|
|
100012d8: 4b03 ldr r3, [pc, #12] @ (100012e8 <get_entry+0x2c>)
|
|
100012da: 4a04 ldr r2, [pc, #16] @ (100012ec <get_entry+0x30>)
|
|
100012dc: 4804 ldr r0, [pc, #16] @ (100012f0 <get_entry+0x34>)
|
|
100012de: 213c movs r1, #60 @ 0x3c
|
|
100012e0: f001 f8d0 bl 10002484 <__assert_func>
|
|
100012e4: 0fffffff .word 0x0fffffff
|
|
100012e8: 10009898 .word 0x10009898
|
|
100012ec: 10009bb4 .word 0x10009bb4
|
|
100012f0: 100098bc .word 0x100098bc
|
|
|
|
100012f4 <timer_pool_entry_comparator>:
|
|
100012f4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100012f6: 0004 movs r4, r0
|
|
100012f8: 0017 movs r7, r2
|
|
100012fa: f7ff ffdf bl 100012bc <get_entry>
|
|
100012fe: 6806 ldr r6, [r0, #0]
|
|
10001300: 6845 ldr r5, [r0, #4]
|
|
10001302: 0039 movs r1, r7
|
|
10001304: 0020 movs r0, r4
|
|
10001306: f7ff ffd9 bl 100012bc <get_entry>
|
|
1000130a: 6802 ldr r2, [r0, #0]
|
|
1000130c: 6843 ldr r3, [r0, #4]
|
|
1000130e: 2001 movs r0, #1
|
|
10001310: 42ab cmp r3, r5
|
|
10001312: d801 bhi.n 10001318 <timer_pool_entry_comparator+0x24>
|
|
10001314: d002 beq.n 1000131c <timer_pool_entry_comparator+0x28>
|
|
10001316: 2000 movs r0, #0
|
|
10001318: b2c0 uxtb r0, r0
|
|
1000131a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
1000131c: 42b2 cmp r2, r6
|
|
1000131e: d8fb bhi.n 10001318 <timer_pool_entry_comparator+0x24>
|
|
10001320: e7f9 b.n 10001316 <timer_pool_entry_comparator+0x22>
|
|
...
|
|
|
|
10001324 <update_us_since_boot>:
|
|
10001324: b510 push {r4, lr}
|
|
10001326: 2b00 cmp r3, #0
|
|
10001328: db02 blt.n 10001330 <update_us_since_boot+0xc>
|
|
1000132a: 6002 str r2, [r0, #0]
|
|
1000132c: 6043 str r3, [r0, #4]
|
|
1000132e: bd10 pop {r4, pc}
|
|
10001330: 4b02 ldr r3, [pc, #8] @ (1000133c <update_us_since_boot+0x18>)
|
|
10001332: 4a03 ldr r2, [pc, #12] @ (10001340 <update_us_since_boot+0x1c>)
|
|
10001334: 4803 ldr r0, [pc, #12] @ (10001344 <update_us_since_boot+0x20>)
|
|
10001336: 213f movs r1, #63 @ 0x3f
|
|
10001338: f001 f8a4 bl 10002484 <__assert_func>
|
|
1000133c: 10009770 .word 0x10009770
|
|
10001340: 10009b80 .word 0x10009b80
|
|
10001344: 1000978c .word 0x1000978c
|
|
|
|
10001348 <delayed_by_us>:
|
|
10001348: b510 push {r4, lr}
|
|
1000134a: b082 sub sp, #8
|
|
1000134c: 0004 movs r4, r0
|
|
1000134e: 9804 ldr r0, [sp, #16]
|
|
10001350: 9905 ldr r1, [sp, #20]
|
|
10001352: 1812 adds r2, r2, r0
|
|
10001354: 414b adcs r3, r1
|
|
10001356: 2b00 cmp r3, #0
|
|
10001358: db09 blt.n 1000136e <delayed_by_us+0x26>
|
|
1000135a: 4668 mov r0, sp
|
|
1000135c: f7ff ffe2 bl 10001324 <update_us_since_boot>
|
|
10001360: 9a00 ldr r2, [sp, #0]
|
|
10001362: 9b01 ldr r3, [sp, #4]
|
|
10001364: 6022 str r2, [r4, #0]
|
|
10001366: 6063 str r3, [r4, #4]
|
|
10001368: 0020 movs r0, r4
|
|
1000136a: b002 add sp, #8
|
|
1000136c: bd10 pop {r4, pc}
|
|
1000136e: 2201 movs r2, #1
|
|
10001370: 4252 negs r2, r2
|
|
10001372: 4b01 ldr r3, [pc, #4] @ (10001378 <delayed_by_us+0x30>)
|
|
10001374: e7f1 b.n 1000135a <delayed_by_us+0x12>
|
|
10001376: 46c0 nop @ (mov r8, r8)
|
|
10001378: 7fffffff .word 0x7fffffff
|
|
|
|
1000137c <ph_get_node>:
|
|
1000137c: b510 push {r4, lr}
|
|
1000137e: 2900 cmp r1, #0
|
|
10001380: d008 beq.n 10001394 <ph_get_node+0x18>
|
|
10001382: 7b03 ldrb r3, [r0, #12]
|
|
10001384: 428b cmp r3, r1
|
|
10001386: d305 bcc.n 10001394 <ph_get_node+0x18>
|
|
10001388: 6800 ldr r0, [r0, #0]
|
|
1000138a: 004b lsls r3, r1, #1
|
|
1000138c: 185b adds r3, r3, r1
|
|
1000138e: 3b03 subs r3, #3
|
|
10001390: 18c0 adds r0, r0, r3
|
|
10001392: bd10 pop {r4, pc}
|
|
10001394: 4b02 ldr r3, [pc, #8] @ (100013a0 <ph_get_node+0x24>)
|
|
10001396: 4a03 ldr r2, [pc, #12] @ (100013a4 <ph_get_node+0x28>)
|
|
10001398: 4803 ldr r0, [pc, #12] @ (100013a8 <ph_get_node+0x2c>)
|
|
1000139a: 2168 movs r1, #104 @ 0x68
|
|
1000139c: f001 f872 bl 10002484 <__assert_func>
|
|
100013a0: 100098f0 .word 0x100098f0
|
|
100013a4: 10009b5c .word 0x10009b5c
|
|
100013a8: 1000990c .word 0x1000990c
|
|
|
|
100013ac <ph_contains_node>:
|
|
100013ac: b510 push {r4, lr}
|
|
100013ae: 7b43 ldrb r3, [r0, #13]
|
|
100013b0: 428b cmp r3, r1
|
|
100013b2: d101 bne.n 100013b8 <ph_contains_node+0xc>
|
|
100013b4: 2001 movs r0, #1
|
|
100013b6: bd10 pop {r4, pc}
|
|
100013b8: f7ff ffe0 bl 1000137c <ph_get_node>
|
|
100013bc: 7883 ldrb r3, [r0, #2]
|
|
100013be: 2b00 cmp r3, #0
|
|
100013c0: d101 bne.n 100013c6 <ph_contains_node+0x1a>
|
|
100013c2: 2000 movs r0, #0
|
|
100013c4: e7f7 b.n 100013b6 <ph_contains_node+0xa>
|
|
100013c6: 2001 movs r0, #1
|
|
100013c8: e7f5 b.n 100013b6 <ph_contains_node+0xa>
|
|
|
|
100013ca <ph_new_node>:
|
|
100013ca: b570 push {r4, r5, r6, lr}
|
|
100013cc: 0004 movs r4, r0
|
|
100013ce: 7b85 ldrb r5, [r0, #14]
|
|
100013d0: 2d00 cmp r5, #0
|
|
100013d2: d101 bne.n 100013d8 <ph_new_node+0xe>
|
|
100013d4: 0028 movs r0, r5
|
|
100013d6: bd70 pop {r4, r5, r6, pc}
|
|
100013d8: 0029 movs r1, r5
|
|
100013da: f7ff ffcf bl 1000137c <ph_get_node>
|
|
100013de: 7843 ldrb r3, [r0, #1]
|
|
100013e0: 73a3 strb r3, [r4, #14]
|
|
100013e2: 2b00 cmp r3, #0
|
|
100013e4: d100 bne.n 100013e8 <ph_new_node+0x1e>
|
|
100013e6: 73e3 strb r3, [r4, #15]
|
|
100013e8: 2300 movs r3, #0
|
|
100013ea: 7083 strb r3, [r0, #2]
|
|
100013ec: 7043 strb r3, [r0, #1]
|
|
100013ee: 7003 strb r3, [r0, #0]
|
|
100013f0: e7f0 b.n 100013d4 <ph_new_node+0xa>
|
|
...
|
|
|
|
100013f4 <ph_add_child_node>:
|
|
100013f4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100013f6: 0006 movs r6, r0
|
|
100013f8: 000c movs r4, r1
|
|
100013fa: 0015 movs r5, r2
|
|
100013fc: f7ff ffbe bl 1000137c <ph_get_node>
|
|
10001400: 0007 movs r7, r0
|
|
10001402: 2c00 cmp r4, #0
|
|
10001404: d00d beq.n 10001422 <ph_add_child_node+0x2e>
|
|
10001406: 2d00 cmp r5, #0
|
|
10001408: d011 beq.n 1000142e <ph_add_child_node+0x3a>
|
|
1000140a: 42ac cmp r4, r5
|
|
1000140c: d015 beq.n 1000143a <ph_add_child_node+0x46>
|
|
1000140e: 0029 movs r1, r5
|
|
10001410: 0030 movs r0, r6
|
|
10001412: f7ff ffb3 bl 1000137c <ph_get_node>
|
|
10001416: 7084 strb r4, [r0, #2]
|
|
10001418: 783b ldrb r3, [r7, #0]
|
|
1000141a: 2b00 cmp r3, #0
|
|
1000141c: d113 bne.n 10001446 <ph_add_child_node+0x52>
|
|
1000141e: 703d strb r5, [r7, #0]
|
|
10001420: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001422: 4b0a ldr r3, [pc, #40] @ (1000144c <ph_add_child_node+0x58>)
|
|
10001424: 4a0a ldr r2, [pc, #40] @ (10001450 <ph_add_child_node+0x5c>)
|
|
10001426: 480b ldr r0, [pc, #44] @ (10001454 <ph_add_child_node+0x60>)
|
|
10001428: 216f movs r1, #111 @ 0x6f
|
|
1000142a: f001 f82b bl 10002484 <__assert_func>
|
|
1000142e: 4b0a ldr r3, [pc, #40] @ (10001458 <ph_add_child_node+0x64>)
|
|
10001430: 4a07 ldr r2, [pc, #28] @ (10001450 <ph_add_child_node+0x5c>)
|
|
10001432: 4808 ldr r0, [pc, #32] @ (10001454 <ph_add_child_node+0x60>)
|
|
10001434: 2170 movs r1, #112 @ 0x70
|
|
10001436: f001 f825 bl 10002484 <__assert_func>
|
|
1000143a: 4b08 ldr r3, [pc, #32] @ (1000145c <ph_add_child_node+0x68>)
|
|
1000143c: 4a04 ldr r2, [pc, #16] @ (10001450 <ph_add_child_node+0x5c>)
|
|
1000143e: 4805 ldr r0, [pc, #20] @ (10001454 <ph_add_child_node+0x60>)
|
|
10001440: 2171 movs r1, #113 @ 0x71
|
|
10001442: f001 f81f bl 10002484 <__assert_func>
|
|
10001446: 7043 strb r3, [r0, #1]
|
|
10001448: 703d strb r5, [r7, #0]
|
|
1000144a: e7e9 b.n 10001420 <ph_add_child_node+0x2c>
|
|
1000144c: 10009954 .word 0x10009954
|
|
10001450: 10009b38 .word 0x10009b38
|
|
10001454: 1000990c .word 0x1000990c
|
|
10001458: 10009960 .word 0x10009960
|
|
1000145c: 1000996c .word 0x1000996c
|
|
|
|
10001460 <ph_merge_nodes>:
|
|
10001460: b570 push {r4, r5, r6, lr}
|
|
10001462: 0006 movs r6, r0
|
|
10001464: 000d movs r5, r1
|
|
10001466: 0014 movs r4, r2
|
|
10001468: 2900 cmp r1, #0
|
|
1000146a: d014 beq.n 10001496 <ph_merge_nodes+0x36>
|
|
1000146c: 2a00 cmp r2, #0
|
|
1000146e: d014 beq.n 1000149a <ph_merge_nodes+0x3a>
|
|
10001470: 6843 ldr r3, [r0, #4]
|
|
10001472: 6880 ldr r0, [r0, #8]
|
|
10001474: 4798 blx r3
|
|
10001476: 2800 cmp r0, #0
|
|
10001478: d006 beq.n 10001488 <ph_merge_nodes+0x28>
|
|
1000147a: 0022 movs r2, r4
|
|
1000147c: 0029 movs r1, r5
|
|
1000147e: 0030 movs r0, r6
|
|
10001480: f7ff ffb8 bl 100013f4 <ph_add_child_node>
|
|
10001484: 0028 movs r0, r5
|
|
10001486: e007 b.n 10001498 <ph_merge_nodes+0x38>
|
|
10001488: 002a movs r2, r5
|
|
1000148a: 0021 movs r1, r4
|
|
1000148c: 0030 movs r0, r6
|
|
1000148e: f7ff ffb1 bl 100013f4 <ph_add_child_node>
|
|
10001492: 0020 movs r0, r4
|
|
10001494: e000 b.n 10001498 <ph_merge_nodes+0x38>
|
|
10001496: 0010 movs r0, r2
|
|
10001498: bd70 pop {r4, r5, r6, pc}
|
|
1000149a: 0008 movs r0, r1
|
|
1000149c: e7fc b.n 10001498 <ph_merge_nodes+0x38>
|
|
...
|
|
|
|
100014a0 <ph_insert_node>:
|
|
100014a0: b570 push {r4, r5, r6, lr}
|
|
100014a2: 0004 movs r4, r0
|
|
100014a4: 1e0d subs r5, r1, #0
|
|
100014a6: d00c beq.n 100014c2 <ph_insert_node+0x22>
|
|
100014a8: f7ff ff68 bl 1000137c <ph_get_node>
|
|
100014ac: 2300 movs r3, #0
|
|
100014ae: 7083 strb r3, [r0, #2]
|
|
100014b0: 7043 strb r3, [r0, #1]
|
|
100014b2: 7003 strb r3, [r0, #0]
|
|
100014b4: 7b61 ldrb r1, [r4, #13]
|
|
100014b6: 002a movs r2, r5
|
|
100014b8: 0020 movs r0, r4
|
|
100014ba: f7ff ffd1 bl 10001460 <ph_merge_nodes>
|
|
100014be: 7360 strb r0, [r4, #13]
|
|
100014c0: bd70 pop {r4, r5, r6, pc}
|
|
100014c2: 4b03 ldr r3, [pc, #12] @ (100014d0 <ph_insert_node+0x30>)
|
|
100014c4: 4a03 ldr r2, [pc, #12] @ (100014d4 <ph_insert_node+0x34>)
|
|
100014c6: 4804 ldr r0, [pc, #16] @ (100014d8 <ph_insert_node+0x38>)
|
|
100014c8: 21a5 movs r1, #165 @ 0xa5
|
|
100014ca: f000 ffdb bl 10002484 <__assert_func>
|
|
100014ce: 46c0 nop @ (mov r8, r8)
|
|
100014d0: 10009984 .word 0x10009984
|
|
100014d4: 10009b4c .word 0x10009b4c
|
|
100014d8: 1000990c .word 0x1000990c
|
|
|
|
100014dc <ph_free_node>:
|
|
100014dc: b570 push {r4, r5, r6, lr}
|
|
100014de: 0004 movs r4, r0
|
|
100014e0: 1e0d subs r5, r1, #0
|
|
100014e2: d00f beq.n 10001504 <ph_free_node+0x28>
|
|
100014e4: f7ff ff62 bl 100013ac <ph_contains_node>
|
|
100014e8: 2800 cmp r0, #0
|
|
100014ea: d10b bne.n 10001504 <ph_free_node+0x28>
|
|
100014ec: 7be1 ldrb r1, [r4, #15]
|
|
100014ee: 2900 cmp r1, #0
|
|
100014f0: d10e bne.n 10001510 <ph_free_node+0x34>
|
|
100014f2: 7ba3 ldrb r3, [r4, #14]
|
|
100014f4: 2b00 cmp r3, #0
|
|
100014f6: d103 bne.n 10001500 <ph_free_node+0x24>
|
|
100014f8: 7be3 ldrb r3, [r4, #15]
|
|
100014fa: 2b00 cmp r3, #0
|
|
100014fc: d10d bne.n 1000151a <ph_free_node+0x3e>
|
|
100014fe: 73a5 strb r5, [r4, #14]
|
|
10001500: 73e5 strb r5, [r4, #15]
|
|
10001502: bd70 pop {r4, r5, r6, pc}
|
|
10001504: 4b08 ldr r3, [pc, #32] @ (10001528 <ph_free_node+0x4c>)
|
|
10001506: 4a09 ldr r2, [pc, #36] @ (1000152c <ph_free_node+0x50>)
|
|
10001508: 4809 ldr r0, [pc, #36] @ (10001530 <ph_free_node+0x54>)
|
|
1000150a: 21f6 movs r1, #246 @ 0xf6
|
|
1000150c: f000 ffba bl 10002484 <__assert_func>
|
|
10001510: 0020 movs r0, r4
|
|
10001512: f7ff ff33 bl 1000137c <ph_get_node>
|
|
10001516: 7045 strb r5, [r0, #1]
|
|
10001518: e7eb b.n 100014f2 <ph_free_node+0x16>
|
|
1000151a: 4b06 ldr r3, [pc, #24] @ (10001534 <ph_free_node+0x58>)
|
|
1000151c: 4a03 ldr r2, [pc, #12] @ (1000152c <ph_free_node+0x50>)
|
|
1000151e: 4804 ldr r0, [pc, #16] @ (10001530 <ph_free_node+0x54>)
|
|
10001520: 21fb movs r1, #251 @ 0xfb
|
|
10001522: f000 ffaf bl 10002484 <__assert_func>
|
|
10001526: 46c0 nop @ (mov r8, r8)
|
|
10001528: 10009988 .word 0x10009988
|
|
1000152c: 10009b28 .word 0x10009b28
|
|
10001530: 1000990c .word 0x1000990c
|
|
10001534: 100099ac .word 0x100099ac
|
|
|
|
10001538 <get_entry_id_high>:
|
|
10001538: b510 push {r4, lr}
|
|
1000153a: 2900 cmp r1, #0
|
|
1000153c: d007 beq.n 1000154e <get_entry_id_high+0x16>
|
|
1000153e: 6803 ldr r3, [r0, #0]
|
|
10001540: 7b1b ldrb r3, [r3, #12]
|
|
10001542: 428b cmp r3, r1
|
|
10001544: d303 bcc.n 1000154e <get_entry_id_high+0x16>
|
|
10001546: 68c0 ldr r0, [r0, #12]
|
|
10001548: 3901 subs r1, #1
|
|
1000154a: 1840 adds r0, r0, r1
|
|
1000154c: bd10 pop {r4, pc}
|
|
1000154e: 4b03 ldr r3, [pc, #12] @ (1000155c <get_entry_id_high+0x24>)
|
|
10001550: 4a03 ldr r2, [pc, #12] @ (10001560 <get_entry_id_high+0x28>)
|
|
10001552: 4804 ldr r0, [pc, #16] @ (10001564 <get_entry_id_high+0x2c>)
|
|
10001554: 2141 movs r1, #65 @ 0x41
|
|
10001556: f000 ff95 bl 10002484 <__assert_func>
|
|
1000155a: 46c0 nop @ (mov r8, r8)
|
|
1000155c: 10009898 .word 0x10009898
|
|
10001560: 10009b14 .word 0x10009b14
|
|
10001564: 100098bc .word 0x100098bc
|
|
|
|
10001568 <alarm_pool_post_alloc_init>:
|
|
10001568: b570 push {r4, r5, r6, lr}
|
|
1000156a: 0005 movs r5, r0
|
|
1000156c: 000c movs r4, r1
|
|
1000156e: 0008 movs r0, r1
|
|
10001570: f000 fc90 bl 10001e94 <hardware_alarm_cancel>
|
|
10001574: 4909 ldr r1, [pc, #36] @ (1000159c <alarm_pool_post_alloc_init+0x34>)
|
|
10001576: 0020 movs r0, r4
|
|
10001578: f000 fbd0 bl 10001d1c <hardware_alarm_set_callback>
|
|
1000157c: f7ff f906 bl 1000078c <next_striped_spin_lock_num>
|
|
10001580: 4b07 ldr r3, [pc, #28] @ (100015a0 <alarm_pool_post_alloc_init+0x38>)
|
|
10001582: 469c mov ip, r3
|
|
10001584: 4460 add r0, ip
|
|
10001586: 0080 lsls r0, r0, #2
|
|
10001588: 6068 str r0, [r5, #4]
|
|
1000158a: 752c strb r4, [r5, #20]
|
|
1000158c: 23d0 movs r3, #208 @ 0xd0
|
|
1000158e: 061b lsls r3, r3, #24
|
|
10001590: 781b ldrb r3, [r3, #0]
|
|
10001592: 756b strb r3, [r5, #21]
|
|
10001594: 4b03 ldr r3, [pc, #12] @ (100015a4 <alarm_pool_post_alloc_init+0x3c>)
|
|
10001596: 00a4 lsls r4, r4, #2
|
|
10001598: 50e5 str r5, [r4, r3]
|
|
1000159a: bd70 pop {r4, r5, r6, pc}
|
|
1000159c: 10001685 .word 0x10001685
|
|
100015a0: 34000040 .word 0x34000040
|
|
100015a4: 20001728 .word 0x20001728
|
|
|
|
100015a8 <get_absolute_time>:
|
|
100015a8: b510 push {r4, lr}
|
|
100015aa: b082 sub sp, #8
|
|
100015ac: 0004 movs r4, r0
|
|
100015ae: f000 fb95 bl 10001cdc <time_us_64>
|
|
100015b2: 0002 movs r2, r0
|
|
100015b4: 000b movs r3, r1
|
|
100015b6: 4668 mov r0, sp
|
|
100015b8: f7ff feb4 bl 10001324 <update_us_since_boot>
|
|
100015bc: 9a00 ldr r2, [sp, #0]
|
|
100015be: 9b01 ldr r3, [sp, #4]
|
|
100015c0: 6022 str r2, [r4, #0]
|
|
100015c2: 6063 str r3, [r4, #4]
|
|
100015c4: 0020 movs r0, r4
|
|
100015c6: b002 add sp, #8
|
|
100015c8: bd10 pop {r4, pc}
|
|
|
|
100015ca <make_timeout_time_us>:
|
|
100015ca: b570 push {r4, r5, r6, lr}
|
|
100015cc: b084 sub sp, #16
|
|
100015ce: 0004 movs r4, r0
|
|
100015d0: 0016 movs r6, r2
|
|
100015d2: 001d movs r5, r3
|
|
100015d4: a802 add r0, sp, #8
|
|
100015d6: f7ff ffe7 bl 100015a8 <get_absolute_time>
|
|
100015da: 9a02 ldr r2, [sp, #8]
|
|
100015dc: 9b03 ldr r3, [sp, #12]
|
|
100015de: 9600 str r6, [sp, #0]
|
|
100015e0: 9501 str r5, [sp, #4]
|
|
100015e2: 0020 movs r0, r4
|
|
100015e4: f7ff feb0 bl 10001348 <delayed_by_us>
|
|
100015e8: 0020 movs r0, r4
|
|
100015ea: b004 add sp, #16
|
|
100015ec: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
100015f0 <add_alarm_under_lock>:
|
|
100015f0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100015f2: b083 sub sp, #12
|
|
100015f4: 0007 movs r7, r0
|
|
100015f6: 9201 str r2, [sp, #4]
|
|
100015f8: 001d movs r5, r3
|
|
100015fa: ab0a add r3, sp, #40 @ 0x28
|
|
100015fc: 781c ldrb r4, [r3, #0]
|
|
100015fe: ab0b add r3, sp, #44 @ 0x2c
|
|
10001600: 781e ldrb r6, [r3, #0]
|
|
10001602: 2c00 cmp r4, #0
|
|
10001604: d00b beq.n 1000161e <add_alarm_under_lock+0x2e>
|
|
10001606: 6800 ldr r0, [r0, #0]
|
|
10001608: 0021 movs r1, r4
|
|
1000160a: f7ff fecf bl 100013ac <ph_contains_node>
|
|
1000160e: 2800 cmp r0, #0
|
|
10001610: d009 beq.n 10001626 <add_alarm_under_lock+0x36>
|
|
10001612: 4b19 ldr r3, [pc, #100] @ (10001678 <add_alarm_under_lock+0x88>)
|
|
10001614: 4a19 ldr r2, [pc, #100] @ (1000167c <add_alarm_under_lock+0x8c>)
|
|
10001616: 481a ldr r0, [pc, #104] @ (10001680 <add_alarm_under_lock+0x90>)
|
|
10001618: 2167 movs r1, #103 @ 0x67
|
|
1000161a: f000 ff33 bl 10002484 <__assert_func>
|
|
1000161e: 6800 ldr r0, [r0, #0]
|
|
10001620: f7ff fed3 bl 100013ca <ph_new_node>
|
|
10001624: 0004 movs r4, r0
|
|
10001626: 2c00 cmp r4, #0
|
|
10001628: d102 bne.n 10001630 <add_alarm_under_lock+0x40>
|
|
1000162a: 0020 movs r0, r4
|
|
1000162c: b003 add sp, #12
|
|
1000162e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001630: 0021 movs r1, r4
|
|
10001632: 0038 movs r0, r7
|
|
10001634: f7ff fe42 bl 100012bc <get_entry>
|
|
10001638: 9b01 ldr r3, [sp, #4]
|
|
1000163a: 6003 str r3, [r0, #0]
|
|
1000163c: 6045 str r5, [r0, #4]
|
|
1000163e: 9b08 ldr r3, [sp, #32]
|
|
10001640: 6083 str r3, [r0, #8]
|
|
10001642: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10001644: 60c3 str r3, [r0, #12]
|
|
10001646: 6838 ldr r0, [r7, #0]
|
|
10001648: 0021 movs r1, r4
|
|
1000164a: f7ff ff29 bl 100014a0 <ph_insert_node>
|
|
1000164e: 42a0 cmp r0, r4
|
|
10001650: d1eb bne.n 1000162a <add_alarm_under_lock+0x3a>
|
|
10001652: 7d38 ldrb r0, [r7, #20]
|
|
10001654: 9a01 ldr r2, [sp, #4]
|
|
10001656: 002b movs r3, r5
|
|
10001658: f000 fba8 bl 10001dac <hardware_alarm_set_target>
|
|
1000165c: 1e05 subs r5, r0, #0
|
|
1000165e: d001 beq.n 10001664 <add_alarm_under_lock+0x74>
|
|
10001660: 2e00 cmp r6, #0
|
|
10001662: d004 beq.n 1000166e <add_alarm_under_lock+0x7e>
|
|
10001664: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
10001666: 2b00 cmp r3, #0
|
|
10001668: d0df beq.n 1000162a <add_alarm_under_lock+0x3a>
|
|
1000166a: 701d strb r5, [r3, #0]
|
|
1000166c: e7dd b.n 1000162a <add_alarm_under_lock+0x3a>
|
|
1000166e: 6838 ldr r0, [r7, #0]
|
|
10001670: 0021 movs r1, r4
|
|
10001672: f000 fd55 bl 10002120 <ph_remove_and_free_node>
|
|
10001676: e7f5 b.n 10001664 <add_alarm_under_lock+0x74>
|
|
10001678: 100099c0 .word 0x100099c0
|
|
1000167c: 10009b68 .word 0x10009b68
|
|
10001680: 100098bc .word 0x100098bc
|
|
|
|
10001684 <alarm_pool_alarm_callback>:
|
|
10001684: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001686: 46de mov lr, fp
|
|
10001688: 4657 mov r7, sl
|
|
1000168a: 464e mov r6, r9
|
|
1000168c: 4645 mov r5, r8
|
|
1000168e: b5e0 push {r5, r6, r7, lr}
|
|
10001690: b08f sub sp, #60 @ 0x3c
|
|
10001692: 900b str r0, [sp, #44] @ 0x2c
|
|
10001694: 2100 movs r1, #0
|
|
10001696: 4b79 ldr r3, [pc, #484] @ (1000187c <alarm_pool_alarm_callback+0x1f8>)
|
|
10001698: 0082 lsls r2, r0, #2
|
|
1000169a: 58d4 ldr r4, [r2, r3]
|
|
1000169c: 4689 mov r9, r1
|
|
1000169e: e083 b.n 100017a8 <alarm_pool_alarm_callback+0x124>
|
|
100016a0: 0029 movs r1, r5
|
|
100016a2: 0020 movs r0, r4
|
|
100016a4: f7ff fe0a bl 100012bc <get_entry>
|
|
100016a8: 4680 mov r8, r0
|
|
100016aa: 6802 ldr r2, [r0, #0]
|
|
100016ac: 6843 ldr r3, [r0, #4]
|
|
100016ae: 1b92 subs r2, r2, r6
|
|
100016b0: 41bb sbcs r3, r7
|
|
100016b2: 2b00 cmp r3, #0
|
|
100016b4: dd09 ble.n 100016ca <alarm_pool_alarm_callback+0x46>
|
|
100016b6: 4643 mov r3, r8
|
|
100016b8: 681a ldr r2, [r3, #0]
|
|
100016ba: 685b ldr r3, [r3, #4]
|
|
100016bc: 980b ldr r0, [sp, #44] @ 0x2c
|
|
100016be: f000 fb75 bl 10001dac <hardware_alarm_set_target>
|
|
100016c2: 2300 movs r3, #0
|
|
100016c4: 4698 mov r8, r3
|
|
100016c6: 2600 movs r6, #0
|
|
100016c8: e08a b.n 100017e0 <alarm_pool_alarm_callback+0x15c>
|
|
100016ca: 2b00 cmp r3, #0
|
|
100016cc: d101 bne.n 100016d2 <alarm_pool_alarm_callback+0x4e>
|
|
100016ce: 2a00 cmp r2, #0
|
|
100016d0: d1f1 bne.n 100016b6 <alarm_pool_alarm_callback+0x32>
|
|
100016d2: 2100 movs r1, #0
|
|
100016d4: 4658 mov r0, fp
|
|
100016d6: f000 fd19 bl 1000210c <ph_remove_head>
|
|
100016da: 0007 movs r7, r0
|
|
100016dc: 42a8 cmp r0, r5
|
|
100016de: d115 bne.n 1000170c <alarm_pool_alarm_callback+0x88>
|
|
100016e0: 4643 mov r3, r8
|
|
100016e2: 681a ldr r2, [r3, #0]
|
|
100016e4: 685b ldr r3, [r3, #4]
|
|
100016e6: 9208 str r2, [sp, #32]
|
|
100016e8: 9309 str r3, [sp, #36] @ 0x24
|
|
100016ea: 4643 mov r3, r8
|
|
100016ec: 689e ldr r6, [r3, #8]
|
|
100016ee: 68db ldr r3, [r3, #12]
|
|
100016f0: 4698 mov r8, r3
|
|
100016f2: 2e00 cmp r6, #0
|
|
100016f4: d010 beq.n 10001718 <alarm_pool_alarm_callback+0x94>
|
|
100016f6: 0029 movs r1, r5
|
|
100016f8: 0020 movs r0, r4
|
|
100016fa: f7ff ff1d bl 10001538 <get_entry_id_high>
|
|
100016fe: 7803 ldrb r3, [r0, #0]
|
|
10001700: 4699 mov r9, r3
|
|
10001702: 021b lsls r3, r3, #8
|
|
10001704: 431f orrs r7, r3
|
|
10001706: 6127 str r7, [r4, #16]
|
|
10001708: 2000 movs r0, #0
|
|
1000170a: e069 b.n 100017e0 <alarm_pool_alarm_callback+0x15c>
|
|
1000170c: 4b5c ldr r3, [pc, #368] @ (10001880 <alarm_pool_alarm_callback+0x1fc>)
|
|
1000170e: 4a5d ldr r2, [pc, #372] @ (10001884 <alarm_pool_alarm_callback+0x200>)
|
|
10001710: 485d ldr r0, [pc, #372] @ (10001888 <alarm_pool_alarm_callback+0x204>)
|
|
10001712: 218e movs r1, #142 @ 0x8e
|
|
10001714: f000 feb6 bl 10002484 <__assert_func>
|
|
10001718: 4b5c ldr r3, [pc, #368] @ (1000188c <alarm_pool_alarm_callback+0x208>)
|
|
1000171a: 4a5a ldr r2, [pc, #360] @ (10001884 <alarm_pool_alarm_callback+0x200>)
|
|
1000171c: 485a ldr r0, [pc, #360] @ (10001888 <alarm_pool_alarm_callback+0x204>)
|
|
1000171e: 2192 movs r1, #146 @ 0x92
|
|
10001720: f000 feb0 bl 10002484 <__assert_func>
|
|
10001724: 6923 ldr r3, [r4, #16]
|
|
10001726: 2b00 cmp r3, #0
|
|
10001728: d100 bne.n 1000172c <alarm_pool_alarm_callback+0xa8>
|
|
1000172a: e077 b.n 1000181c <alarm_pool_alarm_callback+0x198>
|
|
1000172c: 42bb cmp r3, r7
|
|
1000172e: d119 bne.n 10001764 <alarm_pool_alarm_callback+0xe0>
|
|
10001730: 9806 ldr r0, [sp, #24]
|
|
10001732: 9907 ldr r1, [sp, #28]
|
|
10001734: 2300 movs r3, #0
|
|
10001736: 4242 negs r2, r0
|
|
10001738: 418b sbcs r3, r1
|
|
1000173a: 9200 str r2, [sp, #0]
|
|
1000173c: 9301 str r3, [sp, #4]
|
|
1000173e: 9a08 ldr r2, [sp, #32]
|
|
10001740: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10001742: a80c add r0, sp, #48 @ 0x30
|
|
10001744: f7ff fe00 bl 10001348 <delayed_by_us>
|
|
10001748: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
1000174a: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000174c: 2100 movs r1, #0
|
|
1000174e: 9104 str r1, [sp, #16]
|
|
10001750: 3101 adds r1, #1
|
|
10001752: 9103 str r1, [sp, #12]
|
|
10001754: 9502 str r5, [sp, #8]
|
|
10001756: 4641 mov r1, r8
|
|
10001758: 9101 str r1, [sp, #4]
|
|
1000175a: 9600 str r6, [sp, #0]
|
|
1000175c: 0020 movs r0, r4
|
|
1000175e: f7ff ff47 bl 100015f0 <add_alarm_under_lock>
|
|
10001762: e016 b.n 10001792 <alarm_pool_alarm_callback+0x10e>
|
|
10001764: 4b4a ldr r3, [pc, #296] @ (10001890 <alarm_pool_alarm_callback+0x20c>)
|
|
10001766: 4a47 ldr r2, [pc, #284] @ (10001884 <alarm_pool_alarm_callback+0x200>)
|
|
10001768: 4847 ldr r0, [pc, #284] @ (10001888 <alarm_pool_alarm_callback+0x204>)
|
|
1000176a: 21a1 movs r1, #161 @ 0xa1
|
|
1000176c: f000 fe8a bl 10002484 <__assert_func>
|
|
10001770: 9a06 ldr r2, [sp, #24]
|
|
10001772: 9b07 ldr r3, [sp, #28]
|
|
10001774: 2b00 cmp r3, #0
|
|
10001776: d101 bne.n 1000177c <alarm_pool_alarm_callback+0xf8>
|
|
10001778: 2a00 cmp r2, #0
|
|
1000177a: d152 bne.n 10001822 <alarm_pool_alarm_callback+0x19e>
|
|
1000177c: 6820 ldr r0, [r4, #0]
|
|
1000177e: 0029 movs r1, r5
|
|
10001780: f7ff feac bl 100014dc <ph_free_node>
|
|
10001784: 0029 movs r1, r5
|
|
10001786: 0020 movs r0, r4
|
|
10001788: f7ff fed6 bl 10001538 <get_entry_id_high>
|
|
1000178c: 7803 ldrb r3, [r0, #0]
|
|
1000178e: 3301 adds r3, #1
|
|
10001790: 7003 strb r3, [r0, #0]
|
|
10001792: 2300 movs r3, #0
|
|
10001794: 6123 str r3, [r4, #16]
|
|
10001796: 6862 ldr r2, [r4, #4]
|
|
10001798: f3bf 8f5f dmb sy
|
|
1000179c: 6013 str r3, [r2, #0]
|
|
1000179e: f38a 8810 msr PRIMASK, sl
|
|
100017a2: 2001 movs r0, #1
|
|
100017a4: 2800 cmp r0, #0
|
|
100017a6: d061 beq.n 1000186c <alarm_pool_alarm_callback+0x1e8>
|
|
100017a8: a80c add r0, sp, #48 @ 0x30
|
|
100017aa: f7ff fefd bl 100015a8 <get_absolute_time>
|
|
100017ae: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
100017b0: 9f0d ldr r7, [sp, #52] @ 0x34
|
|
100017b2: 2200 movs r2, #0
|
|
100017b4: 2300 movs r3, #0
|
|
100017b6: 9208 str r2, [sp, #32]
|
|
100017b8: 9309 str r3, [sp, #36] @ 0x24
|
|
100017ba: 6862 ldr r2, [r4, #4]
|
|
100017bc: f3ef 8a10 mrs sl, PRIMASK
|
|
100017c0: b672 cpsid i
|
|
100017c2: 6813 ldr r3, [r2, #0]
|
|
100017c4: 2b00 cmp r3, #0
|
|
100017c6: d0fc beq.n 100017c2 <alarm_pool_alarm_callback+0x13e>
|
|
100017c8: f3bf 8f5f dmb sy
|
|
100017cc: 6823 ldr r3, [r4, #0]
|
|
100017ce: 469b mov fp, r3
|
|
100017d0: 7b5d ldrb r5, [r3, #13]
|
|
100017d2: 2d00 cmp r5, #0
|
|
100017d4: d000 beq.n 100017d8 <alarm_pool_alarm_callback+0x154>
|
|
100017d6: e763 b.n 100016a0 <alarm_pool_alarm_callback+0x1c>
|
|
100017d8: 2300 movs r3, #0
|
|
100017da: 4698 mov r8, r3
|
|
100017dc: 2600 movs r6, #0
|
|
100017de: 2000 movs r0, #0
|
|
100017e0: 6863 ldr r3, [r4, #4]
|
|
100017e2: f3bf 8f5f dmb sy
|
|
100017e6: 2200 movs r2, #0
|
|
100017e8: 601a str r2, [r3, #0]
|
|
100017ea: f38a 8810 msr PRIMASK, sl
|
|
100017ee: 2e00 cmp r6, #0
|
|
100017f0: d0d8 beq.n 100017a4 <alarm_pool_alarm_callback+0x120>
|
|
100017f2: 464b mov r3, r9
|
|
100017f4: 021f lsls r7, r3, #8
|
|
100017f6: 432f orrs r7, r5
|
|
100017f8: 4641 mov r1, r8
|
|
100017fa: 0038 movs r0, r7
|
|
100017fc: 47b0 blx r6
|
|
100017fe: 9006 str r0, [sp, #24]
|
|
10001800: 9107 str r1, [sp, #28]
|
|
10001802: 6862 ldr r2, [r4, #4]
|
|
10001804: f3ef 8a10 mrs sl, PRIMASK
|
|
10001808: b672 cpsid i
|
|
1000180a: 6813 ldr r3, [r2, #0]
|
|
1000180c: 2b00 cmp r3, #0
|
|
1000180e: d0fc beq.n 1000180a <alarm_pool_alarm_callback+0x186>
|
|
10001810: f3bf 8f5f dmb sy
|
|
10001814: 9b07 ldr r3, [sp, #28]
|
|
10001816: 2b00 cmp r3, #0
|
|
10001818: da00 bge.n 1000181c <alarm_pool_alarm_callback+0x198>
|
|
1000181a: e783 b.n 10001724 <alarm_pool_alarm_callback+0xa0>
|
|
1000181c: 9b07 ldr r3, [sp, #28]
|
|
1000181e: 2b00 cmp r3, #0
|
|
10001820: dda6 ble.n 10001770 <alarm_pool_alarm_callback+0xec>
|
|
10001822: 6923 ldr r3, [r4, #16]
|
|
10001824: 2b00 cmp r3, #0
|
|
10001826: d0a9 beq.n 1000177c <alarm_pool_alarm_callback+0xf8>
|
|
10001828: 42bb cmp r3, r7
|
|
1000182a: d119 bne.n 10001860 <alarm_pool_alarm_callback+0x1dc>
|
|
1000182c: a80c add r0, sp, #48 @ 0x30
|
|
1000182e: f7ff febb bl 100015a8 <get_absolute_time>
|
|
10001832: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10001834: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10001836: 9806 ldr r0, [sp, #24]
|
|
10001838: 9907 ldr r1, [sp, #28]
|
|
1000183a: 9000 str r0, [sp, #0]
|
|
1000183c: 9101 str r1, [sp, #4]
|
|
1000183e: a80c add r0, sp, #48 @ 0x30
|
|
10001840: f7ff fd82 bl 10001348 <delayed_by_us>
|
|
10001844: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10001846: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10001848: 2100 movs r1, #0
|
|
1000184a: 9104 str r1, [sp, #16]
|
|
1000184c: 3101 adds r1, #1
|
|
1000184e: 9103 str r1, [sp, #12]
|
|
10001850: 9502 str r5, [sp, #8]
|
|
10001852: 4641 mov r1, r8
|
|
10001854: 9101 str r1, [sp, #4]
|
|
10001856: 9600 str r6, [sp, #0]
|
|
10001858: 0020 movs r0, r4
|
|
1000185a: f7ff fec9 bl 100015f0 <add_alarm_under_lock>
|
|
1000185e: e798 b.n 10001792 <alarm_pool_alarm_callback+0x10e>
|
|
10001860: 4b0b ldr r3, [pc, #44] @ (10001890 <alarm_pool_alarm_callback+0x20c>)
|
|
10001862: 4a08 ldr r2, [pc, #32] @ (10001884 <alarm_pool_alarm_callback+0x200>)
|
|
10001864: 4808 ldr r0, [pc, #32] @ (10001888 <alarm_pool_alarm_callback+0x204>)
|
|
10001866: 21a4 movs r1, #164 @ 0xa4
|
|
10001868: f000 fe0c bl 10002484 <__assert_func>
|
|
1000186c: b00f add sp, #60 @ 0x3c
|
|
1000186e: bcf0 pop {r4, r5, r6, r7}
|
|
10001870: 46bb mov fp, r7
|
|
10001872: 46b2 mov sl, r6
|
|
10001874: 46a9 mov r9, r5
|
|
10001876: 46a0 mov r8, r4
|
|
10001878: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000187a: 46c0 nop @ (mov r8, r8)
|
|
1000187c: 20001728 .word 0x20001728
|
|
10001880: 100099e8 .word 0x100099e8
|
|
10001884: 10009b98 .word 0x10009b98
|
|
10001888: 100098bc .word 0x100098bc
|
|
1000188c: 10009a00 .word 0x10009a00
|
|
10001890: 10009a0c .word 0x10009a0c
|
|
|
|
10001894 <sleep_until_callback>:
|
|
10001894: b510 push {r4, lr}
|
|
10001896: 4b08 ldr r3, [pc, #32] @ (100018b8 <sleep_until_callback+0x24>)
|
|
10001898: 681a ldr r2, [r3, #0]
|
|
1000189a: f3ef 8110 mrs r1, PRIMASK
|
|
1000189e: b672 cpsid i
|
|
100018a0: 6813 ldr r3, [r2, #0]
|
|
100018a2: 2b00 cmp r3, #0
|
|
100018a4: d0fc beq.n 100018a0 <sleep_until_callback+0xc>
|
|
100018a6: f3bf 8f5f dmb sy
|
|
100018aa: 4803 ldr r0, [pc, #12] @ (100018b8 <sleep_until_callback+0x24>)
|
|
100018ac: f005 fbb2 bl 10007014 <vPortLockInternalSpinUnlockWithNotify>
|
|
100018b0: 2000 movs r0, #0
|
|
100018b2: 2100 movs r1, #0
|
|
100018b4: bd10 pop {r4, pc}
|
|
100018b6: 46c0 nop @ (mov r8, r8)
|
|
100018b8: 20001be0 .word 0x20001be0
|
|
|
|
100018bc <alarm_pool_init_default>:
|
|
100018bc: b510 push {r4, lr}
|
|
100018be: 4b0c ldr r3, [pc, #48] @ (100018f0 <alarm_pool_init_default+0x34>)
|
|
100018c0: 685b ldr r3, [r3, #4]
|
|
100018c2: 2b00 cmp r3, #0
|
|
100018c4: d004 beq.n 100018d0 <alarm_pool_init_default+0x14>
|
|
100018c6: 480b ldr r0, [pc, #44] @ (100018f4 <alarm_pool_init_default+0x38>)
|
|
100018c8: 210a movs r1, #10
|
|
100018ca: f7ff fc53 bl 10001174 <lock_init>
|
|
100018ce: bd10 pop {r4, pc}
|
|
100018d0: 4c07 ldr r4, [pc, #28] @ (100018f0 <alarm_pool_init_default+0x34>)
|
|
100018d2: 4a09 ldr r2, [pc, #36] @ (100018f8 <alarm_pool_init_default+0x3c>)
|
|
100018d4: 6820 ldr r0, [r4, #0]
|
|
100018d6: 0023 movs r3, r4
|
|
100018d8: 2110 movs r1, #16
|
|
100018da: f000 fb82 bl 10001fe2 <ph_post_alloc_init>
|
|
100018de: 2003 movs r0, #3
|
|
100018e0: f000 f9f0 bl 10001cc4 <hardware_alarm_claim>
|
|
100018e4: 2103 movs r1, #3
|
|
100018e6: 0020 movs r0, r4
|
|
100018e8: f7ff fe3e bl 10001568 <alarm_pool_post_alloc_init>
|
|
100018ec: e7eb b.n 100018c6 <alarm_pool_init_default+0xa>
|
|
100018ee: 46c0 nop @ (mov r8, r8)
|
|
100018f0: 20000b34 .word 0x20000b34
|
|
100018f4: 20001be0 .word 0x20001be0
|
|
100018f8: 100012f5 .word 0x100012f5
|
|
|
|
100018fc <alarm_pool_get_default>:
|
|
100018fc: b510 push {r4, lr}
|
|
100018fe: 4b06 ldr r3, [pc, #24] @ (10001918 <alarm_pool_get_default+0x1c>)
|
|
10001900: 685b ldr r3, [r3, #4]
|
|
10001902: 2b00 cmp r3, #0
|
|
10001904: d001 beq.n 1000190a <alarm_pool_get_default+0xe>
|
|
10001906: 4804 ldr r0, [pc, #16] @ (10001918 <alarm_pool_get_default+0x1c>)
|
|
10001908: bd10 pop {r4, pc}
|
|
1000190a: 4b04 ldr r3, [pc, #16] @ (1000191c <alarm_pool_get_default+0x20>)
|
|
1000190c: 4a04 ldr r2, [pc, #16] @ (10001920 <alarm_pool_get_default+0x24>)
|
|
1000190e: 4805 ldr r0, [pc, #20] @ (10001924 <alarm_pool_get_default+0x28>)
|
|
10001910: 215e movs r1, #94 @ 0x5e
|
|
10001912: f000 fdb7 bl 10002484 <__assert_func>
|
|
10001916: 46c0 nop @ (mov r8, r8)
|
|
10001918: 20000b34 .word 0x20000b34
|
|
1000191c: 10009a48 .word 0x10009a48
|
|
10001920: 10009afc .word 0x10009afc
|
|
10001924: 100098bc .word 0x100098bc
|
|
|
|
10001928 <alarm_pool_add_alarm_at>:
|
|
10001928: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000192a: 46de mov lr, fp
|
|
1000192c: 4657 mov r7, sl
|
|
1000192e: 464e mov r6, r9
|
|
10001930: 4645 mov r5, r8
|
|
10001932: b5e0 push {r5, r6, r7, lr}
|
|
10001934: b08d sub sp, #52 @ 0x34
|
|
10001936: 0006 movs r6, r0
|
|
10001938: 4690 mov r8, r2
|
|
1000193a: 001f movs r7, r3
|
|
1000193c: 9b16 ldr r3, [sp, #88] @ 0x58
|
|
1000193e: 469a mov sl, r3
|
|
10001940: 9b17 ldr r3, [sp, #92] @ 0x5c
|
|
10001942: 4699 mov r9, r3
|
|
10001944: ab18 add r3, sp, #96 @ 0x60
|
|
10001946: 781b ldrb r3, [r3, #0]
|
|
10001948: 9307 str r3, [sp, #28]
|
|
1000194a: 2327 movs r3, #39 @ 0x27
|
|
1000194c: aa02 add r2, sp, #8
|
|
1000194e: 4694 mov ip, r2
|
|
10001950: 4463 add r3, ip
|
|
10001952: 2200 movs r2, #0
|
|
10001954: 701a strb r2, [r3, #0]
|
|
10001956: e021 b.n 1000199c <alarm_pool_add_alarm_at+0x74>
|
|
10001958: 0001 movs r1, r0
|
|
1000195a: 0030 movs r0, r6
|
|
1000195c: f7ff fdec bl 10001538 <get_entry_id_high>
|
|
10001960: 7800 ldrb r0, [r0, #0]
|
|
10001962: e03c b.n 100019de <alarm_pool_add_alarm_at+0xb6>
|
|
10001964: 9806 ldr r0, [sp, #24]
|
|
10001966: 2b00 cmp r3, #0
|
|
10001968: d05c beq.n 10001a24 <alarm_pool_add_alarm_at+0xfc>
|
|
1000196a: 9b07 ldr r3, [sp, #28]
|
|
1000196c: 2b00 cmp r3, #0
|
|
1000196e: d059 beq.n 10001a24 <alarm_pool_add_alarm_at+0xfc>
|
|
10001970: 4649 mov r1, r9
|
|
10001972: 47d0 blx sl
|
|
10001974: 0004 movs r4, r0
|
|
10001976: 000d movs r5, r1
|
|
10001978: 0003 movs r3, r0
|
|
1000197a: 430b orrs r3, r1
|
|
1000197c: d059 beq.n 10001a32 <alarm_pool_add_alarm_at+0x10a>
|
|
1000197e: 2900 cmp r1, #0
|
|
10001980: db40 blt.n 10001a04 <alarm_pool_add_alarm_at+0xdc>
|
|
10001982: a808 add r0, sp, #32
|
|
10001984: f7ff fe10 bl 100015a8 <get_absolute_time>
|
|
10001988: 9a08 ldr r2, [sp, #32]
|
|
1000198a: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
1000198c: 9400 str r4, [sp, #0]
|
|
1000198e: 9501 str r5, [sp, #4]
|
|
10001990: a808 add r0, sp, #32
|
|
10001992: f7ff fcd9 bl 10001348 <delayed_by_us>
|
|
10001996: 9b08 ldr r3, [sp, #32]
|
|
10001998: 4698 mov r8, r3
|
|
1000199a: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
1000199c: 6872 ldr r2, [r6, #4]
|
|
1000199e: f3ef 8b10 mrs fp, PRIMASK
|
|
100019a2: b672 cpsid i
|
|
100019a4: 6813 ldr r3, [r2, #0]
|
|
100019a6: 4259 negs r1, r3
|
|
100019a8: 414b adcs r3, r1
|
|
100019aa: b2d9 uxtb r1, r3
|
|
100019ac: 9106 str r1, [sp, #24]
|
|
100019ae: 2b00 cmp r3, #0
|
|
100019b0: d1f8 bne.n 100019a4 <alarm_pool_add_alarm_at+0x7c>
|
|
100019b2: f3bf 8f5f dmb sy
|
|
100019b6: 3327 adds r3, #39 @ 0x27
|
|
100019b8: aa02 add r2, sp, #8
|
|
100019ba: 4694 mov ip, r2
|
|
100019bc: 4463 add r3, ip
|
|
100019be: 9304 str r3, [sp, #16]
|
|
100019c0: 2300 movs r3, #0
|
|
100019c2: 9303 str r3, [sp, #12]
|
|
100019c4: 9302 str r3, [sp, #8]
|
|
100019c6: 464b mov r3, r9
|
|
100019c8: 9301 str r3, [sp, #4]
|
|
100019ca: 4653 mov r3, sl
|
|
100019cc: 9300 str r3, [sp, #0]
|
|
100019ce: 4642 mov r2, r8
|
|
100019d0: 003b movs r3, r7
|
|
100019d2: 0030 movs r0, r6
|
|
100019d4: f7ff fe0c bl 100015f0 <add_alarm_under_lock>
|
|
100019d8: 0004 movs r4, r0
|
|
100019da: 1e05 subs r5, r0, #0
|
|
100019dc: d1bc bne.n 10001958 <alarm_pool_add_alarm_at+0x30>
|
|
100019de: 6873 ldr r3, [r6, #4]
|
|
100019e0: f3bf 8f5f dmb sy
|
|
100019e4: 2100 movs r1, #0
|
|
100019e6: 6019 str r1, [r3, #0]
|
|
100019e8: f38b 8810 msr PRIMASK, fp
|
|
100019ec: 2d00 cmp r5, #0
|
|
100019ee: d017 beq.n 10001a20 <alarm_pool_add_alarm_at+0xf8>
|
|
100019f0: 2327 movs r3, #39 @ 0x27
|
|
100019f2: aa02 add r2, sp, #8
|
|
100019f4: 4694 mov ip, r2
|
|
100019f6: 4463 add r3, ip
|
|
100019f8: 781b ldrb r3, [r3, #0]
|
|
100019fa: 2b00 cmp r3, #0
|
|
100019fc: d1b2 bne.n 10001964 <alarm_pool_add_alarm_at+0x3c>
|
|
100019fe: 0200 lsls r0, r0, #8
|
|
10001a00: 4320 orrs r0, r4
|
|
10001a02: e7b0 b.n 10001966 <alarm_pool_add_alarm_at+0x3e>
|
|
10001a04: 2300 movs r3, #0
|
|
10001a06: 4262 negs r2, r4
|
|
10001a08: 41ab sbcs r3, r5
|
|
10001a0a: 9200 str r2, [sp, #0]
|
|
10001a0c: 9301 str r3, [sp, #4]
|
|
10001a0e: 4642 mov r2, r8
|
|
10001a10: 003b movs r3, r7
|
|
10001a12: a808 add r0, sp, #32
|
|
10001a14: f7ff fc98 bl 10001348 <delayed_by_us>
|
|
10001a18: 9b08 ldr r3, [sp, #32]
|
|
10001a1a: 4698 mov r8, r3
|
|
10001a1c: 9f09 ldr r7, [sp, #36] @ 0x24
|
|
10001a1e: e7bd b.n 1000199c <alarm_pool_add_alarm_at+0x74>
|
|
10001a20: 2001 movs r0, #1
|
|
10001a22: 4240 negs r0, r0
|
|
10001a24: b00d add sp, #52 @ 0x34
|
|
10001a26: bcf0 pop {r4, r5, r6, r7}
|
|
10001a28: 46bb mov fp, r7
|
|
10001a2a: 46b2 mov sl, r6
|
|
10001a2c: 46a9 mov r9, r5
|
|
10001a2e: 46a0 mov r8, r4
|
|
10001a30: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001a32: 9806 ldr r0, [sp, #24]
|
|
10001a34: e7f6 b.n 10001a24 <alarm_pool_add_alarm_at+0xfc>
|
|
|
|
10001a36 <add_alarm_at>:
|
|
10001a36: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001a38: 46c6 mov lr, r8
|
|
10001a3a: b500 push {lr}
|
|
10001a3c: b084 sub sp, #16
|
|
10001a3e: 0005 movs r5, r0
|
|
10001a40: 4688 mov r8, r1
|
|
10001a42: 0016 movs r6, r2
|
|
10001a44: 001f movs r7, r3
|
|
10001a46: ab0a add r3, sp, #40 @ 0x28
|
|
10001a48: 781c ldrb r4, [r3, #0]
|
|
10001a4a: f7ff ff57 bl 100018fc <alarm_pool_get_default>
|
|
10001a4e: 9402 str r4, [sp, #8]
|
|
10001a50: 9701 str r7, [sp, #4]
|
|
10001a52: 9600 str r6, [sp, #0]
|
|
10001a54: 002a movs r2, r5
|
|
10001a56: 4643 mov r3, r8
|
|
10001a58: f7ff ff66 bl 10001928 <alarm_pool_add_alarm_at>
|
|
10001a5c: b004 add sp, #16
|
|
10001a5e: bc80 pop {r7}
|
|
10001a60: 46b8 mov r8, r7
|
|
10001a62: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10001a64 <alarm_pool_cancel_alarm>:
|
|
10001a64: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001a66: 46c6 mov lr, r8
|
|
10001a68: b500 push {lr}
|
|
10001a6a: 0005 movs r5, r0
|
|
10001a6c: 1e0c subs r4, r1, #0
|
|
10001a6e: d042 beq.n 10001af6 <alarm_pool_cancel_alarm+0x92>
|
|
10001a70: 6842 ldr r2, [r0, #4]
|
|
10001a72: f3ef 8710 mrs r7, PRIMASK
|
|
10001a76: b672 cpsid i
|
|
10001a78: 6813 ldr r3, [r2, #0]
|
|
10001a7a: 2b00 cmp r3, #0
|
|
10001a7c: d0fc beq.n 10001a78 <alarm_pool_cancel_alarm+0x14>
|
|
10001a7e: f3bf 8f5f dmb sy
|
|
10001a82: b2e6 uxtb r6, r4
|
|
10001a84: 682b ldr r3, [r5, #0]
|
|
10001a86: 4698 mov r8, r3
|
|
10001a88: 0031 movs r1, r6
|
|
10001a8a: 0018 movs r0, r3
|
|
10001a8c: f7ff fc8e bl 100013ac <ph_contains_node>
|
|
10001a90: 2800 cmp r0, #0
|
|
10001a92: d02a beq.n 10001aea <alarm_pool_cancel_alarm+0x86>
|
|
10001a94: 692b ldr r3, [r5, #16]
|
|
10001a96: 42a3 cmp r3, r4
|
|
10001a98: d013 beq.n 10001ac2 <alarm_pool_cancel_alarm+0x5e>
|
|
10001a9a: 0a24 lsrs r4, r4, #8
|
|
10001a9c: b2e4 uxtb r4, r4
|
|
10001a9e: 0031 movs r1, r6
|
|
10001aa0: 0028 movs r0, r5
|
|
10001aa2: f7ff fd49 bl 10001538 <get_entry_id_high>
|
|
10001aa6: 7803 ldrb r3, [r0, #0]
|
|
10001aa8: 42a3 cmp r3, r4
|
|
10001aaa: d011 beq.n 10001ad0 <alarm_pool_cancel_alarm+0x6c>
|
|
10001aac: 2000 movs r0, #0
|
|
10001aae: 686b ldr r3, [r5, #4]
|
|
10001ab0: f3bf 8f5f dmb sy
|
|
10001ab4: 2200 movs r2, #0
|
|
10001ab6: 601a str r2, [r3, #0]
|
|
10001ab8: f387 8810 msr PRIMASK, r7
|
|
10001abc: bc80 pop {r7}
|
|
10001abe: 46b8 mov r8, r7
|
|
10001ac0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001ac2: 4b0e ldr r3, [pc, #56] @ (10001afc <alarm_pool_cancel_alarm+0x98>)
|
|
10001ac4: 4a0e ldr r2, [pc, #56] @ (10001b00 <alarm_pool_cancel_alarm+0x9c>)
|
|
10001ac6: 212c movs r1, #44 @ 0x2c
|
|
10001ac8: 480e ldr r0, [pc, #56] @ (10001b04 <alarm_pool_cancel_alarm+0xa0>)
|
|
10001aca: 31ff adds r1, #255 @ 0xff
|
|
10001acc: f000 fcda bl 10002484 <__assert_func>
|
|
10001ad0: 0031 movs r1, r6
|
|
10001ad2: 4640 mov r0, r8
|
|
10001ad4: f000 fb24 bl 10002120 <ph_remove_and_free_node>
|
|
10001ad8: 2800 cmp r0, #0
|
|
10001ada: d1e8 bne.n 10001aae <alarm_pool_cancel_alarm+0x4a>
|
|
10001adc: 4b0a ldr r3, [pc, #40] @ (10001b08 <alarm_pool_cancel_alarm+0xa4>)
|
|
10001ade: 4a08 ldr r2, [pc, #32] @ (10001b00 <alarm_pool_cancel_alarm+0x9c>)
|
|
10001ae0: 2199 movs r1, #153 @ 0x99
|
|
10001ae2: 4808 ldr r0, [pc, #32] @ (10001b04 <alarm_pool_cancel_alarm+0xa0>)
|
|
10001ae4: 0049 lsls r1, r1, #1
|
|
10001ae6: f000 fccd bl 10002484 <__assert_func>
|
|
10001aea: 692b ldr r3, [r5, #16]
|
|
10001aec: 42a3 cmp r3, r4
|
|
10001aee: d1de bne.n 10001aae <alarm_pool_cancel_alarm+0x4a>
|
|
10001af0: 2300 movs r3, #0
|
|
10001af2: 612b str r3, [r5, #16]
|
|
10001af4: e7db b.n 10001aae <alarm_pool_cancel_alarm+0x4a>
|
|
10001af6: 2000 movs r0, #0
|
|
10001af8: e7e0 b.n 10001abc <alarm_pool_cancel_alarm+0x58>
|
|
10001afa: 46c0 nop @ (mov r8, r8)
|
|
10001afc: 10009a6c .word 0x10009a6c
|
|
10001b00: 10009ae4 .word 0x10009ae4
|
|
10001b04: 100098bc .word 0x100098bc
|
|
10001b08: 10009a90 .word 0x10009a90
|
|
|
|
10001b0c <cancel_alarm>:
|
|
10001b0c: b510 push {r4, lr}
|
|
10001b0e: 0004 movs r4, r0
|
|
10001b10: f7ff fef4 bl 100018fc <alarm_pool_get_default>
|
|
10001b14: 0021 movs r1, r4
|
|
10001b16: f7ff ffa5 bl 10001a64 <alarm_pool_cancel_alarm>
|
|
10001b1a: bd10 pop {r4, pc}
|
|
|
|
10001b1c <alarm_pool_core_num>:
|
|
10001b1c: 7d40 ldrb r0, [r0, #21]
|
|
10001b1e: 4770 bx lr
|
|
|
|
10001b20 <sleep_until>:
|
|
10001b20: b530 push {r4, r5, lr}
|
|
10001b22: b087 sub sp, #28
|
|
10001b24: 0004 movs r4, r0
|
|
10001b26: 000d movs r5, r1
|
|
10001b28: f3ef 8305 mrs r3, IPSR
|
|
10001b2c: 2b00 cmp r3, #0
|
|
10001b2e: d120 bne.n 10001b72 <sleep_until+0x52>
|
|
10001b30: 2296 movs r2, #150 @ 0x96
|
|
10001b32: 4252 negs r2, r2
|
|
10001b34: 17d3 asrs r3, r2, #31
|
|
10001b36: 1912 adds r2, r2, r4
|
|
10001b38: 416b adcs r3, r5
|
|
10001b3a: 428b cmp r3, r1
|
|
10001b3c: d802 bhi.n 10001b44 <sleep_until+0x24>
|
|
10001b3e: d103 bne.n 10001b48 <sleep_until+0x28>
|
|
10001b40: 4282 cmp r2, r0
|
|
10001b42: d901 bls.n 10001b48 <sleep_until+0x28>
|
|
10001b44: 2200 movs r2, #0
|
|
10001b46: 2300 movs r3, #0
|
|
10001b48: a804 add r0, sp, #16
|
|
10001b4a: f7ff fbeb bl 10001324 <update_us_since_boot>
|
|
10001b4e: a802 add r0, sp, #8
|
|
10001b50: f7ff fd2a bl 100015a8 <get_absolute_time>
|
|
10001b54: 9802 ldr r0, [sp, #8]
|
|
10001b56: 9903 ldr r1, [sp, #12]
|
|
10001b58: 9a04 ldr r2, [sp, #16]
|
|
10001b5a: 9b05 ldr r3, [sp, #20]
|
|
10001b5c: 1a12 subs r2, r2, r0
|
|
10001b5e: 418b sbcs r3, r1
|
|
10001b60: 2b00 cmp r3, #0
|
|
10001b62: dc0b bgt.n 10001b7c <sleep_until+0x5c>
|
|
10001b64: d008 beq.n 10001b78 <sleep_until+0x58>
|
|
10001b66: 0020 movs r0, r4
|
|
10001b68: 0029 movs r1, r5
|
|
10001b6a: f000 f8c3 bl 10001cf4 <busy_wait_until>
|
|
10001b6e: b007 add sp, #28
|
|
10001b70: bd30 pop {r4, r5, pc}
|
|
10001b72: 4811 ldr r0, [pc, #68] @ (10001bb8 <sleep_until+0x98>)
|
|
10001b74: f000 fd1e bl 100025b4 <panic>
|
|
10001b78: 2a00 cmp r2, #0
|
|
10001b7a: d0f4 beq.n 10001b66 <sleep_until+0x46>
|
|
10001b7c: 4a0f ldr r2, [pc, #60] @ (10001bbc <sleep_until+0x9c>)
|
|
10001b7e: 9804 ldr r0, [sp, #16]
|
|
10001b80: 9905 ldr r1, [sp, #20]
|
|
10001b82: 2300 movs r3, #0
|
|
10001b84: 9300 str r3, [sp, #0]
|
|
10001b86: f7ff ff56 bl 10001a36 <add_alarm_at>
|
|
10001b8a: 2800 cmp r0, #0
|
|
10001b8c: da0d bge.n 10001baa <sleep_until+0x8a>
|
|
10001b8e: e7ea b.n 10001b66 <sleep_until+0x46>
|
|
10001b90: 4b0b ldr r3, [pc, #44] @ (10001bc0 <sleep_until+0xa0>)
|
|
10001b92: 681a ldr r2, [r3, #0]
|
|
10001b94: f3ef 8110 mrs r1, PRIMASK
|
|
10001b98: b672 cpsid i
|
|
10001b9a: 6813 ldr r3, [r2, #0]
|
|
10001b9c: 2b00 cmp r3, #0
|
|
10001b9e: d0fc beq.n 10001b9a <sleep_until+0x7a>
|
|
10001ba0: f3bf 8f5f dmb sy
|
|
10001ba4: 4806 ldr r0, [pc, #24] @ (10001bc0 <sleep_until+0xa0>)
|
|
10001ba6: f005 f9d3 bl 10006f50 <vPortLockInternalSpinUnlockWithWait>
|
|
10001baa: 9804 ldr r0, [sp, #16]
|
|
10001bac: 9905 ldr r1, [sp, #20]
|
|
10001bae: f7ff fb71 bl 10001294 <time_reached>
|
|
10001bb2: 2800 cmp r0, #0
|
|
10001bb4: d0ec beq.n 10001b90 <sleep_until+0x70>
|
|
10001bb6: e7d6 b.n 10001b66 <sleep_until+0x46>
|
|
10001bb8: 10009a94 .word 0x10009a94
|
|
10001bbc: 10001895 .word 0x10001895
|
|
10001bc0: 20001be0 .word 0x20001be0
|
|
|
|
10001bc4 <sleep_us>:
|
|
10001bc4: b500 push {lr}
|
|
10001bc6: b083 sub sp, #12
|
|
10001bc8: 0002 movs r2, r0
|
|
10001bca: 000b movs r3, r1
|
|
10001bcc: 4668 mov r0, sp
|
|
10001bce: f7ff fcfc bl 100015ca <make_timeout_time_us>
|
|
10001bd2: 9800 ldr r0, [sp, #0]
|
|
10001bd4: 9901 ldr r1, [sp, #4]
|
|
10001bd6: f7ff ffa3 bl 10001b20 <sleep_until>
|
|
10001bda: b003 add sp, #12
|
|
10001bdc: bd00 pop {pc}
|
|
|
|
10001bde <sleep_ms>:
|
|
10001bde: b510 push {r4, lr}
|
|
10001be0: 22fa movs r2, #250 @ 0xfa
|
|
10001be2: 0092 lsls r2, r2, #2
|
|
10001be4: 2300 movs r3, #0
|
|
10001be6: 2100 movs r1, #0
|
|
10001be8: f002 f9a0 bl 10003f2c <__wrap___aeabi_lmul>
|
|
10001bec: f7ff ffea bl 10001bc4 <sleep_us>
|
|
10001bf0: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10001bf4 <best_effort_wfe_or_timeout>:
|
|
10001bf4: b530 push {r4, r5, lr}
|
|
10001bf6: b083 sub sp, #12
|
|
10001bf8: 0005 movs r5, r0
|
|
10001bfa: 000c movs r4, r1
|
|
10001bfc: f3ef 8305 mrs r3, IPSR
|
|
10001c00: 2b00 cmp r3, #0
|
|
10001c02: d10f bne.n 10001c24 <best_effort_wfe_or_timeout+0x30>
|
|
10001c04: 4a0b ldr r2, [pc, #44] @ (10001c34 <best_effort_wfe_or_timeout+0x40>)
|
|
10001c06: 2300 movs r3, #0
|
|
10001c08: 9300 str r3, [sp, #0]
|
|
10001c0a: f7ff ff14 bl 10001a36 <add_alarm_at>
|
|
10001c0e: 2800 cmp r0, #0
|
|
10001c10: dd0b ble.n 10001c2a <best_effort_wfe_or_timeout+0x36>
|
|
10001c12: bf20 wfe
|
|
10001c14: f7ff ff7a bl 10001b0c <cancel_alarm>
|
|
10001c18: 0028 movs r0, r5
|
|
10001c1a: 0021 movs r1, r4
|
|
10001c1c: f7ff fb3a bl 10001294 <time_reached>
|
|
10001c20: b003 add sp, #12
|
|
10001c22: bd30 pop {r4, r5, pc}
|
|
10001c24: f7ff fb36 bl 10001294 <time_reached>
|
|
10001c28: e7fa b.n 10001c20 <best_effort_wfe_or_timeout+0x2c>
|
|
10001c2a: 0028 movs r0, r5
|
|
10001c2c: 0021 movs r1, r4
|
|
10001c2e: f7ff fb31 bl 10001294 <time_reached>
|
|
10001c32: e7f5 b.n 10001c20 <best_effort_wfe_or_timeout+0x2c>
|
|
10001c34: 10001895 .word 0x10001895
|
|
|
|
10001c38 <hardware_alarm_irq_handler>:
|
|
10001c38: b570 push {r4, r5, r6, lr}
|
|
10001c3a: f3ef 8005 mrs r0, IPSR
|
|
10001c3e: 3810 subs r0, #16
|
|
10001c40: f3ef 8c10 mrs ip, PRIMASK
|
|
10001c44: b672 cpsid i
|
|
10001c46: 4b19 ldr r3, [pc, #100] @ (10001cac <hardware_alarm_irq_handler+0x74>)
|
|
10001c48: 681b ldr r3, [r3, #0]
|
|
10001c4a: 2b00 cmp r3, #0
|
|
10001c4c: d0fb beq.n 10001c46 <hardware_alarm_irq_handler+0xe>
|
|
10001c4e: f3bf 8f5f dmb sy
|
|
10001c52: 2201 movs r2, #1
|
|
10001c54: 0013 movs r3, r2
|
|
10001c56: 4083 lsls r3, r0
|
|
10001c58: 4915 ldr r1, [pc, #84] @ (10001cb0 <hardware_alarm_irq_handler+0x78>)
|
|
10001c5a: 634b str r3, [r1, #52] @ 0x34
|
|
10001c5c: 4915 ldr r1, [pc, #84] @ (10001cb4 <hardware_alarm_irq_handler+0x7c>)
|
|
10001c5e: 600b str r3, [r1, #0]
|
|
10001c60: 4915 ldr r1, [pc, #84] @ (10001cb8 <hardware_alarm_irq_handler+0x80>)
|
|
10001c62: 7809 ldrb r1, [r1, #0]
|
|
10001c64: 000c movs r4, r1
|
|
10001c66: 40c4 lsrs r4, r0
|
|
10001c68: 4222 tst r2, r4
|
|
10001c6a: d013 beq.n 10001c94 <hardware_alarm_irq_handler+0x5c>
|
|
10001c6c: 4a10 ldr r2, [pc, #64] @ (10001cb0 <hardware_alarm_irq_handler+0x78>)
|
|
10001c6e: 6a54 ldr r4, [r2, #36] @ 0x24
|
|
10001c70: 4a12 ldr r2, [pc, #72] @ (10001cbc <hardware_alarm_irq_handler+0x84>)
|
|
10001c72: 0085 lsls r5, r0, #2
|
|
10001c74: 58aa ldr r2, [r5, r2]
|
|
10001c76: 4294 cmp r4, r2
|
|
10001c78: d305 bcc.n 10001c86 <hardware_alarm_irq_handler+0x4e>
|
|
10001c7a: 4a11 ldr r2, [pc, #68] @ (10001cc0 <hardware_alarm_irq_handler+0x88>)
|
|
10001c7c: 58aa ldr r2, [r5, r2]
|
|
10001c7e: 4c0e ldr r4, [pc, #56] @ (10001cb8 <hardware_alarm_irq_handler+0x80>)
|
|
10001c80: 4399 bics r1, r3
|
|
10001c82: 7021 strb r1, [r4, #0]
|
|
10001c84: e007 b.n 10001c96 <hardware_alarm_irq_handler+0x5e>
|
|
10001c86: 4a0a ldr r2, [pc, #40] @ (10001cb0 <hardware_alarm_irq_handler+0x78>)
|
|
10001c88: 1d03 adds r3, r0, #4
|
|
10001c8a: 009b lsls r3, r3, #2
|
|
10001c8c: 5899 ldr r1, [r3, r2]
|
|
10001c8e: 5099 str r1, [r3, r2]
|
|
10001c90: 2200 movs r2, #0
|
|
10001c92: e000 b.n 10001c96 <hardware_alarm_irq_handler+0x5e>
|
|
10001c94: 2200 movs r2, #0
|
|
10001c96: f3bf 8f5f dmb sy
|
|
10001c9a: 4b04 ldr r3, [pc, #16] @ (10001cac <hardware_alarm_irq_handler+0x74>)
|
|
10001c9c: 2100 movs r1, #0
|
|
10001c9e: 6019 str r1, [r3, #0]
|
|
10001ca0: f38c 8810 msr PRIMASK, ip
|
|
10001ca4: 2a00 cmp r2, #0
|
|
10001ca6: d000 beq.n 10001caa <hardware_alarm_irq_handler+0x72>
|
|
10001ca8: 4790 blx r2
|
|
10001caa: bd70 pop {r4, r5, r6, pc}
|
|
10001cac: d0000128 .word 0xd0000128
|
|
10001cb0: 40054000 .word 0x40054000
|
|
10001cb4: 4005703c .word 0x4005703c
|
|
10001cb8: 20021d46 .word 0x20021d46
|
|
10001cbc: 20001bec .word 0x20001bec
|
|
10001cc0: 2000113c .word 0x2000113c
|
|
|
|
10001cc4 <hardware_alarm_claim>:
|
|
10001cc4: b510 push {r4, lr}
|
|
10001cc6: 0001 movs r1, r0
|
|
10001cc8: 4a02 ldr r2, [pc, #8] @ (10001cd4 <hardware_alarm_claim+0x10>)
|
|
10001cca: 4b03 ldr r3, [pc, #12] @ (10001cd8 <hardware_alarm_claim+0x14>)
|
|
10001ccc: 0018 movs r0, r3
|
|
10001cce: f7fe fd0b bl 100006e8 <hw_claim_or_assert>
|
|
10001cd2: bd10 pop {r4, pc}
|
|
10001cd4: 10009bc0 .word 0x10009bc0
|
|
10001cd8: 20021d40 .word 0x20021d40
|
|
|
|
10001cdc <time_us_64>:
|
|
10001cdc: 4b04 ldr r3, [pc, #16] @ (10001cf0 <time_us_64+0x14>)
|
|
10001cde: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001ce0: 4a03 ldr r2, [pc, #12] @ (10001cf0 <time_us_64+0x14>)
|
|
10001ce2: 6a90 ldr r0, [r2, #40] @ 0x28
|
|
10001ce4: 0019 movs r1, r3
|
|
10001ce6: 6a53 ldr r3, [r2, #36] @ 0x24
|
|
10001ce8: 4299 cmp r1, r3
|
|
10001cea: d1f9 bne.n 10001ce0 <time_us_64+0x4>
|
|
10001cec: 4770 bx lr
|
|
10001cee: 46c0 nop @ (mov r8, r8)
|
|
10001cf0: 40054000 .word 0x40054000
|
|
|
|
10001cf4 <busy_wait_until>:
|
|
10001cf4: 4b08 ldr r3, [pc, #32] @ (10001d18 <busy_wait_until+0x24>)
|
|
10001cf6: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001cf8: e001 b.n 10001cfe <busy_wait_until+0xa>
|
|
10001cfa: 4b07 ldr r3, [pc, #28] @ (10001d18 <busy_wait_until+0x24>)
|
|
10001cfc: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001cfe: 428b cmp r3, r1
|
|
10001d00: d3fb bcc.n 10001cfa <busy_wait_until+0x6>
|
|
10001d02: e001 b.n 10001d08 <busy_wait_until+0x14>
|
|
10001d04: 4b04 ldr r3, [pc, #16] @ (10001d18 <busy_wait_until+0x24>)
|
|
10001d06: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10001d08: 428b cmp r3, r1
|
|
10001d0a: d103 bne.n 10001d14 <busy_wait_until+0x20>
|
|
10001d0c: 4b02 ldr r3, [pc, #8] @ (10001d18 <busy_wait_until+0x24>)
|
|
10001d0e: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
10001d10: 4283 cmp r3, r0
|
|
10001d12: d3f7 bcc.n 10001d04 <busy_wait_until+0x10>
|
|
10001d14: 4770 bx lr
|
|
10001d16: 46c0 nop @ (mov r8, r8)
|
|
10001d18: 40054000 .word 0x40054000
|
|
|
|
10001d1c <hardware_alarm_set_callback>:
|
|
10001d1c: b570 push {r4, r5, r6, lr}
|
|
10001d1e: 0004 movs r4, r0
|
|
10001d20: 000e movs r6, r1
|
|
10001d22: f3ef 8510 mrs r5, PRIMASK
|
|
10001d26: b672 cpsid i
|
|
10001d28: 4b1b ldr r3, [pc, #108] @ (10001d98 <hardware_alarm_set_callback+0x7c>)
|
|
10001d2a: 681b ldr r3, [r3, #0]
|
|
10001d2c: 2b00 cmp r3, #0
|
|
10001d2e: d0fb beq.n 10001d28 <hardware_alarm_set_callback+0xc>
|
|
10001d30: f3bf 8f5f dmb sy
|
|
10001d34: 2e00 cmp r6, #0
|
|
10001d36: d01c beq.n 10001d72 <hardware_alarm_set_callback+0x56>
|
|
10001d38: 0020 movs r0, r4
|
|
10001d3a: f7fe ff6f bl 10000c1c <irq_get_vtable_handler>
|
|
10001d3e: 4b17 ldr r3, [pc, #92] @ (10001d9c <hardware_alarm_set_callback+0x80>)
|
|
10001d40: 4283 cmp r3, r0
|
|
10001d42: d00b beq.n 10001d5c <hardware_alarm_set_callback+0x40>
|
|
10001d44: 0019 movs r1, r3
|
|
10001d46: 0020 movs r0, r4
|
|
10001d48: f7fe ff82 bl 10000c50 <irq_set_exclusive_handler>
|
|
10001d4c: 2101 movs r1, #1
|
|
10001d4e: 0020 movs r0, r4
|
|
10001d50: f7fe ff54 bl 10000bfc <irq_set_enabled>
|
|
10001d54: 2301 movs r3, #1
|
|
10001d56: 40a3 lsls r3, r4
|
|
10001d58: 4a11 ldr r2, [pc, #68] @ (10001da0 <hardware_alarm_set_callback+0x84>)
|
|
10001d5a: 6013 str r3, [r2, #0]
|
|
10001d5c: 4b11 ldr r3, [pc, #68] @ (10001da4 <hardware_alarm_set_callback+0x88>)
|
|
10001d5e: 00a4 lsls r4, r4, #2
|
|
10001d60: 50e6 str r6, [r4, r3]
|
|
10001d62: f3bf 8f5f dmb sy
|
|
10001d66: 4b0c ldr r3, [pc, #48] @ (10001d98 <hardware_alarm_set_callback+0x7c>)
|
|
10001d68: 2200 movs r2, #0
|
|
10001d6a: 601a str r2, [r3, #0]
|
|
10001d6c: f385 8810 msr PRIMASK, r5
|
|
10001d70: bd70 pop {r4, r5, r6, pc}
|
|
10001d72: 4b0c ldr r3, [pc, #48] @ (10001da4 <hardware_alarm_set_callback+0x88>)
|
|
10001d74: 00a2 lsls r2, r4, #2
|
|
10001d76: 2100 movs r1, #0
|
|
10001d78: 50d1 str r1, [r2, r3]
|
|
10001d7a: 2201 movs r2, #1
|
|
10001d7c: 40a2 lsls r2, r4
|
|
10001d7e: 490a ldr r1, [pc, #40] @ (10001da8 <hardware_alarm_set_callback+0x8c>)
|
|
10001d80: 780b ldrb r3, [r1, #0]
|
|
10001d82: 4393 bics r3, r2
|
|
10001d84: 700b strb r3, [r1, #0]
|
|
10001d86: 4905 ldr r1, [pc, #20] @ (10001d9c <hardware_alarm_set_callback+0x80>)
|
|
10001d88: 0020 movs r0, r4
|
|
10001d8a: f7ff f893 bl 10000eb4 <irq_remove_handler>
|
|
10001d8e: 2100 movs r1, #0
|
|
10001d90: 0020 movs r0, r4
|
|
10001d92: f7fe ff33 bl 10000bfc <irq_set_enabled>
|
|
10001d96: e7e4 b.n 10001d62 <hardware_alarm_set_callback+0x46>
|
|
10001d98: d0000128 .word 0xd0000128
|
|
10001d9c: 10001c39 .word 0x10001c39
|
|
10001da0: 40056038 .word 0x40056038
|
|
10001da4: 2000113c .word 0x2000113c
|
|
10001da8: 20021d46 .word 0x20021d46
|
|
|
|
10001dac <hardware_alarm_set_target>:
|
|
10001dac: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001dae: 46de mov lr, fp
|
|
10001db0: b500 push {lr}
|
|
10001db2: b084 sub sp, #16
|
|
10001db4: 0004 movs r4, r0
|
|
10001db6: 0015 movs r5, r2
|
|
10001db8: 9201 str r2, [sp, #4]
|
|
10001dba: 001e movs r6, r3
|
|
10001dbc: 9302 str r3, [sp, #8]
|
|
10001dbe: f7ff ff8d bl 10001cdc <time_us_64>
|
|
10001dc2: 9503 str r5, [sp, #12]
|
|
10001dc4: 428e cmp r6, r1
|
|
10001dc6: d802 bhi.n 10001dce <hardware_alarm_set_target+0x22>
|
|
10001dc8: d14e bne.n 10001e68 <hardware_alarm_set_target+0xbc>
|
|
10001dca: 4285 cmp r5, r0
|
|
10001dcc: d94c bls.n 10001e68 <hardware_alarm_set_target+0xbc>
|
|
10001dce: f3ef 8b10 mrs fp, PRIMASK
|
|
10001dd2: b672 cpsid i
|
|
10001dd4: 4b27 ldr r3, [pc, #156] @ (10001e74 <hardware_alarm_set_target+0xc8>)
|
|
10001dd6: 681b ldr r3, [r3, #0]
|
|
10001dd8: 2b00 cmp r3, #0
|
|
10001dda: d0fb beq.n 10001dd4 <hardware_alarm_set_target+0x28>
|
|
10001ddc: f3bf 8f5f dmb sy
|
|
10001de0: 4a25 ldr r2, [pc, #148] @ (10001e78 <hardware_alarm_set_target+0xcc>)
|
|
10001de2: 7817 ldrb r7, [r2, #0]
|
|
10001de4: 2501 movs r5, #1
|
|
10001de6: 40a5 lsls r5, r4
|
|
10001de8: b2eb uxtb r3, r5
|
|
10001dea: 433b orrs r3, r7
|
|
10001dec: 7013 strb r3, [r2, #0]
|
|
10001dee: 4b23 ldr r3, [pc, #140] @ (10001e7c <hardware_alarm_set_target+0xd0>)
|
|
10001df0: 635d str r5, [r3, #52] @ 0x34
|
|
10001df2: 1d22 adds r2, r4, #4
|
|
10001df4: 0092 lsls r2, r2, #2
|
|
10001df6: 9901 ldr r1, [sp, #4]
|
|
10001df8: 50d1 str r1, [r2, r3]
|
|
10001dfa: 4a21 ldr r2, [pc, #132] @ (10001e80 <hardware_alarm_set_target+0xd4>)
|
|
10001dfc: 00a1 lsls r1, r4, #2
|
|
10001dfe: 9802 ldr r0, [sp, #8]
|
|
10001e00: 5088 str r0, [r1, r2]
|
|
10001e02: 6a1b ldr r3, [r3, #32]
|
|
10001e04: 422b tst r3, r5
|
|
10001e06: d112 bne.n 10001e2e <hardware_alarm_set_target+0x82>
|
|
10001e08: 4b1c ldr r3, [pc, #112] @ (10001e7c <hardware_alarm_set_target+0xd0>)
|
|
10001e0a: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
10001e0c: 422b tst r3, r5
|
|
10001e0e: d008 beq.n 10001e22 <hardware_alarm_set_target+0x76>
|
|
10001e10: 2000 movs r0, #0
|
|
10001e12: f3bf 8f5f dmb sy
|
|
10001e16: 4b17 ldr r3, [pc, #92] @ (10001e74 <hardware_alarm_set_target+0xc8>)
|
|
10001e18: 2200 movs r2, #0
|
|
10001e1a: 601a str r2, [r3, #0]
|
|
10001e1c: f38b 8810 msr PRIMASK, fp
|
|
10001e20: e023 b.n 10001e6a <hardware_alarm_set_target+0xbe>
|
|
10001e22: 4b18 ldr r3, [pc, #96] @ (10001e84 <hardware_alarm_set_target+0xd8>)
|
|
10001e24: 4a18 ldr r2, [pc, #96] @ (10001e88 <hardware_alarm_set_target+0xdc>)
|
|
10001e26: 4819 ldr r0, [pc, #100] @ (10001e8c <hardware_alarm_set_target+0xe0>)
|
|
10001e28: 21c5 movs r1, #197 @ 0xc5
|
|
10001e2a: f000 fb2b bl 10002484 <__assert_func>
|
|
10001e2e: f7ff ff55 bl 10001cdc <time_us_64>
|
|
10001e32: 428e cmp r6, r1
|
|
10001e34: d814 bhi.n 10001e60 <hardware_alarm_set_target+0xb4>
|
|
10001e36: d102 bne.n 10001e3e <hardware_alarm_set_target+0x92>
|
|
10001e38: 9b03 ldr r3, [sp, #12]
|
|
10001e3a: 4283 cmp r3, r0
|
|
10001e3c: d810 bhi.n 10001e60 <hardware_alarm_set_target+0xb4>
|
|
10001e3e: 4b0e ldr r3, [pc, #56] @ (10001e78 <hardware_alarm_set_target+0xcc>)
|
|
10001e40: 781b ldrb r3, [r3, #0]
|
|
10001e42: 42bb cmp r3, r7
|
|
10001e44: d00e beq.n 10001e64 <hardware_alarm_set_target+0xb8>
|
|
10001e46: 4b0d ldr r3, [pc, #52] @ (10001e7c <hardware_alarm_set_target+0xd0>)
|
|
10001e48: 621d str r5, [r3, #32]
|
|
10001e4a: 635d str r5, [r3, #52] @ 0x34
|
|
10001e4c: 221f movs r2, #31
|
|
10001e4e: 4022 ands r2, r4
|
|
10001e50: 2301 movs r3, #1
|
|
10001e52: 4093 lsls r3, r2
|
|
10001e54: 4a0e ldr r2, [pc, #56] @ (10001e90 <hardware_alarm_set_target+0xe4>)
|
|
10001e56: 6013 str r3, [r2, #0]
|
|
10001e58: 4b07 ldr r3, [pc, #28] @ (10001e78 <hardware_alarm_set_target+0xcc>)
|
|
10001e5a: 701f strb r7, [r3, #0]
|
|
10001e5c: 2001 movs r0, #1
|
|
10001e5e: e7d8 b.n 10001e12 <hardware_alarm_set_target+0x66>
|
|
10001e60: 2000 movs r0, #0
|
|
10001e62: e7d6 b.n 10001e12 <hardware_alarm_set_target+0x66>
|
|
10001e64: 2001 movs r0, #1
|
|
10001e66: e7d4 b.n 10001e12 <hardware_alarm_set_target+0x66>
|
|
10001e68: 2001 movs r0, #1
|
|
10001e6a: b004 add sp, #16
|
|
10001e6c: bc80 pop {r7}
|
|
10001e6e: 46bb mov fp, r7
|
|
10001e70: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10001e72: 46c0 nop @ (mov r8, r8)
|
|
10001e74: d0000128 .word 0xd0000128
|
|
10001e78: 20021d46 .word 0x20021d46
|
|
10001e7c: 40054000 .word 0x40054000
|
|
10001e80: 20001bec .word 0x20001bec
|
|
10001e84: 10009be4 .word 0x10009be4
|
|
10001e88: 10009c48 .word 0x10009c48
|
|
10001e8c: 10009c08 .word 0x10009c08
|
|
10001e90: e000e280 .word 0xe000e280
|
|
|
|
10001e94 <hardware_alarm_cancel>:
|
|
10001e94: f3ef 8c10 mrs ip, PRIMASK
|
|
10001e98: b672 cpsid i
|
|
10001e9a: 4b0b ldr r3, [pc, #44] @ (10001ec8 <hardware_alarm_cancel+0x34>)
|
|
10001e9c: 681b ldr r3, [r3, #0]
|
|
10001e9e: 2b00 cmp r3, #0
|
|
10001ea0: d0fb beq.n 10001e9a <hardware_alarm_cancel+0x6>
|
|
10001ea2: f3bf 8f5f dmb sy
|
|
10001ea6: 2301 movs r3, #1
|
|
10001ea8: 4083 lsls r3, r0
|
|
10001eaa: 4a08 ldr r2, [pc, #32] @ (10001ecc <hardware_alarm_cancel+0x38>)
|
|
10001eac: 6213 str r3, [r2, #32]
|
|
10001eae: 4908 ldr r1, [pc, #32] @ (10001ed0 <hardware_alarm_cancel+0x3c>)
|
|
10001eb0: 780a ldrb r2, [r1, #0]
|
|
10001eb2: 439a bics r2, r3
|
|
10001eb4: 700a strb r2, [r1, #0]
|
|
10001eb6: f3bf 8f5f dmb sy
|
|
10001eba: 4b03 ldr r3, [pc, #12] @ (10001ec8 <hardware_alarm_cancel+0x34>)
|
|
10001ebc: 2200 movs r2, #0
|
|
10001ebe: 601a str r2, [r3, #0]
|
|
10001ec0: f38c 8810 msr PRIMASK, ip
|
|
10001ec4: 4770 bx lr
|
|
10001ec6: 46c0 nop @ (mov r8, r8)
|
|
10001ec8: d0000128 .word 0xd0000128
|
|
10001ecc: 40054000 .word 0x40054000
|
|
10001ed0: 20021d46 .word 0x20021d46
|
|
|
|
10001ed4 <ph_get_node>:
|
|
10001ed4: b510 push {r4, lr}
|
|
10001ed6: 2900 cmp r1, #0
|
|
10001ed8: d008 beq.n 10001eec <ph_get_node+0x18>
|
|
10001eda: 7b03 ldrb r3, [r0, #12]
|
|
10001edc: 428b cmp r3, r1
|
|
10001ede: d305 bcc.n 10001eec <ph_get_node+0x18>
|
|
10001ee0: 6800 ldr r0, [r0, #0]
|
|
10001ee2: 004b lsls r3, r1, #1
|
|
10001ee4: 185b adds r3, r3, r1
|
|
10001ee6: 3b03 subs r3, #3
|
|
10001ee8: 18c0 adds r0, r0, r3
|
|
10001eea: bd10 pop {r4, pc}
|
|
10001eec: 4b02 ldr r3, [pc, #8] @ (10001ef8 <ph_get_node+0x24>)
|
|
10001eee: 4a03 ldr r2, [pc, #12] @ (10001efc <ph_get_node+0x28>)
|
|
10001ef0: 4803 ldr r0, [pc, #12] @ (10001f00 <ph_get_node+0x2c>)
|
|
10001ef2: 2168 movs r1, #104 @ 0x68
|
|
10001ef4: f000 fac6 bl 10002484 <__assert_func>
|
|
10001ef8: 100098f0 .word 0x100098f0
|
|
10001efc: 10009d50 .word 0x10009d50
|
|
10001f00: 1000990c .word 0x1000990c
|
|
|
|
10001f04 <ph_add_child_node>:
|
|
10001f04: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10001f06: 0006 movs r6, r0
|
|
10001f08: 000c movs r4, r1
|
|
10001f0a: 0015 movs r5, r2
|
|
10001f0c: f7ff ffe2 bl 10001ed4 <ph_get_node>
|
|
10001f10: 0007 movs r7, r0
|
|
10001f12: 2c00 cmp r4, #0
|
|
10001f14: d00d beq.n 10001f32 <ph_add_child_node+0x2e>
|
|
10001f16: 2d00 cmp r5, #0
|
|
10001f18: d011 beq.n 10001f3e <ph_add_child_node+0x3a>
|
|
10001f1a: 42ac cmp r4, r5
|
|
10001f1c: d015 beq.n 10001f4a <ph_add_child_node+0x46>
|
|
10001f1e: 0029 movs r1, r5
|
|
10001f20: 0030 movs r0, r6
|
|
10001f22: f7ff ffd7 bl 10001ed4 <ph_get_node>
|
|
10001f26: 7084 strb r4, [r0, #2]
|
|
10001f28: 783b ldrb r3, [r7, #0]
|
|
10001f2a: 2b00 cmp r3, #0
|
|
10001f2c: d113 bne.n 10001f56 <ph_add_child_node+0x52>
|
|
10001f2e: 703d strb r5, [r7, #0]
|
|
10001f30: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10001f32: 4b0a ldr r3, [pc, #40] @ (10001f5c <ph_add_child_node+0x58>)
|
|
10001f34: 4a0a ldr r2, [pc, #40] @ (10001f60 <ph_add_child_node+0x5c>)
|
|
10001f36: 480b ldr r0, [pc, #44] @ (10001f64 <ph_add_child_node+0x60>)
|
|
10001f38: 216f movs r1, #111 @ 0x6f
|
|
10001f3a: f000 faa3 bl 10002484 <__assert_func>
|
|
10001f3e: 4b0a ldr r3, [pc, #40] @ (10001f68 <ph_add_child_node+0x64>)
|
|
10001f40: 4a07 ldr r2, [pc, #28] @ (10001f60 <ph_add_child_node+0x5c>)
|
|
10001f42: 4808 ldr r0, [pc, #32] @ (10001f64 <ph_add_child_node+0x60>)
|
|
10001f44: 2170 movs r1, #112 @ 0x70
|
|
10001f46: f000 fa9d bl 10002484 <__assert_func>
|
|
10001f4a: 4b08 ldr r3, [pc, #32] @ (10001f6c <ph_add_child_node+0x68>)
|
|
10001f4c: 4a04 ldr r2, [pc, #16] @ (10001f60 <ph_add_child_node+0x5c>)
|
|
10001f4e: 4805 ldr r0, [pc, #20] @ (10001f64 <ph_add_child_node+0x60>)
|
|
10001f50: 2171 movs r1, #113 @ 0x71
|
|
10001f52: f000 fa97 bl 10002484 <__assert_func>
|
|
10001f56: 7043 strb r3, [r0, #1]
|
|
10001f58: 703d strb r5, [r7, #0]
|
|
10001f5a: e7e9 b.n 10001f30 <ph_add_child_node+0x2c>
|
|
10001f5c: 10009954 .word 0x10009954
|
|
10001f60: 10009d3c .word 0x10009d3c
|
|
10001f64: 1000990c .word 0x1000990c
|
|
10001f68: 10009960 .word 0x10009960
|
|
10001f6c: 1000996c .word 0x1000996c
|
|
|
|
10001f70 <ph_merge_nodes>:
|
|
10001f70: b570 push {r4, r5, r6, lr}
|
|
10001f72: 0006 movs r6, r0
|
|
10001f74: 000d movs r5, r1
|
|
10001f76: 0014 movs r4, r2
|
|
10001f78: 2900 cmp r1, #0
|
|
10001f7a: d014 beq.n 10001fa6 <ph_merge_nodes+0x36>
|
|
10001f7c: 2a00 cmp r2, #0
|
|
10001f7e: d014 beq.n 10001faa <ph_merge_nodes+0x3a>
|
|
10001f80: 6843 ldr r3, [r0, #4]
|
|
10001f82: 6880 ldr r0, [r0, #8]
|
|
10001f84: 4798 blx r3
|
|
10001f86: 2800 cmp r0, #0
|
|
10001f88: d006 beq.n 10001f98 <ph_merge_nodes+0x28>
|
|
10001f8a: 0022 movs r2, r4
|
|
10001f8c: 0029 movs r1, r5
|
|
10001f8e: 0030 movs r0, r6
|
|
10001f90: f7ff ffb8 bl 10001f04 <ph_add_child_node>
|
|
10001f94: 0028 movs r0, r5
|
|
10001f96: e007 b.n 10001fa8 <ph_merge_nodes+0x38>
|
|
10001f98: 002a movs r2, r5
|
|
10001f9a: 0021 movs r1, r4
|
|
10001f9c: 0030 movs r0, r6
|
|
10001f9e: f7ff ffb1 bl 10001f04 <ph_add_child_node>
|
|
10001fa2: 0020 movs r0, r4
|
|
10001fa4: e000 b.n 10001fa8 <ph_merge_nodes+0x38>
|
|
10001fa6: 0010 movs r0, r2
|
|
10001fa8: bd70 pop {r4, r5, r6, pc}
|
|
10001faa: 0008 movs r0, r1
|
|
10001fac: e7fc b.n 10001fa8 <ph_merge_nodes+0x38>
|
|
|
|
10001fae <ph_clear>:
|
|
10001fae: b570 push {r4, r5, r6, lr}
|
|
10001fb0: 0005 movs r5, r0
|
|
10001fb2: 2300 movs r3, #0
|
|
10001fb4: 7343 strb r3, [r0, #13]
|
|
10001fb6: 3301 adds r3, #1
|
|
10001fb8: 7383 strb r3, [r0, #14]
|
|
10001fba: 7b03 ldrb r3, [r0, #12]
|
|
10001fbc: 73c3 strb r3, [r0, #15]
|
|
10001fbe: 2401 movs r4, #1
|
|
10001fc0: e006 b.n 10001fd0 <ph_clear+0x22>
|
|
10001fc2: 0021 movs r1, r4
|
|
10001fc4: 0028 movs r0, r5
|
|
10001fc6: f7ff ff85 bl 10001ed4 <ph_get_node>
|
|
10001fca: 3401 adds r4, #1
|
|
10001fcc: b2e4 uxtb r4, r4
|
|
10001fce: 7044 strb r4, [r0, #1]
|
|
10001fd0: 7b29 ldrb r1, [r5, #12]
|
|
10001fd2: 42a1 cmp r1, r4
|
|
10001fd4: d8f5 bhi.n 10001fc2 <ph_clear+0x14>
|
|
10001fd6: 0028 movs r0, r5
|
|
10001fd8: f7ff ff7c bl 10001ed4 <ph_get_node>
|
|
10001fdc: 2300 movs r3, #0
|
|
10001fde: 7043 strb r3, [r0, #1]
|
|
10001fe0: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10001fe2 <ph_post_alloc_init>:
|
|
10001fe2: b510 push {r4, lr}
|
|
10001fe4: 7301 strb r1, [r0, #12]
|
|
10001fe6: 6042 str r2, [r0, #4]
|
|
10001fe8: 6083 str r3, [r0, #8]
|
|
10001fea: f7ff ffe0 bl 10001fae <ph_clear>
|
|
10001fee: bd10 pop {r4, pc}
|
|
|
|
10001ff0 <ph_merge_two_pass>:
|
|
10001ff0: b5f0 push {r4, r5, r6, r7, lr}
|
|
10001ff2: 46c6 mov lr, r8
|
|
10001ff4: b500 push {lr}
|
|
10001ff6: 0005 movs r5, r0
|
|
10001ff8: 1e0c subs r4, r1, #0
|
|
10001ffa: d103 bne.n 10002004 <ph_merge_two_pass+0x14>
|
|
10001ffc: 0020 movs r0, r4
|
|
10001ffe: bc80 pop {r7}
|
|
10002000: 46b8 mov r8, r7
|
|
10002002: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002004: f7ff ff66 bl 10001ed4 <ph_get_node>
|
|
10002008: 7846 ldrb r6, [r0, #1]
|
|
1000200a: 2e00 cmp r6, #0
|
|
1000200c: d0f6 beq.n 10001ffc <ph_merge_two_pass+0xc>
|
|
1000200e: 0031 movs r1, r6
|
|
10002010: 0028 movs r0, r5
|
|
10002012: f7ff ff5f bl 10001ed4 <ph_get_node>
|
|
10002016: 7847 ldrb r7, [r0, #1]
|
|
10002018: 2300 movs r3, #0
|
|
1000201a: 4698 mov r8, r3
|
|
1000201c: 7043 strb r3, [r0, #1]
|
|
1000201e: 0021 movs r1, r4
|
|
10002020: 0028 movs r0, r5
|
|
10002022: f7ff ff57 bl 10001ed4 <ph_get_node>
|
|
10002026: 4643 mov r3, r8
|
|
10002028: 7043 strb r3, [r0, #1]
|
|
1000202a: 0032 movs r2, r6
|
|
1000202c: 0021 movs r1, r4
|
|
1000202e: 0028 movs r0, r5
|
|
10002030: f7ff ff9e bl 10001f70 <ph_merge_nodes>
|
|
10002034: 0004 movs r4, r0
|
|
10002036: 0039 movs r1, r7
|
|
10002038: 0028 movs r0, r5
|
|
1000203a: f7ff ffd9 bl 10001ff0 <ph_merge_two_pass>
|
|
1000203e: 0002 movs r2, r0
|
|
10002040: 0021 movs r1, r4
|
|
10002042: 0028 movs r0, r5
|
|
10002044: f7ff ff94 bl 10001f70 <ph_merge_nodes>
|
|
10002048: 0004 movs r4, r0
|
|
1000204a: e7d7 b.n 10001ffc <ph_merge_two_pass+0xc>
|
|
|
|
1000204c <ph_remove_any_head>:
|
|
1000204c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000204e: 46c6 mov lr, r8
|
|
10002050: b500 push {lr}
|
|
10002052: 0004 movs r4, r0
|
|
10002054: 000d movs r5, r1
|
|
10002056: 0017 movs r7, r2
|
|
10002058: 2900 cmp r1, #0
|
|
1000205a: d027 beq.n 100020ac <ph_remove_any_head+0x60>
|
|
1000205c: f7ff ff3a bl 10001ed4 <ph_get_node>
|
|
10002060: 7843 ldrb r3, [r0, #1]
|
|
10002062: 2b00 cmp r3, #0
|
|
10002064: d128 bne.n 100020b8 <ph_remove_any_head+0x6c>
|
|
10002066: 7883 ldrb r3, [r0, #2]
|
|
10002068: 2b00 cmp r3, #0
|
|
1000206a: d12b bne.n 100020c4 <ph_remove_any_head+0x78>
|
|
1000206c: 7801 ldrb r1, [r0, #0]
|
|
1000206e: 0020 movs r0, r4
|
|
10002070: f7ff ffbe bl 10001ff0 <ph_merge_two_pass>
|
|
10002074: 0006 movs r6, r0
|
|
10002076: 4680 mov r8, r0
|
|
10002078: 2f00 cmp r7, #0
|
|
1000207a: d00a beq.n 10002092 <ph_remove_any_head+0x46>
|
|
1000207c: 7be1 ldrb r1, [r4, #15]
|
|
1000207e: 2900 cmp r1, #0
|
|
10002080: d126 bne.n 100020d0 <ph_remove_any_head+0x84>
|
|
10002082: 7ba3 ldrb r3, [r4, #14]
|
|
10002084: 2b00 cmp r3, #0
|
|
10002086: d103 bne.n 10002090 <ph_remove_any_head+0x44>
|
|
10002088: 7be3 ldrb r3, [r4, #15]
|
|
1000208a: 2b00 cmp r3, #0
|
|
1000208c: d125 bne.n 100020da <ph_remove_any_head+0x8e>
|
|
1000208e: 73a5 strb r5, [r4, #14]
|
|
10002090: 73e5 strb r5, [r4, #15]
|
|
10002092: 4643 mov r3, r8
|
|
10002094: 2b00 cmp r3, #0
|
|
10002096: d126 bne.n 100020e6 <ph_remove_any_head+0x9a>
|
|
10002098: 0029 movs r1, r5
|
|
1000209a: 0020 movs r0, r4
|
|
1000209c: f7ff ff1a bl 10001ed4 <ph_get_node>
|
|
100020a0: 2300 movs r3, #0
|
|
100020a2: 7043 strb r3, [r0, #1]
|
|
100020a4: 0030 movs r0, r6
|
|
100020a6: bc80 pop {r7}
|
|
100020a8: 46b8 mov r8, r7
|
|
100020aa: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100020ac: 4b11 ldr r3, [pc, #68] @ (100020f4 <ph_remove_any_head+0xa8>)
|
|
100020ae: 4a12 ldr r2, [pc, #72] @ (100020f8 <ph_remove_any_head+0xac>)
|
|
100020b0: 4812 ldr r0, [pc, #72] @ (100020fc <ph_remove_any_head+0xb0>)
|
|
100020b2: 2138 movs r1, #56 @ 0x38
|
|
100020b4: f000 f9e6 bl 10002484 <__assert_func>
|
|
100020b8: 4b11 ldr r3, [pc, #68] @ (10002100 <ph_remove_any_head+0xb4>)
|
|
100020ba: 4a0f ldr r2, [pc, #60] @ (100020f8 <ph_remove_any_head+0xac>)
|
|
100020bc: 480f ldr r0, [pc, #60] @ (100020fc <ph_remove_any_head+0xb0>)
|
|
100020be: 213a movs r1, #58 @ 0x3a
|
|
100020c0: f000 f9e0 bl 10002484 <__assert_func>
|
|
100020c4: 4b0f ldr r3, [pc, #60] @ (10002104 <ph_remove_any_head+0xb8>)
|
|
100020c6: 4a0c ldr r2, [pc, #48] @ (100020f8 <ph_remove_any_head+0xac>)
|
|
100020c8: 480c ldr r0, [pc, #48] @ (100020fc <ph_remove_any_head+0xb0>)
|
|
100020ca: 213b movs r1, #59 @ 0x3b
|
|
100020cc: f000 f9da bl 10002484 <__assert_func>
|
|
100020d0: 0020 movs r0, r4
|
|
100020d2: f7ff feff bl 10001ed4 <ph_get_node>
|
|
100020d6: 7045 strb r5, [r0, #1]
|
|
100020d8: e7d3 b.n 10002082 <ph_remove_any_head+0x36>
|
|
100020da: 4b0b ldr r3, [pc, #44] @ (10002108 <ph_remove_any_head+0xbc>)
|
|
100020dc: 4a06 ldr r2, [pc, #24] @ (100020f8 <ph_remove_any_head+0xac>)
|
|
100020de: 4807 ldr r0, [pc, #28] @ (100020fc <ph_remove_any_head+0xb0>)
|
|
100020e0: 2142 movs r1, #66 @ 0x42
|
|
100020e2: f000 f9cf bl 10002484 <__assert_func>
|
|
100020e6: 0031 movs r1, r6
|
|
100020e8: 0020 movs r0, r4
|
|
100020ea: f7ff fef3 bl 10001ed4 <ph_get_node>
|
|
100020ee: 2300 movs r3, #0
|
|
100020f0: 7083 strb r3, [r0, #2]
|
|
100020f2: e7d1 b.n 10002098 <ph_remove_any_head+0x4c>
|
|
100020f4: 10009c64 .word 0x10009c64
|
|
100020f8: 10009d28 .word 0x10009d28
|
|
100020fc: 10009c6c .word 0x10009c6c
|
|
10002100: 10009ca4 .word 0x10009ca4
|
|
10002104: 10009ccc .word 0x10009ccc
|
|
10002108: 100099ac .word 0x100099ac
|
|
|
|
1000210c <ph_remove_head>:
|
|
1000210c: b570 push {r4, r5, r6, lr}
|
|
1000210e: 0004 movs r4, r0
|
|
10002110: 000a movs r2, r1
|
|
10002112: 7b45 ldrb r5, [r0, #13]
|
|
10002114: 0029 movs r1, r5
|
|
10002116: f7ff ff99 bl 1000204c <ph_remove_any_head>
|
|
1000211a: 7360 strb r0, [r4, #13]
|
|
1000211c: 0028 movs r0, r5
|
|
1000211e: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10002120 <ph_remove_and_free_node>:
|
|
10002120: b570 push {r4, r5, r6, lr}
|
|
10002122: 0006 movs r6, r0
|
|
10002124: 1e0c subs r4, r1, #0
|
|
10002126: d040 beq.n 100021aa <ph_remove_and_free_node+0x8a>
|
|
10002128: 7b43 ldrb r3, [r0, #13]
|
|
1000212a: 428b cmp r3, r1
|
|
1000212c: d007 beq.n 1000213e <ph_remove_and_free_node+0x1e>
|
|
1000212e: f7ff fed1 bl 10001ed4 <ph_get_node>
|
|
10002132: 0005 movs r5, r0
|
|
10002134: 7881 ldrb r1, [r0, #2]
|
|
10002136: 2900 cmp r1, #0
|
|
10002138: d106 bne.n 10002148 <ph_remove_and_free_node+0x28>
|
|
1000213a: 2000 movs r0, #0
|
|
1000213c: e036 b.n 100021ac <ph_remove_and_free_node+0x8c>
|
|
1000213e: 2101 movs r1, #1
|
|
10002140: f7ff ffe4 bl 1000210c <ph_remove_head>
|
|
10002144: 2001 movs r0, #1
|
|
10002146: e031 b.n 100021ac <ph_remove_and_free_node+0x8c>
|
|
10002148: 0030 movs r0, r6
|
|
1000214a: f7ff fec3 bl 10001ed4 <ph_get_node>
|
|
1000214e: 7801 ldrb r1, [r0, #0]
|
|
10002150: 42a1 cmp r1, r4
|
|
10002152: d00d beq.n 10002170 <ph_remove_and_free_node+0x50>
|
|
10002154: 0030 movs r0, r6
|
|
10002156: f7ff febd bl 10001ed4 <ph_get_node>
|
|
1000215a: 7841 ldrb r1, [r0, #1]
|
|
1000215c: 42a1 cmp r1, r4
|
|
1000215e: d00a beq.n 10002176 <ph_remove_and_free_node+0x56>
|
|
10002160: 2900 cmp r1, #0
|
|
10002162: d1f7 bne.n 10002154 <ph_remove_and_free_node+0x34>
|
|
10002164: 4b12 ldr r3, [pc, #72] @ (100021b0 <ph_remove_and_free_node+0x90>)
|
|
10002166: 4a13 ldr r2, [pc, #76] @ (100021b4 <ph_remove_and_free_node+0x94>)
|
|
10002168: 4813 ldr r0, [pc, #76] @ (100021b8 <ph_remove_and_free_node+0x98>)
|
|
1000216a: 316b adds r1, #107 @ 0x6b
|
|
1000216c: f000 f98a bl 10002484 <__assert_func>
|
|
10002170: 786b ldrb r3, [r5, #1]
|
|
10002172: 7003 strb r3, [r0, #0]
|
|
10002174: e001 b.n 1000217a <ph_remove_and_free_node+0x5a>
|
|
10002176: 786b ldrb r3, [r5, #1]
|
|
10002178: 7043 strb r3, [r0, #1]
|
|
1000217a: 2300 movs r3, #0
|
|
1000217c: 70ab strb r3, [r5, #2]
|
|
1000217e: 706b strb r3, [r5, #1]
|
|
10002180: 2201 movs r2, #1
|
|
10002182: 0021 movs r1, r4
|
|
10002184: 0030 movs r0, r6
|
|
10002186: f7ff ff61 bl 1000204c <ph_remove_any_head>
|
|
1000218a: 0002 movs r2, r0
|
|
1000218c: 7b71 ldrb r1, [r6, #13]
|
|
1000218e: 4281 cmp r1, r0
|
|
10002190: d005 beq.n 1000219e <ph_remove_and_free_node+0x7e>
|
|
10002192: 0030 movs r0, r6
|
|
10002194: f7ff feec bl 10001f70 <ph_merge_nodes>
|
|
10002198: 7370 strb r0, [r6, #13]
|
|
1000219a: 2001 movs r0, #1
|
|
1000219c: e006 b.n 100021ac <ph_remove_and_free_node+0x8c>
|
|
1000219e: 4b07 ldr r3, [pc, #28] @ (100021bc <ph_remove_and_free_node+0x9c>)
|
|
100021a0: 4a04 ldr r2, [pc, #16] @ (100021b4 <ph_remove_and_free_node+0x94>)
|
|
100021a2: 4805 ldr r0, [pc, #20] @ (100021b8 <ph_remove_and_free_node+0x98>)
|
|
100021a4: 2171 movs r1, #113 @ 0x71
|
|
100021a6: f000 f96d bl 10002484 <__assert_func>
|
|
100021aa: 2000 movs r0, #0
|
|
100021ac: bd70 pop {r4, r5, r6, pc}
|
|
100021ae: 46c0 nop @ (mov r8, r8)
|
|
100021b0: 100096b4 .word 0x100096b4
|
|
100021b4: 10009d10 .word 0x10009d10
|
|
100021b8: 10009c6c .word 0x10009c6c
|
|
100021bc: 10009cf0 .word 0x10009cf0
|
|
|
|
100021c0 <pll_init>:
|
|
100021c0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100021c2: 46c6 mov lr, r8
|
|
100021c4: b500 push {lr}
|
|
100021c6: 0004 movs r4, r0
|
|
100021c8: 000e movs r6, r1
|
|
100021ca: 0017 movs r7, r2
|
|
100021cc: 001d movs r5, r3
|
|
100021ce: 4837 ldr r0, [pc, #220] @ (100022ac <pll_init+0xec>)
|
|
100021d0: f001 fb14 bl 100037fc <__wrap___aeabi_uidiv>
|
|
100021d4: 4680 mov r8, r0
|
|
100021d6: 4b36 ldr r3, [pc, #216] @ (100022b0 <pll_init+0xf0>)
|
|
100021d8: 18fa adds r2, r7, r3
|
|
100021da: 4b36 ldr r3, [pc, #216] @ (100022b4 <pll_init+0xf4>)
|
|
100021dc: 429a cmp r2, r3
|
|
100021de: d839 bhi.n 10002254 <pll_init+0x94>
|
|
100021e0: 0001 movs r1, r0
|
|
100021e2: 0038 movs r0, r7
|
|
100021e4: f001 fb0a bl 100037fc <__wrap___aeabi_uidiv>
|
|
100021e8: 0002 movs r2, r0
|
|
100021ea: 3a10 subs r2, #16
|
|
100021ec: 2398 movs r3, #152 @ 0x98
|
|
100021ee: 005b lsls r3, r3, #1
|
|
100021f0: 429a cmp r2, r3
|
|
100021f2: d835 bhi.n 10002260 <pll_init+0xa0>
|
|
100021f4: 1e6b subs r3, r5, #1
|
|
100021f6: 2b06 cmp r3, #6
|
|
100021f8: d838 bhi.n 1000226c <pll_init+0xac>
|
|
100021fa: 9b06 ldr r3, [sp, #24]
|
|
100021fc: 3b01 subs r3, #1
|
|
100021fe: 2b06 cmp r3, #6
|
|
10002200: d834 bhi.n 1000226c <pll_init+0xac>
|
|
10002202: 093f lsrs r7, r7, #4
|
|
10002204: 4547 cmp r7, r8
|
|
10002206: d337 bcc.n 10002278 <pll_init+0xb8>
|
|
10002208: 042d lsls r5, r5, #16
|
|
1000220a: 9b06 ldr r3, [sp, #24]
|
|
1000220c: 031b lsls r3, r3, #12
|
|
1000220e: 431d orrs r5, r3
|
|
10002210: 6823 ldr r3, [r4, #0]
|
|
10002212: 2b00 cmp r3, #0
|
|
10002214: db36 blt.n 10002284 <pll_init+0xc4>
|
|
10002216: 4b28 ldr r3, [pc, #160] @ (100022b8 <pll_init+0xf8>)
|
|
10002218: 429c cmp r4, r3
|
|
1000221a: d044 beq.n 100022a6 <pll_init+0xe6>
|
|
1000221c: 2380 movs r3, #128 @ 0x80
|
|
1000221e: 015b lsls r3, r3, #5
|
|
10002220: 4a26 ldr r2, [pc, #152] @ (100022bc <pll_init+0xfc>)
|
|
10002222: 6013 str r3, [r2, #0]
|
|
10002224: 4a26 ldr r2, [pc, #152] @ (100022c0 <pll_init+0x100>)
|
|
10002226: 6013 str r3, [r2, #0]
|
|
10002228: 4a26 ldr r2, [pc, #152] @ (100022c4 <pll_init+0x104>)
|
|
1000222a: 6892 ldr r2, [r2, #8]
|
|
1000222c: 0019 movs r1, r3
|
|
1000222e: 4391 bics r1, r2
|
|
10002230: d1fa bne.n 10002228 <pll_init+0x68>
|
|
10002232: 6026 str r6, [r4, #0]
|
|
10002234: 60a0 str r0, [r4, #8]
|
|
10002236: 1d22 adds r2, r4, #4
|
|
10002238: 23c0 movs r3, #192 @ 0xc0
|
|
1000223a: 019b lsls r3, r3, #6
|
|
1000223c: 4313 orrs r3, r2
|
|
1000223e: 2221 movs r2, #33 @ 0x21
|
|
10002240: 601a str r2, [r3, #0]
|
|
10002242: 6822 ldr r2, [r4, #0]
|
|
10002244: 2a00 cmp r2, #0
|
|
10002246: dafc bge.n 10002242 <pll_init+0x82>
|
|
10002248: 60e5 str r5, [r4, #12]
|
|
1000224a: 2208 movs r2, #8
|
|
1000224c: 601a str r2, [r3, #0]
|
|
1000224e: bc80 pop {r7}
|
|
10002250: 46b8 mov r8, r7
|
|
10002252: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002254: 4b1c ldr r3, [pc, #112] @ (100022c8 <pll_init+0x108>)
|
|
10002256: 4a1d ldr r2, [pc, #116] @ (100022cc <pll_init+0x10c>)
|
|
10002258: 481d ldr r0, [pc, #116] @ (100022d0 <pll_init+0x110>)
|
|
1000225a: 2111 movs r1, #17
|
|
1000225c: f000 f912 bl 10002484 <__assert_func>
|
|
10002260: 4b1c ldr r3, [pc, #112] @ (100022d4 <pll_init+0x114>)
|
|
10002262: 4a1a ldr r2, [pc, #104] @ (100022cc <pll_init+0x10c>)
|
|
10002264: 481a ldr r0, [pc, #104] @ (100022d0 <pll_init+0x110>)
|
|
10002266: 2119 movs r1, #25
|
|
10002268: f000 f90c bl 10002484 <__assert_func>
|
|
1000226c: 4b1a ldr r3, [pc, #104] @ (100022d8 <pll_init+0x118>)
|
|
1000226e: 4a17 ldr r2, [pc, #92] @ (100022cc <pll_init+0x10c>)
|
|
10002270: 4817 ldr r0, [pc, #92] @ (100022d0 <pll_init+0x110>)
|
|
10002272: 211c movs r1, #28
|
|
10002274: f000 f906 bl 10002484 <__assert_func>
|
|
10002278: 4b18 ldr r3, [pc, #96] @ (100022dc <pll_init+0x11c>)
|
|
1000227a: 4a14 ldr r2, [pc, #80] @ (100022cc <pll_init+0x10c>)
|
|
1000227c: 4814 ldr r0, [pc, #80] @ (100022d0 <pll_init+0x110>)
|
|
1000227e: 2123 movs r1, #35 @ 0x23
|
|
10002280: f000 f900 bl 10002484 <__assert_func>
|
|
10002284: 6822 ldr r2, [r4, #0]
|
|
10002286: 233f movs r3, #63 @ 0x3f
|
|
10002288: 4013 ands r3, r2
|
|
1000228a: 42b3 cmp r3, r6
|
|
1000228c: d1c3 bne.n 10002216 <pll_init+0x56>
|
|
1000228e: 68a3 ldr r3, [r4, #8]
|
|
10002290: 051b lsls r3, r3, #20
|
|
10002292: 0d1b lsrs r3, r3, #20
|
|
10002294: 4283 cmp r3, r0
|
|
10002296: d1be bne.n 10002216 <pll_init+0x56>
|
|
10002298: 68e3 ldr r3, [r4, #12]
|
|
1000229a: 22ee movs r2, #238 @ 0xee
|
|
1000229c: 02d2 lsls r2, r2, #11
|
|
1000229e: 4013 ands r3, r2
|
|
100022a0: 42ab cmp r3, r5
|
|
100022a2: d1b8 bne.n 10002216 <pll_init+0x56>
|
|
100022a4: e7d3 b.n 1000224e <pll_init+0x8e>
|
|
100022a6: 2380 movs r3, #128 @ 0x80
|
|
100022a8: 019b lsls r3, r3, #6
|
|
100022aa: e7b9 b.n 10002220 <pll_init+0x60>
|
|
100022ac: 00b71b00 .word 0x00b71b00
|
|
100022b0: d34be880 .word 0xd34be880
|
|
100022b4: 32a9f880 .word 0x32a9f880
|
|
100022b8: 4002c000 .word 0x4002c000
|
|
100022bc: 4000e000 .word 0x4000e000
|
|
100022c0: 4000f000 .word 0x4000f000
|
|
100022c4: 4000c000 .word 0x4000c000
|
|
100022c8: 10009d5c .word 0x10009d5c
|
|
100022cc: 10009e7c .word 0x10009e7c
|
|
100022d0: 10009dbc .word 0x10009dbc
|
|
100022d4: 10009df8 .word 0x10009df8
|
|
100022d8: 10009e14 .word 0x10009e14
|
|
100022dc: 10009e60 .word 0x10009e60
|
|
|
|
100022e0 <watchdog_start_tick>:
|
|
100022e0: 2380 movs r3, #128 @ 0x80
|
|
100022e2: 009b lsls r3, r3, #2
|
|
100022e4: 4303 orrs r3, r0
|
|
100022e6: 4a01 ldr r2, [pc, #4] @ (100022ec <watchdog_start_tick+0xc>)
|
|
100022e8: 62d3 str r3, [r2, #44] @ 0x2c
|
|
100022ea: 4770 bx lr
|
|
100022ec: 40058000 .word 0x40058000
|
|
|
|
100022f0 <watchdog_update>:
|
|
100022f0: 4b02 ldr r3, [pc, #8] @ (100022fc <watchdog_update+0xc>)
|
|
100022f2: 681a ldr r2, [r3, #0]
|
|
100022f4: 4b02 ldr r3, [pc, #8] @ (10002300 <watchdog_update+0x10>)
|
|
100022f6: 605a str r2, [r3, #4]
|
|
100022f8: 4770 bx lr
|
|
100022fa: 46c0 nop @ (mov r8, r8)
|
|
100022fc: 20001700 .word 0x20001700
|
|
10002300: 40058000 .word 0x40058000
|
|
|
|
10002304 <_watchdog_enable>:
|
|
10002304: b510 push {r4, lr}
|
|
10002306: 4b17 ldr r3, [pc, #92] @ (10002364 <_watchdog_enable+0x60>)
|
|
10002308: 2280 movs r2, #128 @ 0x80
|
|
1000230a: 05d2 lsls r2, r2, #23
|
|
1000230c: 601a str r2, [r3, #0]
|
|
1000230e: 4b16 ldr r3, [pc, #88] @ (10002368 <_watchdog_enable+0x64>)
|
|
10002310: 4a16 ldr r2, [pc, #88] @ (1000236c <_watchdog_enable+0x68>)
|
|
10002312: 601a str r2, [r3, #0]
|
|
10002314: 2900 cmp r1, #0
|
|
10002316: d00a beq.n 1000232e <_watchdog_enable+0x2a>
|
|
10002318: 4b15 ldr r3, [pc, #84] @ (10002370 <_watchdog_enable+0x6c>)
|
|
1000231a: 22e0 movs r2, #224 @ 0xe0
|
|
1000231c: 04d2 lsls r2, r2, #19
|
|
1000231e: 601a str r2, [r3, #0]
|
|
10002320: 2800 cmp r0, #0
|
|
10002322: d109 bne.n 10002338 <_watchdog_enable+0x34>
|
|
10002324: 4b12 ldr r3, [pc, #72] @ (10002370 <_watchdog_enable+0x6c>)
|
|
10002326: 2280 movs r2, #128 @ 0x80
|
|
10002328: 0612 lsls r2, r2, #24
|
|
1000232a: 601a str r2, [r3, #0]
|
|
1000232c: bd10 pop {r4, pc}
|
|
1000232e: 4b0d ldr r3, [pc, #52] @ (10002364 <_watchdog_enable+0x60>)
|
|
10002330: 22e0 movs r2, #224 @ 0xe0
|
|
10002332: 04d2 lsls r2, r2, #19
|
|
10002334: 601a str r2, [r3, #0]
|
|
10002336: e7f3 b.n 10002320 <_watchdog_enable+0x1c>
|
|
10002338: 0143 lsls r3, r0, #5
|
|
1000233a: 1a1b subs r3, r3, r0
|
|
1000233c: 009b lsls r3, r3, #2
|
|
1000233e: 1818 adds r0, r3, r0
|
|
10002340: 0100 lsls r0, r0, #4
|
|
10002342: 4b0c ldr r3, [pc, #48] @ (10002374 <_watchdog_enable+0x70>)
|
|
10002344: 6018 str r0, [r3, #0]
|
|
10002346: 2380 movs r3, #128 @ 0x80
|
|
10002348: 045b lsls r3, r3, #17
|
|
1000234a: 4298 cmp r0, r3
|
|
1000234c: d302 bcc.n 10002354 <_watchdog_enable+0x50>
|
|
1000234e: 4b09 ldr r3, [pc, #36] @ (10002374 <_watchdog_enable+0x70>)
|
|
10002350: 4a09 ldr r2, [pc, #36] @ (10002378 <_watchdog_enable+0x74>)
|
|
10002352: 601a str r2, [r3, #0]
|
|
10002354: f7ff ffcc bl 100022f0 <watchdog_update>
|
|
10002358: 4b05 ldr r3, [pc, #20] @ (10002370 <_watchdog_enable+0x6c>)
|
|
1000235a: 2280 movs r2, #128 @ 0x80
|
|
1000235c: 05d2 lsls r2, r2, #23
|
|
1000235e: 601a str r2, [r3, #0]
|
|
10002360: e7e4 b.n 1000232c <_watchdog_enable+0x28>
|
|
10002362: 46c0 nop @ (mov r8, r8)
|
|
10002364: 4005b000 .word 0x4005b000
|
|
10002368: 40012008 .word 0x40012008
|
|
1000236c: 0001fffc .word 0x0001fffc
|
|
10002370: 4005a000 .word 0x4005a000
|
|
10002374: 20001700 .word 0x20001700
|
|
10002378: 00ffffff .word 0x00ffffff
|
|
|
|
1000237c <watchdog_reboot>:
|
|
1000237c: b510 push {r4, lr}
|
|
1000237e: 0003 movs r3, r0
|
|
10002380: 0010 movs r0, r2
|
|
10002382: 4a0c ldr r2, [pc, #48] @ (100023b4 <watchdog_reboot+0x38>)
|
|
10002384: 2480 movs r4, #128 @ 0x80
|
|
10002386: 05e4 lsls r4, r4, #23
|
|
10002388: 6014 str r4, [r2, #0]
|
|
1000238a: 2b00 cmp r3, #0
|
|
1000238c: d00d beq.n 100023aa <watchdog_reboot+0x2e>
|
|
1000238e: 2201 movs r2, #1
|
|
10002390: 4313 orrs r3, r2
|
|
10002392: 4a09 ldr r2, [pc, #36] @ (100023b8 <watchdog_reboot+0x3c>)
|
|
10002394: 4c09 ldr r4, [pc, #36] @ (100023bc <watchdog_reboot+0x40>)
|
|
10002396: 61d4 str r4, [r2, #28]
|
|
10002398: 4c09 ldr r4, [pc, #36] @ (100023c0 <watchdog_reboot+0x44>)
|
|
1000239a: 405c eors r4, r3
|
|
1000239c: 6214 str r4, [r2, #32]
|
|
1000239e: 6251 str r1, [r2, #36] @ 0x24
|
|
100023a0: 6293 str r3, [r2, #40] @ 0x28
|
|
100023a2: 2100 movs r1, #0
|
|
100023a4: f7ff ffae bl 10002304 <_watchdog_enable>
|
|
100023a8: bd10 pop {r4, pc}
|
|
100023aa: 4b03 ldr r3, [pc, #12] @ (100023b8 <watchdog_reboot+0x3c>)
|
|
100023ac: 2200 movs r2, #0
|
|
100023ae: 61da str r2, [r3, #28]
|
|
100023b0: e7f7 b.n 100023a2 <watchdog_reboot+0x26>
|
|
100023b2: 46c0 nop @ (mov r8, r8)
|
|
100023b4: 4005b000 .word 0x4005b000
|
|
100023b8: 40058000 .word 0x40058000
|
|
100023bc: b007c0d3 .word 0xb007c0d3
|
|
100023c0: 4ff83f2d .word 0x4ff83f2d
|
|
|
|
100023c4 <xosc_init>:
|
|
100023c4: 4b06 ldr r3, [pc, #24] @ (100023e0 <xosc_init+0x1c>)
|
|
100023c6: 22aa movs r2, #170 @ 0xaa
|
|
100023c8: 0112 lsls r2, r2, #4
|
|
100023ca: 601a str r2, [r3, #0]
|
|
100023cc: 222f movs r2, #47 @ 0x2f
|
|
100023ce: 60da str r2, [r3, #12]
|
|
100023d0: 4b04 ldr r3, [pc, #16] @ (100023e4 <xosc_init+0x20>)
|
|
100023d2: 4a05 ldr r2, [pc, #20] @ (100023e8 <xosc_init+0x24>)
|
|
100023d4: 601a str r2, [r3, #0]
|
|
100023d6: 4b02 ldr r3, [pc, #8] @ (100023e0 <xosc_init+0x1c>)
|
|
100023d8: 685b ldr r3, [r3, #4]
|
|
100023da: 2b00 cmp r3, #0
|
|
100023dc: dafb bge.n 100023d6 <xosc_init+0x12>
|
|
100023de: 4770 bx lr
|
|
100023e0: 40024000 .word 0x40024000
|
|
100023e4: 40026000 .word 0x40026000
|
|
100023e8: 00fab000 .word 0x00fab000
|
|
|
|
100023ec <exception_is_compile_time_default>:
|
|
100023ec: 4b05 ldr r3, [pc, #20] @ (10002404 <exception_is_compile_time_default+0x18>)
|
|
100023ee: 4298 cmp r0, r3
|
|
100023f0: d304 bcc.n 100023fc <exception_is_compile_time_default+0x10>
|
|
100023f2: 4b05 ldr r3, [pc, #20] @ (10002408 <exception_is_compile_time_default+0x1c>)
|
|
100023f4: 4298 cmp r0, r3
|
|
100023f6: d303 bcc.n 10002400 <exception_is_compile_time_default+0x14>
|
|
100023f8: 2000 movs r0, #0
|
|
100023fa: e000 b.n 100023fe <exception_is_compile_time_default+0x12>
|
|
100023fc: 2000 movs r0, #0
|
|
100023fe: 4770 bx lr
|
|
10002400: 2001 movs r0, #1
|
|
10002402: e7fc b.n 100023fe <exception_is_compile_time_default+0x12>
|
|
10002404: 100001c0 .word 0x100001c0
|
|
10002408: 100001cc .word 0x100001cc
|
|
|
|
1000240c <set_raw_exception_handler_and_restore_interrupts>:
|
|
1000240c: 4b04 ldr r3, [pc, #16] @ (10002420 <set_raw_exception_handler_and_restore_interrupts+0x14>)
|
|
1000240e: 689b ldr r3, [r3, #8]
|
|
10002410: 3010 adds r0, #16
|
|
10002412: 0080 lsls r0, r0, #2
|
|
10002414: 5019 str r1, [r3, r0]
|
|
10002416: f3bf 8f5f dmb sy
|
|
1000241a: f382 8810 msr PRIMASK, r2
|
|
1000241e: 4770 bx lr
|
|
10002420: e000ed00 .word 0xe000ed00
|
|
|
|
10002424 <exception_get_vtable_handler>:
|
|
10002424: 4b02 ldr r3, [pc, #8] @ (10002430 <exception_get_vtable_handler+0xc>)
|
|
10002426: 689b ldr r3, [r3, #8]
|
|
10002428: 3010 adds r0, #16
|
|
1000242a: 0080 lsls r0, r0, #2
|
|
1000242c: 58c0 ldr r0, [r0, r3]
|
|
1000242e: 4770 bx lr
|
|
10002430: e000ed00 .word 0xe000ed00
|
|
|
|
10002434 <exception_set_exclusive_handler>:
|
|
10002434: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10002436: 0005 movs r5, r0
|
|
10002438: 000e movs r6, r1
|
|
1000243a: f3ef 8710 mrs r7, PRIMASK
|
|
1000243e: b672 cpsid i
|
|
10002440: f7ff fff0 bl 10002424 <exception_get_vtable_handler>
|
|
10002444: 0004 movs r4, r0
|
|
10002446: 42b0 cmp r0, r6
|
|
10002448: d003 beq.n 10002452 <exception_set_exclusive_handler+0x1e>
|
|
1000244a: f7ff ffcf bl 100023ec <exception_is_compile_time_default>
|
|
1000244e: 2800 cmp r0, #0
|
|
10002450: d006 beq.n 10002460 <exception_set_exclusive_handler+0x2c>
|
|
10002452: 003a movs r2, r7
|
|
10002454: 0031 movs r1, r6
|
|
10002456: 0028 movs r0, r5
|
|
10002458: f7ff ffd8 bl 1000240c <set_raw_exception_handler_and_restore_interrupts>
|
|
1000245c: 0020 movs r0, r4
|
|
1000245e: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10002460: 4b02 ldr r3, [pc, #8] @ (1000246c <exception_set_exclusive_handler+0x38>)
|
|
10002462: 4a03 ldr r2, [pc, #12] @ (10002470 <exception_set_exclusive_handler+0x3c>)
|
|
10002464: 4803 ldr r0, [pc, #12] @ (10002474 <exception_set_exclusive_handler+0x40>)
|
|
10002466: 212f movs r1, #47 @ 0x2f
|
|
10002468: f000 f80c bl 10002484 <__assert_func>
|
|
1000246c: 10009e88 .word 0x10009e88
|
|
10002470: 10009f14 .word 0x10009f14
|
|
10002474: 10009ecc .word 0x10009ecc
|
|
|
|
10002478 <_exit>:
|
|
10002478: be00 bkpt 0x0000
|
|
1000247a: e7fd b.n 10002478 <_exit>
|
|
|
|
1000247c <exit>:
|
|
1000247c: b510 push {r4, lr}
|
|
1000247e: f7ff fffb bl 10002478 <_exit>
|
|
...
|
|
|
|
10002484 <__assert_func>:
|
|
10002484: b530 push {r4, r5, lr}
|
|
10002486: b083 sub sp, #12
|
|
10002488: 000d movs r5, r1
|
|
1000248a: 0019 movs r1, r3
|
|
1000248c: 2a00 cmp r2, #0
|
|
1000248e: d00b beq.n 100024a8 <__assert_func+0x24>
|
|
10002490: 4b07 ldr r3, [pc, #28] @ (100024b0 <__assert_func+0x2c>)
|
|
10002492: 4c08 ldr r4, [pc, #32] @ (100024b4 <__assert_func+0x30>)
|
|
10002494: 9201 str r2, [sp, #4]
|
|
10002496: 9300 str r3, [sp, #0]
|
|
10002498: 002b movs r3, r5
|
|
1000249a: 0002 movs r2, r0
|
|
1000249c: 0020 movs r0, r4
|
|
1000249e: f001 ffcd bl 1000443c <__wrap_printf>
|
|
100024a2: 2001 movs r0, #1
|
|
100024a4: f7ff ffe8 bl 10002478 <_exit>
|
|
100024a8: 4b03 ldr r3, [pc, #12] @ (100024b8 <__assert_func+0x34>)
|
|
100024aa: 001a movs r2, r3
|
|
100024ac: e7f1 b.n 10002492 <__assert_func+0xe>
|
|
100024ae: 46c0 nop @ (mov r8, r8)
|
|
100024b0: 10009f34 .word 0x10009f34
|
|
100024b4: 10009f44 .word 0x10009f44
|
|
100024b8: 10009f40 .word 0x10009f40
|
|
|
|
100024bc <runtime_init>:
|
|
100024bc: b570 push {r4, r5, r6, lr}
|
|
100024be: 4b2b ldr r3, [pc, #172] @ (1000256c <runtime_init+0xb0>)
|
|
100024c0: 4a2b ldr r2, [pc, #172] @ (10002570 <runtime_init+0xb4>)
|
|
100024c2: 601a str r2, [r3, #0]
|
|
100024c4: 4b2b ldr r3, [pc, #172] @ (10002574 <runtime_init+0xb8>)
|
|
100024c6: 4a2c ldr r2, [pc, #176] @ (10002578 <runtime_init+0xbc>)
|
|
100024c8: 601a str r2, [r3, #0]
|
|
100024ca: 4b2c ldr r3, [pc, #176] @ (1000257c <runtime_init+0xc0>)
|
|
100024cc: 689a ldr r2, [r3, #8]
|
|
100024ce: 4b2a ldr r3, [pc, #168] @ (10002578 <runtime_init+0xbc>)
|
|
100024d0: 4393 bics r3, r2
|
|
100024d2: d1fa bne.n 100024ca <runtime_init+0xe>
|
|
100024d4: 4c2a ldr r4, [pc, #168] @ (10002580 <runtime_init+0xc4>)
|
|
100024d6: e001 b.n 100024dc <runtime_init+0x20>
|
|
100024d8: cc08 ldmia r4!, {r3}
|
|
100024da: 4798 blx r3
|
|
100024dc: 4b29 ldr r3, [pc, #164] @ (10002584 <runtime_init+0xc8>)
|
|
100024de: 429c cmp r4, r3
|
|
100024e0: d3fa bcc.n 100024d8 <runtime_init+0x1c>
|
|
100024e2: f7fe fa23 bl 1000092c <clocks_init>
|
|
100024e6: 4b23 ldr r3, [pc, #140] @ (10002574 <runtime_init+0xb8>)
|
|
100024e8: 4a27 ldr r2, [pc, #156] @ (10002588 <runtime_init+0xcc>)
|
|
100024ea: 601a str r2, [r3, #0]
|
|
100024ec: 4b23 ldr r3, [pc, #140] @ (1000257c <runtime_init+0xc0>)
|
|
100024ee: 689b ldr r3, [r3, #8]
|
|
100024f0: 43db mvns r3, r3
|
|
100024f2: 01db lsls r3, r3, #7
|
|
100024f4: d1fa bne.n 100024ec <runtime_init+0x30>
|
|
100024f6: 4b25 ldr r3, [pc, #148] @ (1000258c <runtime_init+0xd0>)
|
|
100024f8: 2240 movs r2, #64 @ 0x40
|
|
100024fa: 679a str r2, [r3, #120] @ 0x78
|
|
100024fc: 675a str r2, [r3, #116] @ 0x74
|
|
100024fe: 671a str r2, [r3, #112] @ 0x70
|
|
10002500: 66da str r2, [r3, #108] @ 0x6c
|
|
10002502: 4c23 ldr r4, [pc, #140] @ (10002590 <runtime_init+0xd4>)
|
|
10002504: e009 b.n 1000251a <runtime_init+0x5e>
|
|
10002506: 4b23 ldr r3, [pc, #140] @ (10002594 <runtime_init+0xd8>)
|
|
10002508: 4a23 ldr r2, [pc, #140] @ (10002598 <runtime_init+0xdc>)
|
|
1000250a: 4824 ldr r0, [pc, #144] @ (1000259c <runtime_init+0xe0>)
|
|
1000250c: 2187 movs r1, #135 @ 0x87
|
|
1000250e: f7ff ffb9 bl 10002484 <__assert_func>
|
|
10002512: 0020 movs r0, r4
|
|
10002514: f7fe fe8b bl 1000122e <mutex_init>
|
|
10002518: 3408 adds r4, #8
|
|
1000251a: 4b21 ldr r3, [pc, #132] @ (100025a0 <runtime_init+0xe4>)
|
|
1000251c: 429c cmp r4, r3
|
|
1000251e: d209 bcs.n 10002534 <runtime_init+0x78>
|
|
10002520: 6823 ldr r3, [r4, #0]
|
|
10002522: 2b00 cmp r3, #0
|
|
10002524: d0f5 beq.n 10002512 <runtime_init+0x56>
|
|
10002526: 2b01 cmp r3, #1
|
|
10002528: d1ed bne.n 10002506 <runtime_init+0x4a>
|
|
1000252a: 0020 movs r0, r4
|
|
1000252c: f7fe fe8d bl 1000124a <recursive_mutex_init>
|
|
10002530: 340c adds r4, #12
|
|
10002532: e7f2 b.n 1000251a <runtime_init+0x5e>
|
|
10002534: 4d1b ldr r5, [pc, #108] @ (100025a4 <runtime_init+0xe8>)
|
|
10002536: 68a9 ldr r1, [r5, #8]
|
|
10002538: 4c1b ldr r4, [pc, #108] @ (100025a8 <runtime_init+0xec>)
|
|
1000253a: 22c0 movs r2, #192 @ 0xc0
|
|
1000253c: 0020 movs r0, r4
|
|
1000253e: f001 fded bl 1000411c <__wrap___aeabi_memcpy>
|
|
10002542: 60ac str r4, [r5, #8]
|
|
10002544: f3ef 8305 mrs r3, IPSR
|
|
10002548: 2b00 cmp r3, #0
|
|
1000254a: d000 beq.n 1000254e <runtime_init+0x92>
|
|
1000254c: be00 bkpt 0x0000
|
|
1000254e: f7fe f90d bl 1000076c <spin_locks_reset>
|
|
10002552: f7fe fdeb bl 1000112c <irq_init_priorities>
|
|
10002556: f7ff f9b1 bl 100018bc <alarm_pool_init_default>
|
|
1000255a: 4c14 ldr r4, [pc, #80] @ (100025ac <runtime_init+0xf0>)
|
|
1000255c: e001 b.n 10002562 <runtime_init+0xa6>
|
|
1000255e: cc08 ldmia r4!, {r3}
|
|
10002560: 4798 blx r3
|
|
10002562: 4b13 ldr r3, [pc, #76] @ (100025b0 <runtime_init+0xf4>)
|
|
10002564: 429c cmp r4, r3
|
|
10002566: d3fa bcc.n 1000255e <runtime_init+0xa2>
|
|
10002568: bd70 pop {r4, r5, r6, pc}
|
|
1000256a: 46c0 nop @ (mov r8, r8)
|
|
1000256c: 4000e000 .word 0x4000e000
|
|
10002570: fefbcdbf .word 0xfefbcdbf
|
|
10002574: 4000f000 .word 0x4000f000
|
|
10002578: 003c7ffe .word 0x003c7ffe
|
|
1000257c: 4000c000 .word 0x4000c000
|
|
10002580: 20000bd4 .word 0x20000bd4
|
|
10002584: 20000be4 .word 0x20000be4
|
|
10002588: 01ffffff .word 0x01ffffff
|
|
1000258c: 4001f000 .word 0x4001f000
|
|
10002590: 20000bc4 .word 0x20000bc4
|
|
10002594: 10009f74 .word 0x10009f74
|
|
10002598: 10009ff8 .word 0x10009ff8
|
|
1000259c: 10009f94 .word 0x10009f94
|
|
100025a0: 20000bd4 .word 0x20000bd4
|
|
100025a4: e000ed00 .word 0xe000ed00
|
|
100025a8: 20000000 .word 0x20000000
|
|
100025ac: 20000be4 .word 0x20000be4
|
|
100025b0: 20000bf0 .word 0x20000bf0
|
|
|
|
100025b4 <panic>:
|
|
100025b4: b40f push {r0, r1, r2, r3}
|
|
100025b6: b500 push {lr}
|
|
100025b8: b083 sub sp, #12
|
|
100025ba: 4808 ldr r0, [pc, #32] @ (100025dc <panic+0x28>)
|
|
100025bc: f001 ff0e bl 100043dc <__wrap_puts>
|
|
100025c0: 9b04 ldr r3, [sp, #16]
|
|
100025c2: 2b00 cmp r3, #0
|
|
100025c4: d007 beq.n 100025d6 <panic+0x22>
|
|
100025c6: a905 add r1, sp, #20
|
|
100025c8: 9101 str r1, [sp, #4]
|
|
100025ca: 0018 movs r0, r3
|
|
100025cc: f001 ff16 bl 100043fc <__wrap_vprintf>
|
|
100025d0: 4803 ldr r0, [pc, #12] @ (100025e0 <panic+0x2c>)
|
|
100025d2: f001 ff03 bl 100043dc <__wrap_puts>
|
|
100025d6: 2001 movs r0, #1
|
|
100025d8: f7ff ff4e bl 10002478 <_exit>
|
|
100025dc: 10009fd4 .word 0x10009fd4
|
|
100025e0: 10009fe4 .word 0x10009fe4
|
|
|
|
100025e4 <panic_unsupported>:
|
|
100025e4: b510 push {r4, lr}
|
|
100025e6: 4801 ldr r0, [pc, #4] @ (100025ec <panic_unsupported+0x8>)
|
|
100025e8: f7ff ffe4 bl 100025b4 <panic>
|
|
100025ec: 10009fe8 .word 0x10009fe8
|
|
|
|
100025f0 <_out_null>:
|
|
100025f0: 4770 bx lr
|
|
|
|
100025f2 <_out_fct>:
|
|
100025f2: b510 push {r4, lr}
|
|
100025f4: 2800 cmp r0, #0
|
|
100025f6: d002 beq.n 100025fe <_out_fct+0xc>
|
|
100025f8: 680b ldr r3, [r1, #0]
|
|
100025fa: 6849 ldr r1, [r1, #4]
|
|
100025fc: 4798 blx r3
|
|
100025fe: bd10 pop {r4, pc}
|
|
|
|
10002600 <_atoi>:
|
|
10002600: 0001 movs r1, r0
|
|
10002602: 2000 movs r0, #0
|
|
10002604: e007 b.n 10002616 <_atoi+0x16>
|
|
10002606: 0083 lsls r3, r0, #2
|
|
10002608: 181b adds r3, r3, r0
|
|
1000260a: 005b lsls r3, r3, #1
|
|
1000260c: 1c50 adds r0, r2, #1
|
|
1000260e: 6008 str r0, [r1, #0]
|
|
10002610: 7810 ldrb r0, [r2, #0]
|
|
10002612: 18c0 adds r0, r0, r3
|
|
10002614: 3830 subs r0, #48 @ 0x30
|
|
10002616: 680a ldr r2, [r1, #0]
|
|
10002618: 7813 ldrb r3, [r2, #0]
|
|
1000261a: 3b30 subs r3, #48 @ 0x30
|
|
1000261c: b2db uxtb r3, r3
|
|
1000261e: 2b09 cmp r3, #9
|
|
10002620: d9f1 bls.n 10002606 <_atoi+0x6>
|
|
10002622: 4770 bx lr
|
|
|
|
10002624 <_out_rev>:
|
|
10002624: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002626: 46de mov lr, fp
|
|
10002628: 4657 mov r7, sl
|
|
1000262a: 464e mov r6, r9
|
|
1000262c: 4645 mov r5, r8
|
|
1000262e: b5e0 push {r5, r6, r7, lr}
|
|
10002630: b083 sub sp, #12
|
|
10002632: 4693 mov fp, r2
|
|
10002634: 001f movs r7, r3
|
|
10002636: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
10002638: 469a mov sl, r3
|
|
1000263a: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
1000263c: 9b0e ldr r3, [sp, #56] @ 0x38
|
|
1000263e: 4699 mov r9, r3
|
|
10002640: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
10002642: 079b lsls r3, r3, #30
|
|
10002644: d003 beq.n 1000264e <_out_rev+0x2a>
|
|
10002646: 46b8 mov r8, r7
|
|
10002648: 000f movs r7, r1
|
|
1000264a: 0006 movs r6, r0
|
|
1000264c: e022 b.n 10002694 <_out_rev+0x70>
|
|
1000264e: 9201 str r2, [sp, #4]
|
|
10002650: 46a3 mov fp, r4
|
|
10002652: 4688 mov r8, r1
|
|
10002654: 464e mov r6, r9
|
|
10002656: 46b9 mov r9, r7
|
|
10002658: 0007 movs r7, r0
|
|
1000265a: 42b4 cmp r4, r6
|
|
1000265c: d207 bcs.n 1000266e <_out_rev+0x4a>
|
|
1000265e: 1c55 adds r5, r2, #1
|
|
10002660: 464b mov r3, r9
|
|
10002662: 4641 mov r1, r8
|
|
10002664: 2020 movs r0, #32
|
|
10002666: 47b8 blx r7
|
|
10002668: 3401 adds r4, #1
|
|
1000266a: 002a movs r2, r5
|
|
1000266c: e7f5 b.n 1000265a <_out_rev+0x36>
|
|
1000266e: 003d movs r5, r7
|
|
10002670: 464f mov r7, r9
|
|
10002672: 465c mov r4, fp
|
|
10002674: 9b01 ldr r3, [sp, #4]
|
|
10002676: 469b mov fp, r3
|
|
10002678: 46b1 mov r9, r6
|
|
1000267a: 4646 mov r6, r8
|
|
1000267c: 46b8 mov r8, r7
|
|
1000267e: 0037 movs r7, r6
|
|
10002680: 002e movs r6, r5
|
|
10002682: e007 b.n 10002694 <_out_rev+0x70>
|
|
10002684: 3c01 subs r4, #1
|
|
10002686: 1c55 adds r5, r2, #1
|
|
10002688: 4653 mov r3, sl
|
|
1000268a: 5d18 ldrb r0, [r3, r4]
|
|
1000268c: 4643 mov r3, r8
|
|
1000268e: 0039 movs r1, r7
|
|
10002690: 47b0 blx r6
|
|
10002692: 002a movs r2, r5
|
|
10002694: 2c00 cmp r4, #0
|
|
10002696: d1f5 bne.n 10002684 <_out_rev+0x60>
|
|
10002698: 0035 movs r5, r6
|
|
1000269a: 003e movs r6, r7
|
|
1000269c: 4647 mov r7, r8
|
|
1000269e: 9b0f ldr r3, [sp, #60] @ 0x3c
|
|
100026a0: 079b lsls r3, r3, #30
|
|
100026a2: d407 bmi.n 100026b4 <_out_rev+0x90>
|
|
100026a4: 0010 movs r0, r2
|
|
100026a6: b003 add sp, #12
|
|
100026a8: bcf0 pop {r4, r5, r6, r7}
|
|
100026aa: 46bb mov fp, r7
|
|
100026ac: 46b2 mov sl, r6
|
|
100026ae: 46a9 mov r9, r5
|
|
100026b0: 46a0 mov r8, r4
|
|
100026b2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100026b4: 46b0 mov r8, r6
|
|
100026b6: 464e mov r6, r9
|
|
100026b8: 46b9 mov r9, r7
|
|
100026ba: 002f movs r7, r5
|
|
100026bc: 465d mov r5, fp
|
|
100026be: 1b53 subs r3, r2, r5
|
|
100026c0: 42b3 cmp r3, r6
|
|
100026c2: d2ef bcs.n 100026a4 <_out_rev+0x80>
|
|
100026c4: 1c54 adds r4, r2, #1
|
|
100026c6: 464b mov r3, r9
|
|
100026c8: 4641 mov r1, r8
|
|
100026ca: 2020 movs r0, #32
|
|
100026cc: 47b8 blx r7
|
|
100026ce: 0022 movs r2, r4
|
|
100026d0: e7f5 b.n 100026be <_out_rev+0x9a>
|
|
|
|
100026d2 <_ntoa_format>:
|
|
100026d2: b5f0 push {r4, r5, r6, r7, lr}
|
|
100026d4: 46ce mov lr, r9
|
|
100026d6: 4647 mov r7, r8
|
|
100026d8: b580 push {r7, lr}
|
|
100026da: b085 sub sp, #20
|
|
100026dc: 4694 mov ip, r2
|
|
100026de: 4698 mov r8, r3
|
|
100026e0: 9d0c ldr r5, [sp, #48] @ 0x30
|
|
100026e2: 9c0d ldr r4, [sp, #52] @ 0x34
|
|
100026e4: ab0e add r3, sp, #56 @ 0x38
|
|
100026e6: 781b ldrb r3, [r3, #0]
|
|
100026e8: 4699 mov r9, r3
|
|
100026ea: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
100026ec: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100026ee: 9e12 ldr r6, [sp, #72] @ 0x48
|
|
100026f0: 07b7 lsls r7, r6, #30
|
|
100026f2: d41c bmi.n 1000272e <_ntoa_format+0x5c>
|
|
100026f4: 2b00 cmp r3, #0
|
|
100026f6: d00c beq.n 10002712 <_ntoa_format+0x40>
|
|
100026f8: 07f7 lsls r7, r6, #31
|
|
100026fa: d50a bpl.n 10002712 <_ntoa_format+0x40>
|
|
100026fc: 464f mov r7, r9
|
|
100026fe: 2f00 cmp r7, #0
|
|
10002700: d102 bne.n 10002708 <_ntoa_format+0x36>
|
|
10002702: 370c adds r7, #12
|
|
10002704: 4237 tst r7, r6
|
|
10002706: d004 beq.n 10002712 <_ntoa_format+0x40>
|
|
10002708: 3b01 subs r3, #1
|
|
1000270a: e002 b.n 10002712 <_ntoa_format+0x40>
|
|
1000270c: 2730 movs r7, #48 @ 0x30
|
|
1000270e: 552f strb r7, [r5, r4]
|
|
10002710: 3401 adds r4, #1
|
|
10002712: 4294 cmp r4, r2
|
|
10002714: d201 bcs.n 1000271a <_ntoa_format+0x48>
|
|
10002716: 2c1f cmp r4, #31
|
|
10002718: d9f8 bls.n 1000270c <_ntoa_format+0x3a>
|
|
1000271a: 07f7 lsls r7, r6, #31
|
|
1000271c: d507 bpl.n 1000272e <_ntoa_format+0x5c>
|
|
1000271e: 429c cmp r4, r3
|
|
10002720: d205 bcs.n 1000272e <_ntoa_format+0x5c>
|
|
10002722: 2c1f cmp r4, #31
|
|
10002724: d803 bhi.n 1000272e <_ntoa_format+0x5c>
|
|
10002726: 2730 movs r7, #48 @ 0x30
|
|
10002728: 552f strb r7, [r5, r4]
|
|
1000272a: 3401 adds r4, #1
|
|
1000272c: e7f5 b.n 1000271a <_ntoa_format+0x48>
|
|
1000272e: 06f7 lsls r7, r6, #27
|
|
10002730: d512 bpl.n 10002758 <_ntoa_format+0x86>
|
|
10002732: 0577 lsls r7, r6, #21
|
|
10002734: d405 bmi.n 10002742 <_ntoa_format+0x70>
|
|
10002736: 2c00 cmp r4, #0
|
|
10002738: d003 beq.n 10002742 <_ntoa_format+0x70>
|
|
1000273a: 4294 cmp r4, r2
|
|
1000273c: d021 beq.n 10002782 <_ntoa_format+0xb0>
|
|
1000273e: 429c cmp r4, r3
|
|
10002740: d01f beq.n 10002782 <_ntoa_format+0xb0>
|
|
10002742: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
10002744: 2a10 cmp r2, #16
|
|
10002746: d032 beq.n 100027ae <_ntoa_format+0xdc>
|
|
10002748: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
1000274a: 2a02 cmp r2, #2
|
|
1000274c: d037 beq.n 100027be <_ntoa_format+0xec>
|
|
1000274e: 2c1f cmp r4, #31
|
|
10002750: d80a bhi.n 10002768 <_ntoa_format+0x96>
|
|
10002752: 2230 movs r2, #48 @ 0x30
|
|
10002754: 552a strb r2, [r5, r4]
|
|
10002756: 3401 adds r4, #1
|
|
10002758: 2c1f cmp r4, #31
|
|
1000275a: d805 bhi.n 10002768 <_ntoa_format+0x96>
|
|
1000275c: 464a mov r2, r9
|
|
1000275e: 2a00 cmp r2, #0
|
|
10002760: d033 beq.n 100027ca <_ntoa_format+0xf8>
|
|
10002762: 222d movs r2, #45 @ 0x2d
|
|
10002764: 552a strb r2, [r5, r4]
|
|
10002766: 3401 adds r4, #1
|
|
10002768: 9603 str r6, [sp, #12]
|
|
1000276a: 9302 str r3, [sp, #8]
|
|
1000276c: 9401 str r4, [sp, #4]
|
|
1000276e: 9500 str r5, [sp, #0]
|
|
10002770: 4643 mov r3, r8
|
|
10002772: 4662 mov r2, ip
|
|
10002774: f7ff ff56 bl 10002624 <_out_rev>
|
|
10002778: b005 add sp, #20
|
|
1000277a: bcc0 pop {r6, r7}
|
|
1000277c: 46b9 mov r9, r7
|
|
1000277e: 46b0 mov r8, r6
|
|
10002780: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002782: 1e62 subs r2, r4, #1
|
|
10002784: 2c01 cmp r4, #1
|
|
10002786: d010 beq.n 100027aa <_ntoa_format+0xd8>
|
|
10002788: 9f0f ldr r7, [sp, #60] @ 0x3c
|
|
1000278a: 2f10 cmp r7, #16
|
|
1000278c: d00b beq.n 100027a6 <_ntoa_format+0xd4>
|
|
1000278e: 0014 movs r4, r2
|
|
10002790: 9a0f ldr r2, [sp, #60] @ 0x3c
|
|
10002792: 2a10 cmp r2, #16
|
|
10002794: d1d8 bne.n 10002748 <_ntoa_format+0x76>
|
|
10002796: 06b2 lsls r2, r6, #26
|
|
10002798: d5d6 bpl.n 10002748 <_ntoa_format+0x76>
|
|
1000279a: 2c1f cmp r4, #31
|
|
1000279c: d8d4 bhi.n 10002748 <_ntoa_format+0x76>
|
|
1000279e: 2258 movs r2, #88 @ 0x58
|
|
100027a0: 552a strb r2, [r5, r4]
|
|
100027a2: 3401 adds r4, #1
|
|
100027a4: e7d3 b.n 1000274e <_ntoa_format+0x7c>
|
|
100027a6: 3c02 subs r4, #2
|
|
100027a8: e7cb b.n 10002742 <_ntoa_format+0x70>
|
|
100027aa: 0014 movs r4, r2
|
|
100027ac: e7c9 b.n 10002742 <_ntoa_format+0x70>
|
|
100027ae: 06b2 lsls r2, r6, #26
|
|
100027b0: d4ee bmi.n 10002790 <_ntoa_format+0xbe>
|
|
100027b2: 2c1f cmp r4, #31
|
|
100027b4: d8ec bhi.n 10002790 <_ntoa_format+0xbe>
|
|
100027b6: 2278 movs r2, #120 @ 0x78
|
|
100027b8: 552a strb r2, [r5, r4]
|
|
100027ba: 3401 adds r4, #1
|
|
100027bc: e7c7 b.n 1000274e <_ntoa_format+0x7c>
|
|
100027be: 2c1f cmp r4, #31
|
|
100027c0: d8d2 bhi.n 10002768 <_ntoa_format+0x96>
|
|
100027c2: 3260 adds r2, #96 @ 0x60
|
|
100027c4: 552a strb r2, [r5, r4]
|
|
100027c6: 3401 adds r4, #1
|
|
100027c8: e7c1 b.n 1000274e <_ntoa_format+0x7c>
|
|
100027ca: 0772 lsls r2, r6, #29
|
|
100027cc: d503 bpl.n 100027d6 <_ntoa_format+0x104>
|
|
100027ce: 222b movs r2, #43 @ 0x2b
|
|
100027d0: 552a strb r2, [r5, r4]
|
|
100027d2: 3401 adds r4, #1
|
|
100027d4: e7c8 b.n 10002768 <_ntoa_format+0x96>
|
|
100027d6: 0732 lsls r2, r6, #28
|
|
100027d8: d5c6 bpl.n 10002768 <_ntoa_format+0x96>
|
|
100027da: 2220 movs r2, #32
|
|
100027dc: 552a strb r2, [r5, r4]
|
|
100027de: 3401 adds r4, #1
|
|
100027e0: e7c2 b.n 10002768 <_ntoa_format+0x96>
|
|
|
|
100027e2 <_ntoa_long>:
|
|
100027e2: b5f0 push {r4, r5, r6, r7, lr}
|
|
100027e4: 46de mov lr, fp
|
|
100027e6: 4657 mov r7, sl
|
|
100027e8: 464e mov r6, r9
|
|
100027ea: 4645 mov r5, r8
|
|
100027ec: b5e0 push {r5, r6, r7, lr}
|
|
100027ee: b093 sub sp, #76 @ 0x4c
|
|
100027f0: 4681 mov r9, r0
|
|
100027f2: 468a mov sl, r1
|
|
100027f4: 9208 str r2, [sp, #32]
|
|
100027f6: 9309 str r3, [sp, #36] @ 0x24
|
|
100027f8: ab1c add r3, sp, #112 @ 0x70
|
|
100027fa: cb10 ldmia r3!, {r4}
|
|
100027fc: 781b ldrb r3, [r3, #0]
|
|
100027fe: 469b mov fp, r3
|
|
10002800: 9d1e ldr r5, [sp, #120] @ 0x78
|
|
10002802: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002804: 4698 mov r8, r3
|
|
10002806: 2c00 cmp r4, #0
|
|
10002808: d103 bne.n 10002812 <_ntoa_long+0x30>
|
|
1000280a: 2310 movs r3, #16
|
|
1000280c: 4642 mov r2, r8
|
|
1000280e: 439a bics r2, r3
|
|
10002810: 4690 mov r8, r2
|
|
10002812: 2380 movs r3, #128 @ 0x80
|
|
10002814: 00db lsls r3, r3, #3
|
|
10002816: 4646 mov r6, r8
|
|
10002818: 401e ands r6, r3
|
|
1000281a: 4642 mov r2, r8
|
|
1000281c: 421a tst r2, r3
|
|
1000281e: d012 beq.n 10002846 <_ntoa_long+0x64>
|
|
10002820: 2c00 cmp r4, #0
|
|
10002822: d022 beq.n 1000286a <_ntoa_long+0x88>
|
|
10002824: 2600 movs r6, #0
|
|
10002826: e00e b.n 10002846 <_ntoa_long+0x64>
|
|
10002828: 3330 adds r3, #48 @ 0x30
|
|
1000282a: b2d9 uxtb r1, r3
|
|
1000282c: 1c77 adds r7, r6, #1
|
|
1000282e: ab0a add r3, sp, #40 @ 0x28
|
|
10002830: 5599 strb r1, [r3, r6]
|
|
10002832: 0029 movs r1, r5
|
|
10002834: 0020 movs r0, r4
|
|
10002836: f000 ffe1 bl 100037fc <__wrap___aeabi_uidiv>
|
|
1000283a: 42ac cmp r4, r5
|
|
1000283c: d316 bcc.n 1000286c <_ntoa_long+0x8a>
|
|
1000283e: 2f1f cmp r7, #31
|
|
10002840: d814 bhi.n 1000286c <_ntoa_long+0x8a>
|
|
10002842: 003e movs r6, r7
|
|
10002844: 0004 movs r4, r0
|
|
10002846: 0029 movs r1, r5
|
|
10002848: 0020 movs r0, r4
|
|
1000284a: f000 ffd7 bl 100037fc <__wrap___aeabi_uidiv>
|
|
1000284e: b2cb uxtb r3, r1
|
|
10002850: 2b09 cmp r3, #9
|
|
10002852: d9e9 bls.n 10002828 <_ntoa_long+0x46>
|
|
10002854: 4642 mov r2, r8
|
|
10002856: 0692 lsls r2, r2, #26
|
|
10002858: d505 bpl.n 10002866 <_ntoa_long+0x84>
|
|
1000285a: 2141 movs r1, #65 @ 0x41
|
|
1000285c: 18c9 adds r1, r1, r3
|
|
1000285e: b2c9 uxtb r1, r1
|
|
10002860: 390a subs r1, #10
|
|
10002862: b2c9 uxtb r1, r1
|
|
10002864: e7e2 b.n 1000282c <_ntoa_long+0x4a>
|
|
10002866: 2161 movs r1, #97 @ 0x61
|
|
10002868: e7f8 b.n 1000285c <_ntoa_long+0x7a>
|
|
1000286a: 0027 movs r7, r4
|
|
1000286c: 4643 mov r3, r8
|
|
1000286e: 9306 str r3, [sp, #24]
|
|
10002870: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
10002872: 9305 str r3, [sp, #20]
|
|
10002874: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002876: 9304 str r3, [sp, #16]
|
|
10002878: 9503 str r5, [sp, #12]
|
|
1000287a: 465b mov r3, fp
|
|
1000287c: 9302 str r3, [sp, #8]
|
|
1000287e: 9701 str r7, [sp, #4]
|
|
10002880: ab0a add r3, sp, #40 @ 0x28
|
|
10002882: 9300 str r3, [sp, #0]
|
|
10002884: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002886: 9a08 ldr r2, [sp, #32]
|
|
10002888: 4651 mov r1, sl
|
|
1000288a: 4648 mov r0, r9
|
|
1000288c: f7ff ff21 bl 100026d2 <_ntoa_format>
|
|
10002890: b013 add sp, #76 @ 0x4c
|
|
10002892: bcf0 pop {r4, r5, r6, r7}
|
|
10002894: 46bb mov fp, r7
|
|
10002896: 46b2 mov sl, r6
|
|
10002898: 46a9 mov r9, r5
|
|
1000289a: 46a0 mov r8, r4
|
|
1000289c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000289e <_ntoa_long_long>:
|
|
1000289e: b5f0 push {r4, r5, r6, r7, lr}
|
|
100028a0: 46de mov lr, fp
|
|
100028a2: 4657 mov r7, sl
|
|
100028a4: 464e mov r6, r9
|
|
100028a6: 4645 mov r5, r8
|
|
100028a8: b5e0 push {r5, r6, r7, lr}
|
|
100028aa: b097 sub sp, #92 @ 0x5c
|
|
100028ac: 900a str r0, [sp, #40] @ 0x28
|
|
100028ae: 910b str r1, [sp, #44] @ 0x2c
|
|
100028b0: 920c str r2, [sp, #48] @ 0x30
|
|
100028b2: 469a mov sl, r3
|
|
100028b4: 9b20 ldr r3, [sp, #128] @ 0x80
|
|
100028b6: 4699 mov r9, r3
|
|
100028b8: 9f21 ldr r7, [sp, #132] @ 0x84
|
|
100028ba: aa22 add r2, sp, #136 @ 0x88
|
|
100028bc: 7813 ldrb r3, [r2, #0]
|
|
100028be: 469b mov fp, r3
|
|
100028c0: 9b24 ldr r3, [sp, #144] @ 0x90
|
|
100028c2: 9309 str r3, [sp, #36] @ 0x24
|
|
100028c4: 9c25 ldr r4, [sp, #148] @ 0x94
|
|
100028c6: 9b28 ldr r3, [sp, #160] @ 0xa0
|
|
100028c8: 4698 mov r8, r3
|
|
100028ca: 464a mov r2, r9
|
|
100028cc: 433a orrs r2, r7
|
|
100028ce: d102 bne.n 100028d6 <_ntoa_long_long+0x38>
|
|
100028d0: 3210 adds r2, #16
|
|
100028d2: 4393 bics r3, r2
|
|
100028d4: 4698 mov r8, r3
|
|
100028d6: 2280 movs r2, #128 @ 0x80
|
|
100028d8: 00d2 lsls r2, r2, #3
|
|
100028da: 4645 mov r5, r8
|
|
100028dc: 4015 ands r5, r2
|
|
100028de: 4643 mov r3, r8
|
|
100028e0: 4213 tst r3, r2
|
|
100028e2: d00a beq.n 100028fa <_ntoa_long_long+0x5c>
|
|
100028e4: 464a mov r2, r9
|
|
100028e6: 433a orrs r2, r7
|
|
100028e8: d041 beq.n 1000296e <_ntoa_long_long+0xd0>
|
|
100028ea: 2500 movs r5, #0
|
|
100028ec: 002e movs r6, r5
|
|
100028ee: 4653 mov r3, sl
|
|
100028f0: 930d str r3, [sp, #52] @ 0x34
|
|
100028f2: 464d mov r5, r9
|
|
100028f4: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
100028f6: 469a mov sl, r3
|
|
100028f8: e01b b.n 10002932 <_ntoa_long_long+0x94>
|
|
100028fa: 002e movs r6, r5
|
|
100028fc: 4653 mov r3, sl
|
|
100028fe: 930d str r3, [sp, #52] @ 0x34
|
|
10002900: 464d mov r5, r9
|
|
10002902: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002904: 469a mov sl, r3
|
|
10002906: e014 b.n 10002932 <_ntoa_long_long+0x94>
|
|
10002908: 3330 adds r3, #48 @ 0x30
|
|
1000290a: b2da uxtb r2, r3
|
|
1000290c: 1c73 adds r3, r6, #1
|
|
1000290e: 4699 mov r9, r3
|
|
10002910: ab0e add r3, sp, #56 @ 0x38
|
|
10002912: 559a strb r2, [r3, r6]
|
|
10002914: 4652 mov r2, sl
|
|
10002916: 0023 movs r3, r4
|
|
10002918: 0028 movs r0, r5
|
|
1000291a: 0039 movs r1, r7
|
|
1000291c: f000 ffac bl 10003878 <__wrap___aeabi_uldivmod>
|
|
10002920: 42bc cmp r4, r7
|
|
10002922: d826 bhi.n 10002972 <_ntoa_long_long+0xd4>
|
|
10002924: d019 beq.n 1000295a <_ntoa_long_long+0xbc>
|
|
10002926: 464b mov r3, r9
|
|
10002928: 2b1f cmp r3, #31
|
|
1000292a: d81c bhi.n 10002966 <_ntoa_long_long+0xc8>
|
|
1000292c: 464e mov r6, r9
|
|
1000292e: 0005 movs r5, r0
|
|
10002930: 000f movs r7, r1
|
|
10002932: 4652 mov r2, sl
|
|
10002934: 0023 movs r3, r4
|
|
10002936: 0028 movs r0, r5
|
|
10002938: 0039 movs r1, r7
|
|
1000293a: f000 ff9d bl 10003878 <__wrap___aeabi_uldivmod>
|
|
1000293e: b2d3 uxtb r3, r2
|
|
10002940: 2b09 cmp r3, #9
|
|
10002942: d9e1 bls.n 10002908 <_ntoa_long_long+0x6a>
|
|
10002944: 4642 mov r2, r8
|
|
10002946: 0692 lsls r2, r2, #26
|
|
10002948: d505 bpl.n 10002956 <_ntoa_long_long+0xb8>
|
|
1000294a: 2241 movs r2, #65 @ 0x41
|
|
1000294c: 18d2 adds r2, r2, r3
|
|
1000294e: b2d2 uxtb r2, r2
|
|
10002950: 3a0a subs r2, #10
|
|
10002952: b2d2 uxtb r2, r2
|
|
10002954: e7da b.n 1000290c <_ntoa_long_long+0x6e>
|
|
10002956: 2261 movs r2, #97 @ 0x61
|
|
10002958: e7f8 b.n 1000294c <_ntoa_long_long+0xae>
|
|
1000295a: 45aa cmp sl, r5
|
|
1000295c: d9e3 bls.n 10002926 <_ntoa_long_long+0x88>
|
|
1000295e: 464e mov r6, r9
|
|
10002960: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002962: 469a mov sl, r3
|
|
10002964: e008 b.n 10002978 <_ntoa_long_long+0xda>
|
|
10002966: 464e mov r6, r9
|
|
10002968: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
1000296a: 469a mov sl, r3
|
|
1000296c: e004 b.n 10002978 <_ntoa_long_long+0xda>
|
|
1000296e: 2600 movs r6, #0
|
|
10002970: e002 b.n 10002978 <_ntoa_long_long+0xda>
|
|
10002972: 464e mov r6, r9
|
|
10002974: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002976: 469a mov sl, r3
|
|
10002978: 4643 mov r3, r8
|
|
1000297a: 9306 str r3, [sp, #24]
|
|
1000297c: 9b27 ldr r3, [sp, #156] @ 0x9c
|
|
1000297e: 9305 str r3, [sp, #20]
|
|
10002980: 9b26 ldr r3, [sp, #152] @ 0x98
|
|
10002982: 9304 str r3, [sp, #16]
|
|
10002984: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002986: 9303 str r3, [sp, #12]
|
|
10002988: 465b mov r3, fp
|
|
1000298a: 9302 str r3, [sp, #8]
|
|
1000298c: 9601 str r6, [sp, #4]
|
|
1000298e: ab0e add r3, sp, #56 @ 0x38
|
|
10002990: 9300 str r3, [sp, #0]
|
|
10002992: 4653 mov r3, sl
|
|
10002994: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002996: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002998: 980a ldr r0, [sp, #40] @ 0x28
|
|
1000299a: f7ff fe9a bl 100026d2 <_ntoa_format>
|
|
1000299e: b017 add sp, #92 @ 0x5c
|
|
100029a0: bcf0 pop {r4, r5, r6, r7}
|
|
100029a2: 46bb mov fp, r7
|
|
100029a4: 46b2 mov sl, r6
|
|
100029a6: 46a9 mov r9, r5
|
|
100029a8: 46a0 mov r8, r4
|
|
100029aa: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100029ac <_etoa>:
|
|
100029ac: b5f0 push {r4, r5, r6, r7, lr}
|
|
100029ae: 46de mov lr, fp
|
|
100029b0: 4657 mov r7, sl
|
|
100029b2: 464e mov r6, r9
|
|
100029b4: 4645 mov r5, r8
|
|
100029b6: b5e0 push {r5, r6, r7, lr}
|
|
100029b8: b091 sub sp, #68 @ 0x44
|
|
100029ba: 4680 mov r8, r0
|
|
100029bc: 4689 mov r9, r1
|
|
100029be: 920c str r2, [sp, #48] @ 0x30
|
|
100029c0: 469a mov sl, r3
|
|
100029c2: 9c1a ldr r4, [sp, #104] @ 0x68
|
|
100029c4: 9d1b ldr r5, [sp, #108] @ 0x6c
|
|
100029c6: 0022 movs r2, r4
|
|
100029c8: 002b movs r3, r5
|
|
100029ca: 0020 movs r0, r4
|
|
100029cc: 0029 movs r1, r5
|
|
100029ce: f001 f9ce bl 10003d6e <__wrap___aeabi_dcmpun>
|
|
100029d2: 2800 cmp r0, #0
|
|
100029d4: d000 beq.n 100029d8 <_etoa+0x2c>
|
|
100029d6: e0ec b.n 10002bb2 <_etoa+0x206>
|
|
100029d8: 2201 movs r2, #1
|
|
100029da: 4252 negs r2, r2
|
|
100029dc: 4bd4 ldr r3, [pc, #848] @ (10002d30 <_etoa+0x384>)
|
|
100029de: 0020 movs r0, r4
|
|
100029e0: 0029 movs r1, r5
|
|
100029e2: f001 f9bf bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
100029e6: 2800 cmp r0, #0
|
|
100029e8: d000 beq.n 100029ec <_etoa+0x40>
|
|
100029ea: e0e2 b.n 10002bb2 <_etoa+0x206>
|
|
100029ec: 2201 movs r2, #1
|
|
100029ee: 4252 negs r2, r2
|
|
100029f0: 4bd0 ldr r3, [pc, #832] @ (10002d34 <_etoa+0x388>)
|
|
100029f2: 0020 movs r0, r4
|
|
100029f4: 0029 movs r1, r5
|
|
100029f6: f001 f99f bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
100029fa: 2800 cmp r0, #0
|
|
100029fc: d000 beq.n 10002a00 <_etoa+0x54>
|
|
100029fe: e0d8 b.n 10002bb2 <_etoa+0x206>
|
|
10002a00: 2200 movs r2, #0
|
|
10002a02: 2300 movs r3, #0
|
|
10002a04: 0020 movs r0, r4
|
|
10002a06: 0029 movs r1, r5
|
|
10002a08: f001 f996 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002a0c: 2800 cmp r0, #0
|
|
10002a0e: d000 beq.n 10002a12 <_etoa+0x66>
|
|
10002a10: e0e4 b.n 10002bdc <_etoa+0x230>
|
|
10002a12: 9406 str r4, [sp, #24]
|
|
10002a14: 9507 str r5, [sp, #28]
|
|
10002a16: 2380 movs r3, #128 @ 0x80
|
|
10002a18: 00db lsls r3, r3, #3
|
|
10002a1a: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002a1c: 401a ands r2, r3
|
|
10002a1e: 920d str r2, [sp, #52] @ 0x34
|
|
10002a20: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002a22: 421a tst r2, r3
|
|
10002a24: d101 bne.n 10002a2a <_etoa+0x7e>
|
|
10002a26: 2306 movs r3, #6
|
|
10002a28: 931c str r3, [sp, #112] @ 0x70
|
|
10002a2a: 9806 ldr r0, [sp, #24]
|
|
10002a2c: 9907 ldr r1, [sp, #28]
|
|
10002a2e: 0002 movs r2, r0
|
|
10002a30: 000b movs r3, r1
|
|
10002a32: 9208 str r2, [sp, #32]
|
|
10002a34: 9309 str r3, [sp, #36] @ 0x24
|
|
10002a36: 0003 movs r3, r0
|
|
10002a38: 000a movs r2, r1
|
|
10002a3a: 4302 orrs r2, r0
|
|
10002a3c: d100 bne.n 10002a40 <_etoa+0x94>
|
|
10002a3e: e0d9 b.n 10002bf4 <_etoa+0x248>
|
|
10002a40: 0d08 lsrs r0, r1, #20
|
|
10002a42: 0540 lsls r0, r0, #21
|
|
10002a44: 0d40 lsrs r0, r0, #21
|
|
10002a46: 4ebc ldr r6, [pc, #752] @ (10002d38 <_etoa+0x38c>)
|
|
10002a48: 46b4 mov ip, r6
|
|
10002a4a: 4460 add r0, ip
|
|
10002a4c: 030a lsls r2, r1, #12
|
|
10002a4e: 0b12 lsrs r2, r2, #12
|
|
10002a50: 001e movs r6, r3
|
|
10002a52: 4bba ldr r3, [pc, #744] @ (10002d3c <_etoa+0x390>)
|
|
10002a54: 4313 orrs r3, r2
|
|
10002a56: 001f movs r7, r3
|
|
10002a58: f001 f99c bl 10003d94 <__wrap___aeabi_i2d>
|
|
10002a5c: 4ab8 ldr r2, [pc, #736] @ (10002d40 <_etoa+0x394>)
|
|
10002a5e: 4bb9 ldr r3, [pc, #740] @ (10002d44 <_etoa+0x398>)
|
|
10002a60: f001 f92b bl 10003cba <__wrap___aeabi_dmul>
|
|
10002a64: 4ab8 ldr r2, [pc, #736] @ (10002d48 <_etoa+0x39c>)
|
|
10002a66: 4bb9 ldr r3, [pc, #740] @ (10002d4c <_etoa+0x3a0>)
|
|
10002a68: f001 f908 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002a6c: 9008 str r0, [sp, #32]
|
|
10002a6e: 9109 str r1, [sp, #36] @ 0x24
|
|
10002a70: 2200 movs r2, #0
|
|
10002a72: 4bb7 ldr r3, [pc, #732] @ (10002d50 <_etoa+0x3a4>)
|
|
10002a74: 0030 movs r0, r6
|
|
10002a76: 0039 movs r1, r7
|
|
10002a78: f001 f8fb bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002a7c: 4ab5 ldr r2, [pc, #724] @ (10002d54 <_etoa+0x3a8>)
|
|
10002a7e: 4bb6 ldr r3, [pc, #728] @ (10002d58 <_etoa+0x3ac>)
|
|
10002a80: f001 f91b bl 10003cba <__wrap___aeabi_dmul>
|
|
10002a84: 0002 movs r2, r0
|
|
10002a86: 000b movs r3, r1
|
|
10002a88: 9808 ldr r0, [sp, #32]
|
|
10002a8a: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002a8c: f001 f8f6 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002a90: f001 f998 bl 10003dc4 <__wrap___aeabi_d2iz>
|
|
10002a94: 4683 mov fp, r0
|
|
10002a96: f001 f97d bl 10003d94 <__wrap___aeabi_i2d>
|
|
10002a9a: 0006 movs r6, r0
|
|
10002a9c: 000f movs r7, r1
|
|
10002a9e: 4aaf ldr r2, [pc, #700] @ (10002d5c <_etoa+0x3b0>)
|
|
10002aa0: 4baf ldr r3, [pc, #700] @ (10002d60 <_etoa+0x3b4>)
|
|
10002aa2: f001 f90a bl 10003cba <__wrap___aeabi_dmul>
|
|
10002aa6: 2200 movs r2, #0
|
|
10002aa8: 4bae ldr r3, [pc, #696] @ (10002d64 <_etoa+0x3b8>)
|
|
10002aaa: f001 f8e7 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002aae: f001 f989 bl 10003dc4 <__wrap___aeabi_d2iz>
|
|
10002ab2: 9008 str r0, [sp, #32]
|
|
10002ab4: 4aac ldr r2, [pc, #688] @ (10002d68 <_etoa+0x3bc>)
|
|
10002ab6: 4bad ldr r3, [pc, #692] @ (10002d6c <_etoa+0x3c0>)
|
|
10002ab8: 0030 movs r0, r6
|
|
10002aba: 0039 movs r1, r7
|
|
10002abc: f001 f8fd bl 10003cba <__wrap___aeabi_dmul>
|
|
10002ac0: 0006 movs r6, r0
|
|
10002ac2: 000f movs r7, r1
|
|
10002ac4: 9808 ldr r0, [sp, #32]
|
|
10002ac6: f001 f965 bl 10003d94 <__wrap___aeabi_i2d>
|
|
10002aca: 4aa9 ldr r2, [pc, #676] @ (10002d70 <_etoa+0x3c4>)
|
|
10002acc: 4ba9 ldr r3, [pc, #676] @ (10002d74 <_etoa+0x3c8>)
|
|
10002ace: f001 f8f4 bl 10003cba <__wrap___aeabi_dmul>
|
|
10002ad2: 0002 movs r2, r0
|
|
10002ad4: 000b movs r3, r1
|
|
10002ad6: 0030 movs r0, r6
|
|
10002ad8: 0039 movs r1, r7
|
|
10002ada: f001 f8ca bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002ade: 0006 movs r6, r0
|
|
10002ae0: 000f movs r7, r1
|
|
10002ae2: 0002 movs r2, r0
|
|
10002ae4: 000b movs r3, r1
|
|
10002ae6: f001 f8e8 bl 10003cba <__wrap___aeabi_dmul>
|
|
10002aea: 900a str r0, [sp, #40] @ 0x28
|
|
10002aec: 910b str r1, [sp, #44] @ 0x2c
|
|
10002aee: 9b08 ldr r3, [sp, #32]
|
|
10002af0: 4aa1 ldr r2, [pc, #644] @ (10002d78 <_etoa+0x3cc>)
|
|
10002af2: 4694 mov ip, r2
|
|
10002af4: 4463 add r3, ip
|
|
10002af6: 2100 movs r1, #0
|
|
10002af8: 2200 movs r2, #0
|
|
10002afa: 9108 str r1, [sp, #32]
|
|
10002afc: 9209 str r2, [sp, #36] @ 0x24
|
|
10002afe: 051b lsls r3, r3, #20
|
|
10002b00: 9309 str r3, [sp, #36] @ 0x24
|
|
10002b02: 2300 movs r3, #0
|
|
10002b04: 9308 str r3, [sp, #32]
|
|
10002b06: 0032 movs r2, r6
|
|
10002b08: 003b movs r3, r7
|
|
10002b0a: 0030 movs r0, r6
|
|
10002b0c: 0039 movs r1, r7
|
|
10002b0e: f001 f8b5 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002b12: 900e str r0, [sp, #56] @ 0x38
|
|
10002b14: 910f str r1, [sp, #60] @ 0x3c
|
|
10002b16: 0032 movs r2, r6
|
|
10002b18: 003b movs r3, r7
|
|
10002b1a: 2000 movs r0, #0
|
|
10002b1c: 2180 movs r1, #128 @ 0x80
|
|
10002b1e: 05c9 lsls r1, r1, #23
|
|
10002b20: f001 f8a7 bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002b24: 0006 movs r6, r0
|
|
10002b26: 000f movs r7, r1
|
|
10002b28: 2200 movs r2, #0
|
|
10002b2a: 4b94 ldr r3, [pc, #592] @ (10002d7c <_etoa+0x3d0>)
|
|
10002b2c: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002b2e: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002b30: f001 f8a9 bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002b34: 2200 movs r2, #0
|
|
10002b36: 4b92 ldr r3, [pc, #584] @ (10002d80 <_etoa+0x3d4>)
|
|
10002b38: f001 f8a0 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002b3c: 0002 movs r2, r0
|
|
10002b3e: 000b movs r3, r1
|
|
10002b40: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002b42: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002b44: f001 f89f bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002b48: 2200 movs r2, #0
|
|
10002b4a: 4b8e ldr r3, [pc, #568] @ (10002d84 <_etoa+0x3d8>)
|
|
10002b4c: f001 f896 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002b50: 0002 movs r2, r0
|
|
10002b52: 000b movs r3, r1
|
|
10002b54: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002b56: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002b58: f001 f895 bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002b5c: 0002 movs r2, r0
|
|
10002b5e: 000b movs r3, r1
|
|
10002b60: 0030 movs r0, r6
|
|
10002b62: 0039 movs r1, r7
|
|
10002b64: f001 f88a bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002b68: 0002 movs r2, r0
|
|
10002b6a: 000b movs r3, r1
|
|
10002b6c: 980e ldr r0, [sp, #56] @ 0x38
|
|
10002b6e: 990f ldr r1, [sp, #60] @ 0x3c
|
|
10002b70: f001 f889 bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002b74: 2200 movs r2, #0
|
|
10002b76: 4b71 ldr r3, [pc, #452] @ (10002d3c <_etoa+0x390>)
|
|
10002b78: f001 f880 bl 10003c7c <__wrap___aeabi_dadd>
|
|
10002b7c: 9a08 ldr r2, [sp, #32]
|
|
10002b7e: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002b80: f001 f89b bl 10003cba <__wrap___aeabi_dmul>
|
|
10002b84: 0006 movs r6, r0
|
|
10002b86: 000f movs r7, r1
|
|
10002b88: 9608 str r6, [sp, #32]
|
|
10002b8a: 9709 str r7, [sp, #36] @ 0x24
|
|
10002b8c: 9a06 ldr r2, [sp, #24]
|
|
10002b8e: 9b07 ldr r3, [sp, #28]
|
|
10002b90: f001 f8e8 bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
10002b94: 2800 cmp r0, #0
|
|
10002b96: d02f beq.n 10002bf8 <_etoa+0x24c>
|
|
10002b98: 2301 movs r3, #1
|
|
10002b9a: 425b negs r3, r3
|
|
10002b9c: 469c mov ip, r3
|
|
10002b9e: 44e3 add fp, ip
|
|
10002ba0: 2200 movs r2, #0
|
|
10002ba2: 4b77 ldr r3, [pc, #476] @ (10002d80 <_etoa+0x3d4>)
|
|
10002ba4: 0030 movs r0, r6
|
|
10002ba6: 0039 movs r1, r7
|
|
10002ba8: f001 f86d bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002bac: 9008 str r0, [sp, #32]
|
|
10002bae: 9109 str r1, [sp, #36] @ 0x24
|
|
10002bb0: e022 b.n 10002bf8 <_etoa+0x24c>
|
|
10002bb2: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002bb4: 9304 str r3, [sp, #16]
|
|
10002bb6: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
10002bb8: 9303 str r3, [sp, #12]
|
|
10002bba: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002bbc: 9302 str r3, [sp, #8]
|
|
10002bbe: 9400 str r4, [sp, #0]
|
|
10002bc0: 9501 str r5, [sp, #4]
|
|
10002bc2: 4653 mov r3, sl
|
|
10002bc4: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002bc6: 4649 mov r1, r9
|
|
10002bc8: 4640 mov r0, r8
|
|
10002bca: f000 f8ff bl 10002dcc <_ftoa>
|
|
10002bce: b011 add sp, #68 @ 0x44
|
|
10002bd0: bcf0 pop {r4, r5, r6, r7}
|
|
10002bd2: 46bb mov fp, r7
|
|
10002bd4: 46b2 mov sl, r6
|
|
10002bd6: 46a9 mov r9, r5
|
|
10002bd8: 46a0 mov r8, r4
|
|
10002bda: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10002bdc: 2100 movs r1, #0
|
|
10002bde: 2200 movs r2, #0
|
|
10002be0: 9106 str r1, [sp, #24]
|
|
10002be2: 9207 str r2, [sp, #28]
|
|
10002be4: 9406 str r4, [sp, #24]
|
|
10002be6: 2380 movs r3, #128 @ 0x80
|
|
10002be8: 061b lsls r3, r3, #24
|
|
10002bea: 469c mov ip, r3
|
|
10002bec: 44ac add ip, r5
|
|
10002bee: 4663 mov r3, ip
|
|
10002bf0: 9307 str r3, [sp, #28]
|
|
10002bf2: e710 b.n 10002a16 <_etoa+0x6a>
|
|
10002bf4: 2300 movs r3, #0
|
|
10002bf6: 469b mov fp, r3
|
|
10002bf8: 465b mov r3, fp
|
|
10002bfa: 3363 adds r3, #99 @ 0x63
|
|
10002bfc: 2bc6 cmp r3, #198 @ 0xc6
|
|
10002bfe: d820 bhi.n 10002c42 <_etoa+0x296>
|
|
10002c00: 2604 movs r6, #4
|
|
10002c02: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002c04: 051b lsls r3, r3, #20
|
|
10002c06: d528 bpl.n 10002c5a <_etoa+0x2ae>
|
|
10002c08: 9a08 ldr r2, [sp, #32]
|
|
10002c0a: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002c0c: 0019 movs r1, r3
|
|
10002c0e: 4311 orrs r1, r2
|
|
10002c10: d00f beq.n 10002c32 <_etoa+0x286>
|
|
10002c12: 4a5d ldr r2, [pc, #372] @ (10002d88 <_etoa+0x3dc>)
|
|
10002c14: 4b5d ldr r3, [pc, #372] @ (10002d8c <_etoa+0x3e0>)
|
|
10002c16: 9806 ldr r0, [sp, #24]
|
|
10002c18: 9907 ldr r1, [sp, #28]
|
|
10002c1a: f001 f89b bl 10003d54 <__wrap___aeabi_dcmpge>
|
|
10002c1e: 2800 cmp r0, #0
|
|
10002c20: d07a beq.n 10002d18 <_etoa+0x36c>
|
|
10002c22: 2200 movs r2, #0
|
|
10002c24: 4b5a ldr r3, [pc, #360] @ (10002d90 <_etoa+0x3e4>)
|
|
10002c26: 9806 ldr r0, [sp, #24]
|
|
10002c28: 9907 ldr r1, [sp, #28]
|
|
10002c2a: f001 f885 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002c2e: 2800 cmp r0, #0
|
|
10002c30: d072 beq.n 10002d18 <_etoa+0x36c>
|
|
10002c32: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002c34: 455b cmp r3, fp
|
|
10002c36: dd06 ble.n 10002c46 <_etoa+0x29a>
|
|
10002c38: 465a mov r2, fp
|
|
10002c3a: 1a9b subs r3, r3, r2
|
|
10002c3c: 3b01 subs r3, #1
|
|
10002c3e: 931c str r3, [sp, #112] @ 0x70
|
|
10002c40: e003 b.n 10002c4a <_etoa+0x29e>
|
|
10002c42: 2605 movs r6, #5
|
|
10002c44: e7dd b.n 10002c02 <_etoa+0x256>
|
|
10002c46: 2300 movs r3, #0
|
|
10002c48: 931c str r3, [sp, #112] @ 0x70
|
|
10002c4a: 2380 movs r3, #128 @ 0x80
|
|
10002c4c: 00db lsls r3, r3, #3
|
|
10002c4e: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002c50: 431a orrs r2, r3
|
|
10002c52: 921e str r2, [sp, #120] @ 0x78
|
|
10002c54: 2600 movs r6, #0
|
|
10002c56: 2300 movs r3, #0
|
|
10002c58: 469b mov fp, r3
|
|
10002c5a: 9b1d ldr r3, [sp, #116] @ 0x74
|
|
10002c5c: 429e cmp r6, r3
|
|
10002c5e: d265 bcs.n 10002d2c <_etoa+0x380>
|
|
10002c60: 1b9f subs r7, r3, r6
|
|
10002c62: 2302 movs r3, #2
|
|
10002c64: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002c66: 401a ands r2, r3
|
|
10002c68: 920a str r2, [sp, #40] @ 0x28
|
|
10002c6a: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002c6c: 4213 tst r3, r2
|
|
10002c6e: d002 beq.n 10002c76 <_etoa+0x2ca>
|
|
10002c70: 2e00 cmp r6, #0
|
|
10002c72: d000 beq.n 10002c76 <_etoa+0x2ca>
|
|
10002c74: 2700 movs r7, #0
|
|
10002c76: 465b mov r3, fp
|
|
10002c78: 2b00 cmp r3, #0
|
|
10002c7a: d007 beq.n 10002c8c <_etoa+0x2e0>
|
|
10002c7c: 9a08 ldr r2, [sp, #32]
|
|
10002c7e: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10002c80: 9806 ldr r0, [sp, #24]
|
|
10002c82: 9907 ldr r1, [sp, #28]
|
|
10002c84: f000 ffff bl 10003c86 <__wrap___aeabi_ddiv>
|
|
10002c88: 9006 str r0, [sp, #24]
|
|
10002c8a: 9107 str r1, [sp, #28]
|
|
10002c8c: 2200 movs r2, #0
|
|
10002c8e: 2300 movs r3, #0
|
|
10002c90: 0020 movs r0, r4
|
|
10002c92: 0029 movs r1, r5
|
|
10002c94: f001 f850 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002c98: 2800 cmp r0, #0
|
|
10002c9a: d000 beq.n 10002c9e <_etoa+0x2f2>
|
|
10002c9c: e07c b.n 10002d98 <_etoa+0x3ec>
|
|
10002c9e: 4b3d ldr r3, [pc, #244] @ (10002d94 <_etoa+0x3e8>)
|
|
10002ca0: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002ca2: 4013 ands r3, r2
|
|
10002ca4: 9304 str r3, [sp, #16]
|
|
10002ca6: 9703 str r7, [sp, #12]
|
|
10002ca8: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002caa: 9302 str r3, [sp, #8]
|
|
10002cac: 9b06 ldr r3, [sp, #24]
|
|
10002cae: 9c07 ldr r4, [sp, #28]
|
|
10002cb0: 9300 str r3, [sp, #0]
|
|
10002cb2: 9401 str r4, [sp, #4]
|
|
10002cb4: 4653 mov r3, sl
|
|
10002cb6: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10002cb8: 4649 mov r1, r9
|
|
10002cba: 4640 mov r0, r8
|
|
10002cbc: f000 f886 bl 10002dcc <_ftoa>
|
|
10002cc0: 2e00 cmp r6, #0
|
|
10002cc2: d100 bne.n 10002cc6 <_etoa+0x31a>
|
|
10002cc4: e783 b.n 10002bce <_etoa+0x222>
|
|
10002cc6: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002cc8: 069b lsls r3, r3, #26
|
|
10002cca: d571 bpl.n 10002db0 <_etoa+0x404>
|
|
10002ccc: 2545 movs r5, #69 @ 0x45
|
|
10002cce: 1c44 adds r4, r0, #1
|
|
10002cd0: 4653 mov r3, sl
|
|
10002cd2: 0002 movs r2, r0
|
|
10002cd4: 4649 mov r1, r9
|
|
10002cd6: 0028 movs r0, r5
|
|
10002cd8: 47c0 blx r8
|
|
10002cda: 465a mov r2, fp
|
|
10002cdc: 17d3 asrs r3, r2, #31
|
|
10002cde: 18d2 adds r2, r2, r3
|
|
10002ce0: 405a eors r2, r3
|
|
10002ce2: 2305 movs r3, #5
|
|
10002ce4: 9305 str r3, [sp, #20]
|
|
10002ce6: 3e01 subs r6, #1
|
|
10002ce8: 9604 str r6, [sp, #16]
|
|
10002cea: 2300 movs r3, #0
|
|
10002cec: 9303 str r3, [sp, #12]
|
|
10002cee: 330a adds r3, #10
|
|
10002cf0: 9302 str r3, [sp, #8]
|
|
10002cf2: 465b mov r3, fp
|
|
10002cf4: 0fdb lsrs r3, r3, #31
|
|
10002cf6: 9301 str r3, [sp, #4]
|
|
10002cf8: 9200 str r2, [sp, #0]
|
|
10002cfa: 4653 mov r3, sl
|
|
10002cfc: 0022 movs r2, r4
|
|
10002cfe: 4649 mov r1, r9
|
|
10002d00: 4640 mov r0, r8
|
|
10002d02: f7ff fd6e bl 100027e2 <_ntoa_long>
|
|
10002d06: 9b0a ldr r3, [sp, #40] @ 0x28
|
|
10002d08: 2b00 cmp r3, #0
|
|
10002d0a: d100 bne.n 10002d0e <_etoa+0x362>
|
|
10002d0c: e75f b.n 10002bce <_etoa+0x222>
|
|
10002d0e: 0002 movs r2, r0
|
|
10002d10: 4647 mov r7, r8
|
|
10002d12: 9e0c ldr r6, [sp, #48] @ 0x30
|
|
10002d14: 9d1d ldr r5, [sp, #116] @ 0x74
|
|
10002d16: e053 b.n 10002dc0 <_etoa+0x414>
|
|
10002d18: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002d1a: 2b00 cmp r3, #0
|
|
10002d1c: d09d beq.n 10002c5a <_etoa+0x2ae>
|
|
10002d1e: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10002d20: 2b00 cmp r3, #0
|
|
10002d22: d09a beq.n 10002c5a <_etoa+0x2ae>
|
|
10002d24: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10002d26: 3b01 subs r3, #1
|
|
10002d28: 931c str r3, [sp, #112] @ 0x70
|
|
10002d2a: e796 b.n 10002c5a <_etoa+0x2ae>
|
|
10002d2c: 2700 movs r7, #0
|
|
10002d2e: e798 b.n 10002c62 <_etoa+0x2b6>
|
|
10002d30: 7fefffff .word 0x7fefffff
|
|
10002d34: ffefffff .word 0xffefffff
|
|
10002d38: fffffc01 .word 0xfffffc01
|
|
10002d3c: 3ff00000 .word 0x3ff00000
|
|
10002d40: 509f79fb .word 0x509f79fb
|
|
10002d44: 3fd34413 .word 0x3fd34413
|
|
10002d48: 8b60c8b3 .word 0x8b60c8b3
|
|
10002d4c: 3fc68a28 .word 0x3fc68a28
|
|
10002d50: 3ff80000 .word 0x3ff80000
|
|
10002d54: 636f4361 .word 0x636f4361
|
|
10002d58: 3fd287a7 .word 0x3fd287a7
|
|
10002d5c: 0979a371 .word 0x0979a371
|
|
10002d60: 400a934f .word 0x400a934f
|
|
10002d64: 3fe00000 .word 0x3fe00000
|
|
10002d68: bbb55516 .word 0xbbb55516
|
|
10002d6c: 40026bb1 .word 0x40026bb1
|
|
10002d70: fefa39ef .word 0xfefa39ef
|
|
10002d74: 3fe62e42 .word 0x3fe62e42
|
|
10002d78: 000003ff .word 0x000003ff
|
|
10002d7c: 402c0000 .word 0x402c0000
|
|
10002d80: 40240000 .word 0x40240000
|
|
10002d84: 40180000 .word 0x40180000
|
|
10002d88: eb1c432d .word 0xeb1c432d
|
|
10002d8c: 3f1a36e2 .word 0x3f1a36e2
|
|
10002d90: 412e8480 .word 0x412e8480
|
|
10002d94: fffff7ff .word 0xfffff7ff
|
|
10002d98: 9c06 ldr r4, [sp, #24]
|
|
10002d9a: 9d07 ldr r5, [sp, #28]
|
|
10002d9c: 0022 movs r2, r4
|
|
10002d9e: 0029 movs r1, r5
|
|
10002da0: 2080 movs r0, #128 @ 0x80
|
|
10002da2: 0600 lsls r0, r0, #24
|
|
10002da4: 4684 mov ip, r0
|
|
10002da6: 4461 add r1, ip
|
|
10002da8: 000b movs r3, r1
|
|
10002daa: 9206 str r2, [sp, #24]
|
|
10002dac: 9307 str r3, [sp, #28]
|
|
10002dae: e776 b.n 10002c9e <_etoa+0x2f2>
|
|
10002db0: 2565 movs r5, #101 @ 0x65
|
|
10002db2: e78c b.n 10002cce <_etoa+0x322>
|
|
10002db4: 1c54 adds r4, r2, #1
|
|
10002db6: 4653 mov r3, sl
|
|
10002db8: 4649 mov r1, r9
|
|
10002dba: 2020 movs r0, #32
|
|
10002dbc: 47b8 blx r7
|
|
10002dbe: 0022 movs r2, r4
|
|
10002dc0: 1b93 subs r3, r2, r6
|
|
10002dc2: 42ab cmp r3, r5
|
|
10002dc4: d3f6 bcc.n 10002db4 <_etoa+0x408>
|
|
10002dc6: 0010 movs r0, r2
|
|
10002dc8: e701 b.n 10002bce <_etoa+0x222>
|
|
10002dca: 46c0 nop @ (mov r8, r8)
|
|
|
|
10002dcc <_ftoa>:
|
|
10002dcc: b5f0 push {r4, r5, r6, r7, lr}
|
|
10002dce: 46de mov lr, fp
|
|
10002dd0: 4657 mov r7, sl
|
|
10002dd2: 464e mov r6, r9
|
|
10002dd4: 4645 mov r5, r8
|
|
10002dd6: b5e0 push {r5, r6, r7, lr}
|
|
10002dd8: b095 sub sp, #84 @ 0x54
|
|
10002dda: 9006 str r0, [sp, #24]
|
|
10002ddc: 9107 str r1, [sp, #28]
|
|
10002dde: 4693 mov fp, r2
|
|
10002de0: 4699 mov r9, r3
|
|
10002de2: 9f20 ldr r7, [sp, #128] @ 0x80
|
|
10002de4: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002de6: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002de8: 0010 movs r0, r2
|
|
10002dea: 0019 movs r1, r3
|
|
10002dec: f000 ffbf bl 10003d6e <__wrap___aeabi_dcmpun>
|
|
10002df0: 2800 cmp r0, #0
|
|
10002df2: d131 bne.n 10002e58 <_ftoa+0x8c>
|
|
10002df4: 2201 movs r2, #1
|
|
10002df6: 4252 negs r2, r2
|
|
10002df8: 4bbf ldr r3, [pc, #764] @ (100030f8 <_ftoa+0x32c>)
|
|
10002dfa: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002dfc: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002dfe: f000 ff9b bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002e02: 2800 cmp r0, #0
|
|
10002e04: d137 bne.n 10002e76 <_ftoa+0xaa>
|
|
10002e06: 2201 movs r2, #1
|
|
10002e08: 4252 negs r2, r2
|
|
10002e0a: 4bbc ldr r3, [pc, #752] @ (100030fc <_ftoa+0x330>)
|
|
10002e0c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e0e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e10: f000 ffa8 bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
10002e14: 2800 cmp r0, #0
|
|
10002e16: d13d bne.n 10002e94 <_ftoa+0xc8>
|
|
10002e18: 2200 movs r2, #0
|
|
10002e1a: 4bb9 ldr r3, [pc, #740] @ (10003100 <_ftoa+0x334>)
|
|
10002e1c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e1e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e20: f000 ffa0 bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
10002e24: 2800 cmp r0, #0
|
|
10002e26: d150 bne.n 10002eca <_ftoa+0xfe>
|
|
10002e28: 2200 movs r2, #0
|
|
10002e2a: 4bb6 ldr r3, [pc, #728] @ (10003104 <_ftoa+0x338>)
|
|
10002e2c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e2e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e30: f000 ff82 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002e34: 2800 cmp r0, #0
|
|
10002e36: d148 bne.n 10002eca <_ftoa+0xfe>
|
|
10002e38: 2200 movs r2, #0
|
|
10002e3a: 2300 movs r3, #0
|
|
10002e3c: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002e3e: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002e40: f000 ff7a bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002e44: 2800 cmp r0, #0
|
|
10002e46: d150 bne.n 10002eea <_ftoa+0x11e>
|
|
10002e48: 2300 movs r3, #0
|
|
10002e4a: 4698 mov r8, r3
|
|
10002e4c: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002e4e: 055b lsls r3, r3, #21
|
|
10002e50: d400 bmi.n 10002e54 <_ftoa+0x88>
|
|
10002e52: e0b6 b.n 10002fc2 <_ftoa+0x1f6>
|
|
10002e54: 2400 movs r4, #0
|
|
10002e56: e058 b.n 10002f0a <_ftoa+0x13e>
|
|
10002e58: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002e5a: 9303 str r3, [sp, #12]
|
|
10002e5c: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002e5e: 9302 str r3, [sp, #8]
|
|
10002e60: 2303 movs r3, #3
|
|
10002e62: 9301 str r3, [sp, #4]
|
|
10002e64: 4ba8 ldr r3, [pc, #672] @ (10003108 <_ftoa+0x33c>)
|
|
10002e66: 9300 str r3, [sp, #0]
|
|
10002e68: 464b mov r3, r9
|
|
10002e6a: 465a mov r2, fp
|
|
10002e6c: 9907 ldr r1, [sp, #28]
|
|
10002e6e: 9806 ldr r0, [sp, #24]
|
|
10002e70: f7ff fbd8 bl 10002624 <_out_rev>
|
|
10002e74: e10e b.n 10003094 <_ftoa+0x2c8>
|
|
10002e76: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002e78: 9303 str r3, [sp, #12]
|
|
10002e7a: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002e7c: 9302 str r3, [sp, #8]
|
|
10002e7e: 2304 movs r3, #4
|
|
10002e80: 9301 str r3, [sp, #4]
|
|
10002e82: 4ba2 ldr r3, [pc, #648] @ (1000310c <_ftoa+0x340>)
|
|
10002e84: 9300 str r3, [sp, #0]
|
|
10002e86: 464b mov r3, r9
|
|
10002e88: 465a mov r2, fp
|
|
10002e8a: 9907 ldr r1, [sp, #28]
|
|
10002e8c: 9806 ldr r0, [sp, #24]
|
|
10002e8e: f7ff fbc9 bl 10002624 <_out_rev>
|
|
10002e92: e0ff b.n 10003094 <_ftoa+0x2c8>
|
|
10002e94: 2304 movs r3, #4
|
|
10002e96: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10002e98: 401a ands r2, r3
|
|
10002e9a: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002e9c: 420b tst r3, r1
|
|
10002e9e: d010 beq.n 10002ec2 <_ftoa+0xf6>
|
|
10002ea0: 4b9b ldr r3, [pc, #620] @ (10003110 <_ftoa+0x344>)
|
|
10002ea2: 2a00 cmp r2, #0
|
|
10002ea4: d00f beq.n 10002ec6 <_ftoa+0xfa>
|
|
10002ea6: 2204 movs r2, #4
|
|
10002ea8: 9922 ldr r1, [sp, #136] @ 0x88
|
|
10002eaa: 9103 str r1, [sp, #12]
|
|
10002eac: 9921 ldr r1, [sp, #132] @ 0x84
|
|
10002eae: 9102 str r1, [sp, #8]
|
|
10002eb0: 9201 str r2, [sp, #4]
|
|
10002eb2: 9300 str r3, [sp, #0]
|
|
10002eb4: 464b mov r3, r9
|
|
10002eb6: 465a mov r2, fp
|
|
10002eb8: 9907 ldr r1, [sp, #28]
|
|
10002eba: 9806 ldr r0, [sp, #24]
|
|
10002ebc: f7ff fbb2 bl 10002624 <_out_rev>
|
|
10002ec0: e0e8 b.n 10003094 <_ftoa+0x2c8>
|
|
10002ec2: 4b94 ldr r3, [pc, #592] @ (10003114 <_ftoa+0x348>)
|
|
10002ec4: e7ed b.n 10002ea2 <_ftoa+0xd6>
|
|
10002ec6: 2203 movs r2, #3
|
|
10002ec8: e7ee b.n 10002ea8 <_ftoa+0xdc>
|
|
10002eca: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
10002ecc: 9304 str r3, [sp, #16]
|
|
10002ece: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10002ed0: 9303 str r3, [sp, #12]
|
|
10002ed2: 9702 str r7, [sp, #8]
|
|
10002ed4: 9b1e ldr r3, [sp, #120] @ 0x78
|
|
10002ed6: 9c1f ldr r4, [sp, #124] @ 0x7c
|
|
10002ed8: 9300 str r3, [sp, #0]
|
|
10002eda: 9401 str r4, [sp, #4]
|
|
10002edc: 464b mov r3, r9
|
|
10002ede: 465a mov r2, fp
|
|
10002ee0: 9907 ldr r1, [sp, #28]
|
|
10002ee2: 9806 ldr r0, [sp, #24]
|
|
10002ee4: f7ff fd62 bl 100029ac <_etoa>
|
|
10002ee8: e0d4 b.n 10003094 <_ftoa+0x2c8>
|
|
10002eea: 9a1e ldr r2, [sp, #120] @ 0x78
|
|
10002eec: 9b1f ldr r3, [sp, #124] @ 0x7c
|
|
10002eee: 2000 movs r0, #0
|
|
10002ef0: 2100 movs r1, #0
|
|
10002ef2: f000 febe bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002ef6: 901e str r0, [sp, #120] @ 0x78
|
|
10002ef8: 911f str r1, [sp, #124] @ 0x7c
|
|
10002efa: 2301 movs r3, #1
|
|
10002efc: 4698 mov r8, r3
|
|
10002efe: e7a5 b.n 10002e4c <_ftoa+0x80>
|
|
10002f00: ab0c add r3, sp, #48 @ 0x30
|
|
10002f02: 2230 movs r2, #48 @ 0x30
|
|
10002f04: 551a strb r2, [r3, r4]
|
|
10002f06: 3f01 subs r7, #1
|
|
10002f08: 3401 adds r4, #1
|
|
10002f0a: 2c1f cmp r4, #31
|
|
10002f0c: d801 bhi.n 10002f12 <_ftoa+0x146>
|
|
10002f0e: 2f09 cmp r7, #9
|
|
10002f10: d8f6 bhi.n 10002f00 <_ftoa+0x134>
|
|
10002f12: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002f14: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002f16: f000 ff55 bl 10003dc4 <__wrap___aeabi_d2iz>
|
|
10002f1a: 0005 movs r5, r0
|
|
10002f1c: f000 ff3a bl 10003d94 <__wrap___aeabi_i2d>
|
|
10002f20: 0002 movs r2, r0
|
|
10002f22: 000b movs r3, r1
|
|
10002f24: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002f26: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002f28: f000 fea3 bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002f2c: 4b7a ldr r3, [pc, #488] @ (10003118 <_ftoa+0x34c>)
|
|
10002f2e: 00fa lsls r2, r7, #3
|
|
10002f30: 189b adds r3, r3, r2
|
|
10002f32: 681a ldr r2, [r3, #0]
|
|
10002f34: 685b ldr r3, [r3, #4]
|
|
10002f36: 920a str r2, [sp, #40] @ 0x28
|
|
10002f38: 930b str r3, [sp, #44] @ 0x2c
|
|
10002f3a: f000 febe bl 10003cba <__wrap___aeabi_dmul>
|
|
10002f3e: 9008 str r0, [sp, #32]
|
|
10002f40: 9109 str r1, [sp, #36] @ 0x24
|
|
10002f42: f000 ff63 bl 10003e0c <__wrap___aeabi_d2uiz>
|
|
10002f46: 0006 movs r6, r0
|
|
10002f48: f000 ff20 bl 10003d8c <__wrap___aeabi_ui2d>
|
|
10002f4c: 0002 movs r2, r0
|
|
10002f4e: 000b movs r3, r1
|
|
10002f50: 9808 ldr r0, [sp, #32]
|
|
10002f52: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002f54: f000 fe8d bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002f58: 9008 str r0, [sp, #32]
|
|
10002f5a: 9109 str r1, [sp, #36] @ 0x24
|
|
10002f5c: 2200 movs r2, #0
|
|
10002f5e: 4b6f ldr r3, [pc, #444] @ (1000311c <_ftoa+0x350>)
|
|
10002f60: f000 ff00 bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
10002f64: 2800 cmp r0, #0
|
|
10002f66: d02e beq.n 10002fc6 <_ftoa+0x1fa>
|
|
10002f68: 3601 adds r6, #1
|
|
10002f6a: 0030 movs r0, r6
|
|
10002f6c: f000 ff0e bl 10003d8c <__wrap___aeabi_ui2d>
|
|
10002f70: 0002 movs r2, r0
|
|
10002f72: 000b movs r3, r1
|
|
10002f74: 980a ldr r0, [sp, #40] @ 0x28
|
|
10002f76: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10002f78: f000 fee4 bl 10003d44 <__wrap___aeabi_dcmple>
|
|
10002f7c: 2800 cmp r0, #0
|
|
10002f7e: d001 beq.n 10002f84 <_ftoa+0x1b8>
|
|
10002f80: 3501 adds r5, #1
|
|
10002f82: 2600 movs r6, #0
|
|
10002f84: 2f00 cmp r7, #0
|
|
10002f86: d12c bne.n 10002fe2 <_ftoa+0x216>
|
|
10002f88: 0028 movs r0, r5
|
|
10002f8a: f000 ff03 bl 10003d94 <__wrap___aeabi_i2d>
|
|
10002f8e: 0002 movs r2, r0
|
|
10002f90: 000b movs r3, r1
|
|
10002f92: 981e ldr r0, [sp, #120] @ 0x78
|
|
10002f94: 991f ldr r1, [sp, #124] @ 0x7c
|
|
10002f96: f000 fe6c bl 10003c72 <__wrap___aeabi_dsub>
|
|
10002f9a: 0006 movs r6, r0
|
|
10002f9c: 000f movs r7, r1
|
|
10002f9e: 2200 movs r2, #0
|
|
10002fa0: 4b5e ldr r3, [pc, #376] @ (1000311c <_ftoa+0x350>)
|
|
10002fa2: f000 fec9 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002fa6: 2800 cmp r0, #0
|
|
10002fa8: d146 bne.n 10003038 <_ftoa+0x26c>
|
|
10002faa: 2200 movs r2, #0
|
|
10002fac: 4b5b ldr r3, [pc, #364] @ (1000311c <_ftoa+0x350>)
|
|
10002fae: 0030 movs r0, r6
|
|
10002fb0: 0039 movs r1, r7
|
|
10002fb2: f000 fed7 bl 10003d64 <__wrap___aeabi_dcmpgt>
|
|
10002fb6: 2800 cmp r0, #0
|
|
10002fb8: d13e bne.n 10003038 <_ftoa+0x26c>
|
|
10002fba: 07eb lsls r3, r5, #31
|
|
10002fbc: d53c bpl.n 10003038 <_ftoa+0x26c>
|
|
10002fbe: 3501 adds r5, #1
|
|
10002fc0: e03a b.n 10003038 <_ftoa+0x26c>
|
|
10002fc2: 2706 movs r7, #6
|
|
10002fc4: e746 b.n 10002e54 <_ftoa+0x88>
|
|
10002fc6: 2200 movs r2, #0
|
|
10002fc8: 4b54 ldr r3, [pc, #336] @ (1000311c <_ftoa+0x350>)
|
|
10002fca: 9808 ldr r0, [sp, #32]
|
|
10002fcc: 9909 ldr r1, [sp, #36] @ 0x24
|
|
10002fce: f000 feb3 bl 10003d38 <__wrap___aeabi_dcmplt>
|
|
10002fd2: 2800 cmp r0, #0
|
|
10002fd4: d1d6 bne.n 10002f84 <_ftoa+0x1b8>
|
|
10002fd6: 2e00 cmp r6, #0
|
|
10002fd8: d001 beq.n 10002fde <_ftoa+0x212>
|
|
10002fda: 07f3 lsls r3, r6, #31
|
|
10002fdc: d5d2 bpl.n 10002f84 <_ftoa+0x1b8>
|
|
10002fde: 3601 adds r6, #1
|
|
10002fe0: e7d0 b.n 10002f84 <_ftoa+0x1b8>
|
|
10002fe2: 46aa mov sl, r5
|
|
10002fe4: 2c1f cmp r4, #31
|
|
10002fe6: d811 bhi.n 1000300c <_ftoa+0x240>
|
|
10002fe8: 3f01 subs r7, #1
|
|
10002fea: 210a movs r1, #10
|
|
10002fec: 0030 movs r0, r6
|
|
10002fee: f000 fc05 bl 100037fc <__wrap___aeabi_uidiv>
|
|
10002ff2: 1c65 adds r5, r4, #1
|
|
10002ff4: 3130 adds r1, #48 @ 0x30
|
|
10002ff6: ab0c add r3, sp, #48 @ 0x30
|
|
10002ff8: 5519 strb r1, [r3, r4]
|
|
10002ffa: 210a movs r1, #10
|
|
10002ffc: 0030 movs r0, r6
|
|
10002ffe: f000 fbfd bl 100037fc <__wrap___aeabi_uidiv>
|
|
10003002: 2e09 cmp r6, #9
|
|
10003004: d90e bls.n 10003024 <_ftoa+0x258>
|
|
10003006: 0006 movs r6, r0
|
|
10003008: 002c movs r4, r5
|
|
1000300a: e7eb b.n 10002fe4 <_ftoa+0x218>
|
|
1000300c: 4655 mov r5, sl
|
|
1000300e: 2c1f cmp r4, #31
|
|
10003010: d80c bhi.n 1000302c <_ftoa+0x260>
|
|
10003012: 1e7b subs r3, r7, #1
|
|
10003014: 2f00 cmp r7, #0
|
|
10003016: d009 beq.n 1000302c <_ftoa+0x260>
|
|
10003018: aa0c add r2, sp, #48 @ 0x30
|
|
1000301a: 2130 movs r1, #48 @ 0x30
|
|
1000301c: 5511 strb r1, [r2, r4]
|
|
1000301e: 001f movs r7, r3
|
|
10003020: 3401 adds r4, #1
|
|
10003022: e7f4 b.n 1000300e <_ftoa+0x242>
|
|
10003024: 002b movs r3, r5
|
|
10003026: 4655 mov r5, sl
|
|
10003028: 001c movs r4, r3
|
|
1000302a: e7f0 b.n 1000300e <_ftoa+0x242>
|
|
1000302c: 2c1f cmp r4, #31
|
|
1000302e: d803 bhi.n 10003038 <_ftoa+0x26c>
|
|
10003030: ab0c add r3, sp, #48 @ 0x30
|
|
10003032: 222e movs r2, #46 @ 0x2e
|
|
10003034: 551a strb r2, [r3, r4]
|
|
10003036: 3401 adds r4, #1
|
|
10003038: 2c1f cmp r4, #31
|
|
1000303a: d810 bhi.n 1000305e <_ftoa+0x292>
|
|
1000303c: 210a movs r1, #10
|
|
1000303e: 0028 movs r0, r5
|
|
10003040: f000 fbb4 bl 100037ac <__wrap___aeabi_idiv>
|
|
10003044: 1c66 adds r6, r4, #1
|
|
10003046: 3130 adds r1, #48 @ 0x30
|
|
10003048: ab0c add r3, sp, #48 @ 0x30
|
|
1000304a: 5519 strb r1, [r3, r4]
|
|
1000304c: 210a movs r1, #10
|
|
1000304e: 0028 movs r0, r5
|
|
10003050: f000 fbac bl 100037ac <__wrap___aeabi_idiv>
|
|
10003054: 1e05 subs r5, r0, #0
|
|
10003056: d001 beq.n 1000305c <_ftoa+0x290>
|
|
10003058: 0034 movs r4, r6
|
|
1000305a: e7ed b.n 10003038 <_ftoa+0x26c>
|
|
1000305c: 0034 movs r4, r6
|
|
1000305e: 2303 movs r3, #3
|
|
10003060: 9a22 ldr r2, [sp, #136] @ 0x88
|
|
10003062: 4013 ands r3, r2
|
|
10003064: 2b01 cmp r3, #1
|
|
10003066: d01c beq.n 100030a2 <_ftoa+0x2d6>
|
|
10003068: 2c1f cmp r4, #31
|
|
1000306a: d806 bhi.n 1000307a <_ftoa+0x2ae>
|
|
1000306c: 4643 mov r3, r8
|
|
1000306e: 2b00 cmp r3, #0
|
|
10003070: d032 beq.n 100030d8 <_ftoa+0x30c>
|
|
10003072: ab0c add r3, sp, #48 @ 0x30
|
|
10003074: 222d movs r2, #45 @ 0x2d
|
|
10003076: 551a strb r2, [r3, r4]
|
|
10003078: 3401 adds r4, #1
|
|
1000307a: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
1000307c: 9303 str r3, [sp, #12]
|
|
1000307e: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
10003080: 9302 str r3, [sp, #8]
|
|
10003082: 9401 str r4, [sp, #4]
|
|
10003084: ab0c add r3, sp, #48 @ 0x30
|
|
10003086: 9300 str r3, [sp, #0]
|
|
10003088: 464b mov r3, r9
|
|
1000308a: 465a mov r2, fp
|
|
1000308c: 9907 ldr r1, [sp, #28]
|
|
1000308e: 9806 ldr r0, [sp, #24]
|
|
10003090: f7ff fac8 bl 10002624 <_out_rev>
|
|
10003094: b015 add sp, #84 @ 0x54
|
|
10003096: bcf0 pop {r4, r5, r6, r7}
|
|
10003098: 46bb mov fp, r7
|
|
1000309a: 46b2 mov sl, r6
|
|
1000309c: 46a9 mov r9, r5
|
|
1000309e: 46a0 mov r8, r4
|
|
100030a0: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100030a2: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
100030a4: 2b00 cmp r3, #0
|
|
100030a6: d013 beq.n 100030d0 <_ftoa+0x304>
|
|
100030a8: 4643 mov r3, r8
|
|
100030aa: 2b00 cmp r3, #0
|
|
100030ac: d102 bne.n 100030b4 <_ftoa+0x2e8>
|
|
100030ae: 330c adds r3, #12
|
|
100030b0: 4213 tst r3, r2
|
|
100030b2: d00f beq.n 100030d4 <_ftoa+0x308>
|
|
100030b4: 9b21 ldr r3, [sp, #132] @ 0x84
|
|
100030b6: 3b01 subs r3, #1
|
|
100030b8: 9321 str r3, [sp, #132] @ 0x84
|
|
100030ba: 0019 movs r1, r3
|
|
100030bc: e003 b.n 100030c6 <_ftoa+0x2fa>
|
|
100030be: ab0c add r3, sp, #48 @ 0x30
|
|
100030c0: 2230 movs r2, #48 @ 0x30
|
|
100030c2: 551a strb r2, [r3, r4]
|
|
100030c4: 3401 adds r4, #1
|
|
100030c6: 428c cmp r4, r1
|
|
100030c8: d2ce bcs.n 10003068 <_ftoa+0x29c>
|
|
100030ca: 2c1f cmp r4, #31
|
|
100030cc: d9f7 bls.n 100030be <_ftoa+0x2f2>
|
|
100030ce: e7cb b.n 10003068 <_ftoa+0x29c>
|
|
100030d0: 9921 ldr r1, [sp, #132] @ 0x84
|
|
100030d2: e7f8 b.n 100030c6 <_ftoa+0x2fa>
|
|
100030d4: 9921 ldr r1, [sp, #132] @ 0x84
|
|
100030d6: e7f6 b.n 100030c6 <_ftoa+0x2fa>
|
|
100030d8: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
100030da: 075b lsls r3, r3, #29
|
|
100030dc: d504 bpl.n 100030e8 <_ftoa+0x31c>
|
|
100030de: ab0c add r3, sp, #48 @ 0x30
|
|
100030e0: 222b movs r2, #43 @ 0x2b
|
|
100030e2: 551a strb r2, [r3, r4]
|
|
100030e4: 3401 adds r4, #1
|
|
100030e6: e7c8 b.n 1000307a <_ftoa+0x2ae>
|
|
100030e8: 9b22 ldr r3, [sp, #136] @ 0x88
|
|
100030ea: 071b lsls r3, r3, #28
|
|
100030ec: d5c5 bpl.n 1000307a <_ftoa+0x2ae>
|
|
100030ee: ab0c add r3, sp, #48 @ 0x30
|
|
100030f0: 2220 movs r2, #32
|
|
100030f2: 551a strb r2, [r3, r4]
|
|
100030f4: 3401 adds r4, #1
|
|
100030f6: e7c0 b.n 1000307a <_ftoa+0x2ae>
|
|
100030f8: ffefffff .word 0xffefffff
|
|
100030fc: 7fefffff .word 0x7fefffff
|
|
10003100: 41cdcd65 .word 0x41cdcd65
|
|
10003104: c1cdcd65 .word 0xc1cdcd65
|
|
10003108: 1000a014 .word 0x1000a014
|
|
1000310c: 1000a018 .word 0x1000a018
|
|
10003110: 1000a008 .word 0x1000a008
|
|
10003114: 1000a010 .word 0x1000a010
|
|
10003118: 1000a1c0 .word 0x1000a1c0
|
|
1000311c: 3fe00000 .word 0x3fe00000
|
|
|
|
10003120 <_vsnprintf>:
|
|
10003120: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003122: 46de mov lr, fp
|
|
10003124: 4657 mov r7, sl
|
|
10003126: 464e mov r6, r9
|
|
10003128: 4645 mov r5, r8
|
|
1000312a: b5e0 push {r5, r6, r7, lr}
|
|
1000312c: b093 sub sp, #76 @ 0x4c
|
|
1000312e: 4682 mov sl, r0
|
|
10003130: 4688 mov r8, r1
|
|
10003132: 4693 mov fp, r2
|
|
10003134: 9311 str r3, [sp, #68] @ 0x44
|
|
10003136: 2900 cmp r1, #0
|
|
10003138: d100 bne.n 1000313c <_vsnprintf+0x1c>
|
|
1000313a: e306 b.n 1000374a <_vsnprintf+0x62a>
|
|
1000313c: 2500 movs r5, #0
|
|
1000313e: 4656 mov r6, sl
|
|
10003140: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003142: 7818 ldrb r0, [r3, #0]
|
|
10003144: 2800 cmp r0, #0
|
|
10003146: d100 bne.n 1000314a <_vsnprintf+0x2a>
|
|
10003148: e302 b.n 10003750 <_vsnprintf+0x630>
|
|
1000314a: 2825 cmp r0, #37 @ 0x25
|
|
1000314c: d009 beq.n 10003162 <_vsnprintf+0x42>
|
|
1000314e: 1c6c adds r4, r5, #1
|
|
10003150: 465b mov r3, fp
|
|
10003152: 002a movs r2, r5
|
|
10003154: 4641 mov r1, r8
|
|
10003156: 47b0 blx r6
|
|
10003158: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000315a: 3301 adds r3, #1
|
|
1000315c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000315e: 0025 movs r5, r4
|
|
10003160: e7ee b.n 10003140 <_vsnprintf+0x20>
|
|
10003162: 3301 adds r3, #1
|
|
10003164: 9311 str r3, [sp, #68] @ 0x44
|
|
10003166: 2700 movs r7, #0
|
|
10003168: e020 b.n 100031ac <_vsnprintf+0x8c>
|
|
1000316a: 2301 movs r3, #1
|
|
1000316c: 431f orrs r7, r3
|
|
1000316e: 3201 adds r2, #1
|
|
10003170: 9211 str r2, [sp, #68] @ 0x44
|
|
10003172: 2401 movs r4, #1
|
|
10003174: e018 b.n 100031a8 <_vsnprintf+0x88>
|
|
10003176: 2302 movs r3, #2
|
|
10003178: 431f orrs r7, r3
|
|
1000317a: 3201 adds r2, #1
|
|
1000317c: 9211 str r2, [sp, #68] @ 0x44
|
|
1000317e: 2401 movs r4, #1
|
|
10003180: e012 b.n 100031a8 <_vsnprintf+0x88>
|
|
10003182: 2304 movs r3, #4
|
|
10003184: 431f orrs r7, r3
|
|
10003186: 3201 adds r2, #1
|
|
10003188: 9211 str r2, [sp, #68] @ 0x44
|
|
1000318a: 2401 movs r4, #1
|
|
1000318c: e00c b.n 100031a8 <_vsnprintf+0x88>
|
|
1000318e: 2308 movs r3, #8
|
|
10003190: 431f orrs r7, r3
|
|
10003192: 3201 adds r2, #1
|
|
10003194: 9211 str r2, [sp, #68] @ 0x44
|
|
10003196: 2401 movs r4, #1
|
|
10003198: e006 b.n 100031a8 <_vsnprintf+0x88>
|
|
1000319a: 2310 movs r3, #16
|
|
1000319c: 431f orrs r7, r3
|
|
1000319e: 3201 adds r2, #1
|
|
100031a0: 9211 str r2, [sp, #68] @ 0x44
|
|
100031a2: 2401 movs r4, #1
|
|
100031a4: e000 b.n 100031a8 <_vsnprintf+0x88>
|
|
100031a6: 2400 movs r4, #0
|
|
100031a8: 2c00 cmp r4, #0
|
|
100031aa: d009 beq.n 100031c0 <_vsnprintf+0xa0>
|
|
100031ac: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
100031ae: 7813 ldrb r3, [r2, #0]
|
|
100031b0: 3b20 subs r3, #32
|
|
100031b2: b2d9 uxtb r1, r3
|
|
100031b4: 2910 cmp r1, #16
|
|
100031b6: d8f6 bhi.n 100031a6 <_vsnprintf+0x86>
|
|
100031b8: 008b lsls r3, r1, #2
|
|
100031ba: 49c4 ldr r1, [pc, #784] @ (100034cc <_vsnprintf+0x3ac>)
|
|
100031bc: 58cb ldr r3, [r1, r3]
|
|
100031be: 469f mov pc, r3
|
|
100031c0: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100031c2: 781a ldrb r2, [r3, #0]
|
|
100031c4: 0013 movs r3, r2
|
|
100031c6: 3b30 subs r3, #48 @ 0x30
|
|
100031c8: b2db uxtb r3, r3
|
|
100031ca: 2b09 cmp r3, #9
|
|
100031cc: d910 bls.n 100031f0 <_vsnprintf+0xd0>
|
|
100031ce: 2a2a cmp r2, #42 @ 0x2a
|
|
100031d0: d013 beq.n 100031fa <_vsnprintf+0xda>
|
|
100031d2: 940b str r4, [sp, #44] @ 0x2c
|
|
100031d4: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100031d6: 781a ldrb r2, [r3, #0]
|
|
100031d8: 2a2e cmp r2, #46 @ 0x2e
|
|
100031da: d01e beq.n 1000321a <_vsnprintf+0xfa>
|
|
100031dc: 9a11 ldr r2, [sp, #68] @ 0x44
|
|
100031de: 7813 ldrb r3, [r2, #0]
|
|
100031e0: 3b68 subs r3, #104 @ 0x68
|
|
100031e2: b2d9 uxtb r1, r3
|
|
100031e4: 2912 cmp r1, #18
|
|
100031e6: d859 bhi.n 1000329c <_vsnprintf+0x17c>
|
|
100031e8: 008b lsls r3, r1, #2
|
|
100031ea: 49b9 ldr r1, [pc, #740] @ (100034d0 <_vsnprintf+0x3b0>)
|
|
100031ec: 58cb ldr r3, [r1, r3]
|
|
100031ee: 469f mov pc, r3
|
|
100031f0: a811 add r0, sp, #68 @ 0x44
|
|
100031f2: f7ff fa05 bl 10002600 <_atoi>
|
|
100031f6: 900b str r0, [sp, #44] @ 0x2c
|
|
100031f8: e7ec b.n 100031d4 <_vsnprintf+0xb4>
|
|
100031fa: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100031fc: 1d1a adds r2, r3, #4
|
|
100031fe: 921c str r2, [sp, #112] @ 0x70
|
|
10003200: 681b ldr r3, [r3, #0]
|
|
10003202: 2b00 cmp r3, #0
|
|
10003204: db04 blt.n 10003210 <_vsnprintf+0xf0>
|
|
10003206: 930b str r3, [sp, #44] @ 0x2c
|
|
10003208: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000320a: 3301 adds r3, #1
|
|
1000320c: 9311 str r3, [sp, #68] @ 0x44
|
|
1000320e: e7e1 b.n 100031d4 <_vsnprintf+0xb4>
|
|
10003210: 2202 movs r2, #2
|
|
10003212: 4317 orrs r7, r2
|
|
10003214: 425b negs r3, r3
|
|
10003216: 930b str r3, [sp, #44] @ 0x2c
|
|
10003218: e7f6 b.n 10003208 <_vsnprintf+0xe8>
|
|
1000321a: 2280 movs r2, #128 @ 0x80
|
|
1000321c: 00d2 lsls r2, r2, #3
|
|
1000321e: 4317 orrs r7, r2
|
|
10003220: 1c5a adds r2, r3, #1
|
|
10003222: 9211 str r2, [sp, #68] @ 0x44
|
|
10003224: 785a ldrb r2, [r3, #1]
|
|
10003226: 0013 movs r3, r2
|
|
10003228: 3b30 subs r3, #48 @ 0x30
|
|
1000322a: b2db uxtb r3, r3
|
|
1000322c: 2b09 cmp r3, #9
|
|
1000322e: d90b bls.n 10003248 <_vsnprintf+0x128>
|
|
10003230: 2a2a cmp r2, #42 @ 0x2a
|
|
10003232: d1d3 bne.n 100031dc <_vsnprintf+0xbc>
|
|
10003234: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003236: 1d1a adds r2, r3, #4
|
|
10003238: 921c str r2, [sp, #112] @ 0x70
|
|
1000323a: 681c ldr r4, [r3, #0]
|
|
1000323c: 2c00 cmp r4, #0
|
|
1000323e: db08 blt.n 10003252 <_vsnprintf+0x132>
|
|
10003240: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003242: 3301 adds r3, #1
|
|
10003244: 9311 str r3, [sp, #68] @ 0x44
|
|
10003246: e7c9 b.n 100031dc <_vsnprintf+0xbc>
|
|
10003248: a811 add r0, sp, #68 @ 0x44
|
|
1000324a: f7ff f9d9 bl 10002600 <_atoi>
|
|
1000324e: 0004 movs r4, r0
|
|
10003250: e7c4 b.n 100031dc <_vsnprintf+0xbc>
|
|
10003252: 2400 movs r4, #0
|
|
10003254: e7f4 b.n 10003240 <_vsnprintf+0x120>
|
|
10003256: 2380 movs r3, #128 @ 0x80
|
|
10003258: 005b lsls r3, r3, #1
|
|
1000325a: 433b orrs r3, r7
|
|
1000325c: 1c51 adds r1, r2, #1
|
|
1000325e: 9111 str r1, [sp, #68] @ 0x44
|
|
10003260: 7851 ldrb r1, [r2, #1]
|
|
10003262: 296c cmp r1, #108 @ 0x6c
|
|
10003264: d001 beq.n 1000326a <_vsnprintf+0x14a>
|
|
10003266: 001f movs r7, r3
|
|
10003268: e018 b.n 1000329c <_vsnprintf+0x17c>
|
|
1000326a: 23c0 movs r3, #192 @ 0xc0
|
|
1000326c: 009b lsls r3, r3, #2
|
|
1000326e: 431f orrs r7, r3
|
|
10003270: 3202 adds r2, #2
|
|
10003272: 9211 str r2, [sp, #68] @ 0x44
|
|
10003274: e012 b.n 1000329c <_vsnprintf+0x17c>
|
|
10003276: 2380 movs r3, #128 @ 0x80
|
|
10003278: 433b orrs r3, r7
|
|
1000327a: 1c51 adds r1, r2, #1
|
|
1000327c: 9111 str r1, [sp, #68] @ 0x44
|
|
1000327e: 7851 ldrb r1, [r2, #1]
|
|
10003280: 2968 cmp r1, #104 @ 0x68
|
|
10003282: d001 beq.n 10003288 <_vsnprintf+0x168>
|
|
10003284: 001f movs r7, r3
|
|
10003286: e009 b.n 1000329c <_vsnprintf+0x17c>
|
|
10003288: 23c0 movs r3, #192 @ 0xc0
|
|
1000328a: 431f orrs r7, r3
|
|
1000328c: 3202 adds r2, #2
|
|
1000328e: 9211 str r2, [sp, #68] @ 0x44
|
|
10003290: e004 b.n 1000329c <_vsnprintf+0x17c>
|
|
10003292: 2380 movs r3, #128 @ 0x80
|
|
10003294: 005b lsls r3, r3, #1
|
|
10003296: 431f orrs r7, r3
|
|
10003298: 3201 adds r2, #1
|
|
1000329a: 9211 str r2, [sp, #68] @ 0x44
|
|
1000329c: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000329e: 7818 ldrb r0, [r3, #0]
|
|
100032a0: 2867 cmp r0, #103 @ 0x67
|
|
100032a2: d816 bhi.n 100032d2 <_vsnprintf+0x1b2>
|
|
100032a4: 2825 cmp r0, #37 @ 0x25
|
|
100032a6: d326 bcc.n 100032f6 <_vsnprintf+0x1d6>
|
|
100032a8: 0003 movs r3, r0
|
|
100032aa: 3b25 subs r3, #37 @ 0x25
|
|
100032ac: b2da uxtb r2, r3
|
|
100032ae: 2a42 cmp r2, #66 @ 0x42
|
|
100032b0: d821 bhi.n 100032f6 <_vsnprintf+0x1d6>
|
|
100032b2: 0093 lsls r3, r2, #2
|
|
100032b4: 4a87 ldr r2, [pc, #540] @ (100034d4 <_vsnprintf+0x3b4>)
|
|
100032b6: 58d3 ldr r3, [r2, r3]
|
|
100032b8: 469f mov pc, r3
|
|
100032ba: 2380 movs r3, #128 @ 0x80
|
|
100032bc: 009b lsls r3, r3, #2
|
|
100032be: 431f orrs r7, r3
|
|
100032c0: 3201 adds r2, #1
|
|
100032c2: 9211 str r2, [sp, #68] @ 0x44
|
|
100032c4: e7ea b.n 1000329c <_vsnprintf+0x17c>
|
|
100032c6: 2380 movs r3, #128 @ 0x80
|
|
100032c8: 005b lsls r3, r3, #1
|
|
100032ca: 431f orrs r7, r3
|
|
100032cc: 3201 adds r2, #1
|
|
100032ce: 9211 str r2, [sp, #68] @ 0x44
|
|
100032d0: e7e4 b.n 1000329c <_vsnprintf+0x17c>
|
|
100032d2: 2878 cmp r0, #120 @ 0x78
|
|
100032d4: d80f bhi.n 100032f6 <_vsnprintf+0x1d6>
|
|
100032d6: 2869 cmp r0, #105 @ 0x69
|
|
100032d8: d30d bcc.n 100032f6 <_vsnprintf+0x1d6>
|
|
100032da: 0002 movs r2, r0
|
|
100032dc: 3a69 subs r2, #105 @ 0x69
|
|
100032de: b2d2 uxtb r2, r2
|
|
100032e0: 2301 movs r3, #1
|
|
100032e2: 4093 lsls r3, r2
|
|
100032e4: 4a7c ldr r2, [pc, #496] @ (100034d8 <_vsnprintf+0x3b8>)
|
|
100032e6: 4213 tst r3, r2
|
|
100032e8: d10f bne.n 1000330a <_vsnprintf+0x1ea>
|
|
100032ea: 061a lsls r2, r3, #24
|
|
100032ec: d500 bpl.n 100032f0 <_vsnprintf+0x1d0>
|
|
100032ee: e207 b.n 10003700 <_vsnprintf+0x5e0>
|
|
100032f0: 055b lsls r3, r3, #21
|
|
100032f2: d500 bpl.n 100032f6 <_vsnprintf+0x1d6>
|
|
100032f4: e194 b.n 10003620 <_vsnprintf+0x500>
|
|
100032f6: 1c6c adds r4, r5, #1
|
|
100032f8: 465b mov r3, fp
|
|
100032fa: 002a movs r2, r5
|
|
100032fc: 4641 mov r1, r8
|
|
100032fe: 47b0 blx r6
|
|
10003300: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003302: 3301 adds r3, #1
|
|
10003304: 9311 str r3, [sp, #68] @ 0x44
|
|
10003306: 0025 movs r5, r4
|
|
10003308: e71a b.n 10003140 <_vsnprintf+0x20>
|
|
1000330a: 2878 cmp r0, #120 @ 0x78
|
|
1000330c: d00a beq.n 10003324 <_vsnprintf+0x204>
|
|
1000330e: 2862 cmp r0, #98 @ 0x62
|
|
10003310: d03a beq.n 10003388 <_vsnprintf+0x268>
|
|
10003312: 286f cmp r0, #111 @ 0x6f
|
|
10003314: d03b beq.n 1000338e <_vsnprintf+0x26e>
|
|
10003316: 2858 cmp r0, #88 @ 0x58
|
|
10003318: d03c beq.n 10003394 <_vsnprintf+0x274>
|
|
1000331a: 2310 movs r3, #16
|
|
1000331c: 439f bics r7, r3
|
|
1000331e: 3b06 subs r3, #6
|
|
10003320: 469c mov ip, r3
|
|
10003322: e001 b.n 10003328 <_vsnprintf+0x208>
|
|
10003324: 2310 movs r3, #16
|
|
10003326: 469c mov ip, r3
|
|
10003328: 2858 cmp r0, #88 @ 0x58
|
|
1000332a: d036 beq.n 1000339a <_vsnprintf+0x27a>
|
|
1000332c: 2869 cmp r0, #105 @ 0x69
|
|
1000332e: d003 beq.n 10003338 <_vsnprintf+0x218>
|
|
10003330: 2864 cmp r0, #100 @ 0x64
|
|
10003332: d001 beq.n 10003338 <_vsnprintf+0x218>
|
|
10003334: 220c movs r2, #12
|
|
10003336: 4397 bics r7, r2
|
|
10003338: 057a lsls r2, r7, #21
|
|
1000333a: d501 bpl.n 10003340 <_vsnprintf+0x220>
|
|
1000333c: 2201 movs r2, #1
|
|
1000333e: 4397 bics r7, r2
|
|
10003340: 2869 cmp r0, #105 @ 0x69
|
|
10003342: d02d beq.n 100033a0 <_vsnprintf+0x280>
|
|
10003344: 2864 cmp r0, #100 @ 0x64
|
|
10003346: d02b beq.n 100033a0 <_vsnprintf+0x280>
|
|
10003348: 05ba lsls r2, r7, #22
|
|
1000334a: d500 bpl.n 1000334e <_vsnprintf+0x22e>
|
|
1000334c: e0a2 b.n 10003494 <_vsnprintf+0x374>
|
|
1000334e: 05fa lsls r2, r7, #23
|
|
10003350: d500 bpl.n 10003354 <_vsnprintf+0x234>
|
|
10003352: e0c3 b.n 100034dc <_vsnprintf+0x3bc>
|
|
10003354: 067a lsls r2, r7, #25
|
|
10003356: d400 bmi.n 1000335a <_vsnprintf+0x23a>
|
|
10003358: e0d5 b.n 10003506 <_vsnprintf+0x3e6>
|
|
1000335a: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000335c: 1d11 adds r1, r2, #4
|
|
1000335e: 911c str r1, [sp, #112] @ 0x70
|
|
10003360: 6811 ldr r1, [r2, #0]
|
|
10003362: 22ff movs r2, #255 @ 0xff
|
|
10003364: 400a ands r2, r1
|
|
10003366: 9705 str r7, [sp, #20]
|
|
10003368: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000336a: 9304 str r3, [sp, #16]
|
|
1000336c: 9403 str r4, [sp, #12]
|
|
1000336e: 4663 mov r3, ip
|
|
10003370: 9302 str r3, [sp, #8]
|
|
10003372: 2300 movs r3, #0
|
|
10003374: 9301 str r3, [sp, #4]
|
|
10003376: 9200 str r2, [sp, #0]
|
|
10003378: 465b mov r3, fp
|
|
1000337a: 002a movs r2, r5
|
|
1000337c: 4641 mov r1, r8
|
|
1000337e: 0030 movs r0, r6
|
|
10003380: f7ff fa2f bl 100027e2 <_ntoa_long>
|
|
10003384: 0005 movs r5, r0
|
|
10003386: e02a b.n 100033de <_vsnprintf+0x2be>
|
|
10003388: 2302 movs r3, #2
|
|
1000338a: 469c mov ip, r3
|
|
1000338c: e7cc b.n 10003328 <_vsnprintf+0x208>
|
|
1000338e: 2308 movs r3, #8
|
|
10003390: 469c mov ip, r3
|
|
10003392: e7c9 b.n 10003328 <_vsnprintf+0x208>
|
|
10003394: 2310 movs r3, #16
|
|
10003396: 469c mov ip, r3
|
|
10003398: e7c6 b.n 10003328 <_vsnprintf+0x208>
|
|
1000339a: 2220 movs r2, #32
|
|
1000339c: 4317 orrs r7, r2
|
|
1000339e: e7c5 b.n 1000332c <_vsnprintf+0x20c>
|
|
100033a0: 05ba lsls r2, r7, #22
|
|
100033a2: d420 bmi.n 100033e6 <_vsnprintf+0x2c6>
|
|
100033a4: 05fa lsls r2, r7, #23
|
|
100033a6: d450 bmi.n 1000344a <_vsnprintf+0x32a>
|
|
100033a8: 067a lsls r2, r7, #25
|
|
100033aa: d566 bpl.n 1000347a <_vsnprintf+0x35a>
|
|
100033ac: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100033ae: 1d11 adds r1, r2, #4
|
|
100033b0: 911c str r1, [sp, #112] @ 0x70
|
|
100033b2: 6811 ldr r1, [r2, #0]
|
|
100033b4: 22ff movs r2, #255 @ 0xff
|
|
100033b6: 400a ands r2, r1
|
|
100033b8: 17d0 asrs r0, r2, #31
|
|
100033ba: 1811 adds r1, r2, r0
|
|
100033bc: 4041 eors r1, r0
|
|
100033be: 9705 str r7, [sp, #20]
|
|
100033c0: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100033c2: 9304 str r3, [sp, #16]
|
|
100033c4: 9403 str r4, [sp, #12]
|
|
100033c6: 4663 mov r3, ip
|
|
100033c8: 9302 str r3, [sp, #8]
|
|
100033ca: 0fd2 lsrs r2, r2, #31
|
|
100033cc: 9201 str r2, [sp, #4]
|
|
100033ce: 9100 str r1, [sp, #0]
|
|
100033d0: 465b mov r3, fp
|
|
100033d2: 002a movs r2, r5
|
|
100033d4: 4641 mov r1, r8
|
|
100033d6: 0030 movs r0, r6
|
|
100033d8: f7ff fa03 bl 100027e2 <_ntoa_long>
|
|
100033dc: 0005 movs r5, r0
|
|
100033de: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100033e0: 3301 adds r3, #1
|
|
100033e2: 9311 str r3, [sp, #68] @ 0x44
|
|
100033e4: e6ac b.n 10003140 <_vsnprintf+0x20>
|
|
100033e6: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100033e8: 3207 adds r2, #7
|
|
100033ea: 2107 movs r1, #7
|
|
100033ec: 438a bics r2, r1
|
|
100033ee: 0011 movs r1, r2
|
|
100033f0: 3108 adds r1, #8
|
|
100033f2: 911c str r1, [sp, #112] @ 0x70
|
|
100033f4: 6811 ldr r1, [r2, #0]
|
|
100033f6: 6853 ldr r3, [r2, #4]
|
|
100033f8: 4699 mov r9, r3
|
|
100033fa: 17db asrs r3, r3, #31
|
|
100033fc: 930c str r3, [sp, #48] @ 0x30
|
|
100033fe: 930d str r3, [sp, #52] @ 0x34
|
|
10003400: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10003402: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10003404: 0010 movs r0, r2
|
|
10003406: 4048 eors r0, r1
|
|
10003408: 900e str r0, [sp, #56] @ 0x38
|
|
1000340a: 464a mov r2, r9
|
|
1000340c: 4053 eors r3, r2
|
|
1000340e: 930f str r3, [sp, #60] @ 0x3c
|
|
10003410: 980e ldr r0, [sp, #56] @ 0x38
|
|
10003412: 990f ldr r1, [sp, #60] @ 0x3c
|
|
10003414: 9a0c ldr r2, [sp, #48] @ 0x30
|
|
10003416: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
10003418: 1a80 subs r0, r0, r2
|
|
1000341a: 4199 sbcs r1, r3
|
|
1000341c: 900e str r0, [sp, #56] @ 0x38
|
|
1000341e: 910f str r1, [sp, #60] @ 0x3c
|
|
10003420: 9708 str r7, [sp, #32]
|
|
10003422: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
10003424: 9307 str r3, [sp, #28]
|
|
10003426: 9406 str r4, [sp, #24]
|
|
10003428: 4663 mov r3, ip
|
|
1000342a: 9304 str r3, [sp, #16]
|
|
1000342c: 2300 movs r3, #0
|
|
1000342e: 9305 str r3, [sp, #20]
|
|
10003430: 464b mov r3, r9
|
|
10003432: 0fda lsrs r2, r3, #31
|
|
10003434: 9202 str r2, [sp, #8]
|
|
10003436: 9000 str r0, [sp, #0]
|
|
10003438: 9101 str r1, [sp, #4]
|
|
1000343a: 465b mov r3, fp
|
|
1000343c: 002a movs r2, r5
|
|
1000343e: 4641 mov r1, r8
|
|
10003440: 0030 movs r0, r6
|
|
10003442: f7ff fa2c bl 1000289e <_ntoa_long_long>
|
|
10003446: 0005 movs r5, r0
|
|
10003448: e7c9 b.n 100033de <_vsnprintf+0x2be>
|
|
1000344a: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000344c: 1d11 adds r1, r2, #4
|
|
1000344e: 911c str r1, [sp, #112] @ 0x70
|
|
10003450: 6812 ldr r2, [r2, #0]
|
|
10003452: 17d0 asrs r0, r2, #31
|
|
10003454: 1811 adds r1, r2, r0
|
|
10003456: 4041 eors r1, r0
|
|
10003458: 9705 str r7, [sp, #20]
|
|
1000345a: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
1000345c: 9304 str r3, [sp, #16]
|
|
1000345e: 9403 str r4, [sp, #12]
|
|
10003460: 4663 mov r3, ip
|
|
10003462: 9302 str r3, [sp, #8]
|
|
10003464: 0fd2 lsrs r2, r2, #31
|
|
10003466: 9201 str r2, [sp, #4]
|
|
10003468: 9100 str r1, [sp, #0]
|
|
1000346a: 465b mov r3, fp
|
|
1000346c: 002a movs r2, r5
|
|
1000346e: 4641 mov r1, r8
|
|
10003470: 0030 movs r0, r6
|
|
10003472: f7ff f9b6 bl 100027e2 <_ntoa_long>
|
|
10003476: 0005 movs r5, r0
|
|
10003478: e7b1 b.n 100033de <_vsnprintf+0x2be>
|
|
1000347a: 063a lsls r2, r7, #24
|
|
1000347c: d505 bpl.n 1000348a <_vsnprintf+0x36a>
|
|
1000347e: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003480: 1d11 adds r1, r2, #4
|
|
10003482: 911c str r1, [sp, #112] @ 0x70
|
|
10003484: 2300 movs r3, #0
|
|
10003486: 5ed2 ldrsh r2, [r2, r3]
|
|
10003488: e796 b.n 100033b8 <_vsnprintf+0x298>
|
|
1000348a: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000348c: 1d11 adds r1, r2, #4
|
|
1000348e: 911c str r1, [sp, #112] @ 0x70
|
|
10003490: 6812 ldr r2, [r2, #0]
|
|
10003492: e791 b.n 100033b8 <_vsnprintf+0x298>
|
|
10003494: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003496: 3207 adds r2, #7
|
|
10003498: 2107 movs r1, #7
|
|
1000349a: 438a bics r2, r1
|
|
1000349c: 0011 movs r1, r2
|
|
1000349e: 3108 adds r1, #8
|
|
100034a0: 911c str r1, [sp, #112] @ 0x70
|
|
100034a2: 9708 str r7, [sp, #32]
|
|
100034a4: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100034a6: 9307 str r3, [sp, #28]
|
|
100034a8: 9406 str r4, [sp, #24]
|
|
100034aa: 4663 mov r3, ip
|
|
100034ac: 9304 str r3, [sp, #16]
|
|
100034ae: 2300 movs r3, #0
|
|
100034b0: 9305 str r3, [sp, #20]
|
|
100034b2: 9302 str r3, [sp, #8]
|
|
100034b4: 6853 ldr r3, [r2, #4]
|
|
100034b6: 6812 ldr r2, [r2, #0]
|
|
100034b8: 9200 str r2, [sp, #0]
|
|
100034ba: 9301 str r3, [sp, #4]
|
|
100034bc: 465b mov r3, fp
|
|
100034be: 002a movs r2, r5
|
|
100034c0: 4641 mov r1, r8
|
|
100034c2: 0030 movs r0, r6
|
|
100034c4: f7ff f9eb bl 1000289e <_ntoa_long_long>
|
|
100034c8: 0005 movs r5, r0
|
|
100034ca: e788 b.n 100033de <_vsnprintf+0x2be>
|
|
100034cc: 1000a020 .word 0x1000a020
|
|
100034d0: 1000a064 .word 0x1000a064
|
|
100034d4: 1000a0b0 .word 0x1000a0b0
|
|
100034d8: 00009041 .word 0x00009041
|
|
100034dc: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
100034de: 1d11 adds r1, r2, #4
|
|
100034e0: 911c str r1, [sp, #112] @ 0x70
|
|
100034e2: 9705 str r7, [sp, #20]
|
|
100034e4: 9b0b ldr r3, [sp, #44] @ 0x2c
|
|
100034e6: 9304 str r3, [sp, #16]
|
|
100034e8: 9403 str r4, [sp, #12]
|
|
100034ea: 4663 mov r3, ip
|
|
100034ec: 9302 str r3, [sp, #8]
|
|
100034ee: 2300 movs r3, #0
|
|
100034f0: 9301 str r3, [sp, #4]
|
|
100034f2: 6813 ldr r3, [r2, #0]
|
|
100034f4: 9300 str r3, [sp, #0]
|
|
100034f6: 465b mov r3, fp
|
|
100034f8: 002a movs r2, r5
|
|
100034fa: 4641 mov r1, r8
|
|
100034fc: 0030 movs r0, r6
|
|
100034fe: f7ff f970 bl 100027e2 <_ntoa_long>
|
|
10003502: 0005 movs r5, r0
|
|
10003504: e76b b.n 100033de <_vsnprintf+0x2be>
|
|
10003506: 063a lsls r2, r7, #24
|
|
10003508: d506 bpl.n 10003518 <_vsnprintf+0x3f8>
|
|
1000350a: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000350c: 1d11 adds r1, r2, #4
|
|
1000350e: 911c str r1, [sp, #112] @ 0x70
|
|
10003510: 6812 ldr r2, [r2, #0]
|
|
10003512: 0412 lsls r2, r2, #16
|
|
10003514: 0c12 lsrs r2, r2, #16
|
|
10003516: e726 b.n 10003366 <_vsnprintf+0x246>
|
|
10003518: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
1000351a: 1d11 adds r1, r2, #4
|
|
1000351c: 911c str r1, [sp, #112] @ 0x70
|
|
1000351e: 6812 ldr r2, [r2, #0]
|
|
10003520: e721 b.n 10003366 <_vsnprintf+0x246>
|
|
10003522: 2846 cmp r0, #70 @ 0x46
|
|
10003524: d019 beq.n 1000355a <_vsnprintf+0x43a>
|
|
10003526: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003528: 3307 adds r3, #7
|
|
1000352a: 2207 movs r2, #7
|
|
1000352c: 4393 bics r3, r2
|
|
1000352e: 001a movs r2, r3
|
|
10003530: 3208 adds r2, #8
|
|
10003532: 921c str r2, [sp, #112] @ 0x70
|
|
10003534: 9704 str r7, [sp, #16]
|
|
10003536: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
10003538: 9203 str r2, [sp, #12]
|
|
1000353a: 9402 str r4, [sp, #8]
|
|
1000353c: 681a ldr r2, [r3, #0]
|
|
1000353e: 685b ldr r3, [r3, #4]
|
|
10003540: 9200 str r2, [sp, #0]
|
|
10003542: 9301 str r3, [sp, #4]
|
|
10003544: 465b mov r3, fp
|
|
10003546: 002a movs r2, r5
|
|
10003548: 4641 mov r1, r8
|
|
1000354a: 0030 movs r0, r6
|
|
1000354c: f7ff fc3e bl 10002dcc <_ftoa>
|
|
10003550: 0005 movs r5, r0
|
|
10003552: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003554: 3301 adds r3, #1
|
|
10003556: 9311 str r3, [sp, #68] @ 0x44
|
|
10003558: e5f2 b.n 10003140 <_vsnprintf+0x20>
|
|
1000355a: 2320 movs r3, #32
|
|
1000355c: 431f orrs r7, r3
|
|
1000355e: e7e2 b.n 10003526 <_vsnprintf+0x406>
|
|
10003560: 2867 cmp r0, #103 @ 0x67
|
|
10003562: d001 beq.n 10003568 <_vsnprintf+0x448>
|
|
10003564: 2847 cmp r0, #71 @ 0x47
|
|
10003566: d102 bne.n 1000356e <_vsnprintf+0x44e>
|
|
10003568: 2380 movs r3, #128 @ 0x80
|
|
1000356a: 011b lsls r3, r3, #4
|
|
1000356c: 431f orrs r7, r3
|
|
1000356e: 2845 cmp r0, #69 @ 0x45
|
|
10003570: d001 beq.n 10003576 <_vsnprintf+0x456>
|
|
10003572: 2847 cmp r0, #71 @ 0x47
|
|
10003574: d101 bne.n 1000357a <_vsnprintf+0x45a>
|
|
10003576: 2320 movs r3, #32
|
|
10003578: 431f orrs r7, r3
|
|
1000357a: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
1000357c: 3307 adds r3, #7
|
|
1000357e: 2207 movs r2, #7
|
|
10003580: 4393 bics r3, r2
|
|
10003582: 001a movs r2, r3
|
|
10003584: 3208 adds r2, #8
|
|
10003586: 921c str r2, [sp, #112] @ 0x70
|
|
10003588: 9704 str r7, [sp, #16]
|
|
1000358a: 9a0b ldr r2, [sp, #44] @ 0x2c
|
|
1000358c: 9203 str r2, [sp, #12]
|
|
1000358e: 9402 str r4, [sp, #8]
|
|
10003590: 681a ldr r2, [r3, #0]
|
|
10003592: 685b ldr r3, [r3, #4]
|
|
10003594: 9200 str r2, [sp, #0]
|
|
10003596: 9301 str r3, [sp, #4]
|
|
10003598: 465b mov r3, fp
|
|
1000359a: 002a movs r2, r5
|
|
1000359c: 4641 mov r1, r8
|
|
1000359e: 0030 movs r0, r6
|
|
100035a0: f7ff fa04 bl 100029ac <_etoa>
|
|
100035a4: 0005 movs r5, r0
|
|
100035a6: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100035a8: 3301 adds r3, #1
|
|
100035aa: 9311 str r3, [sp, #68] @ 0x44
|
|
100035ac: e5c8 b.n 10003140 <_vsnprintf+0x20>
|
|
100035ae: 2302 movs r3, #2
|
|
100035b0: 001a movs r2, r3
|
|
100035b2: 403a ands r2, r7
|
|
100035b4: 4691 mov r9, r2
|
|
100035b6: 423b tst r3, r7
|
|
100035b8: d01d beq.n 100035f6 <_vsnprintf+0x4d6>
|
|
100035ba: 2401 movs r4, #1
|
|
100035bc: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
100035be: 1d1a adds r2, r3, #4
|
|
100035c0: 921c str r2, [sp, #112] @ 0x70
|
|
100035c2: 1c6f adds r7, r5, #1
|
|
100035c4: 7818 ldrb r0, [r3, #0]
|
|
100035c6: 465b mov r3, fp
|
|
100035c8: 002a movs r2, r5
|
|
100035ca: 4641 mov r1, r8
|
|
100035cc: 47b0 blx r6
|
|
100035ce: 464b mov r3, r9
|
|
100035d0: 2b00 cmp r3, #0
|
|
100035d2: d114 bne.n 100035fe <_vsnprintf+0x4de>
|
|
100035d4: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100035d6: 3301 adds r3, #1
|
|
100035d8: 9311 str r3, [sp, #68] @ 0x44
|
|
100035da: 003d movs r5, r7
|
|
100035dc: e5b0 b.n 10003140 <_vsnprintf+0x20>
|
|
100035de: 1c57 adds r7, r2, #1
|
|
100035e0: 465b mov r3, fp
|
|
100035e2: 4641 mov r1, r8
|
|
100035e4: 2020 movs r0, #32
|
|
100035e6: 47b0 blx r6
|
|
100035e8: 0023 movs r3, r4
|
|
100035ea: 003a movs r2, r7
|
|
100035ec: 1c5c adds r4, r3, #1
|
|
100035ee: 429d cmp r5, r3
|
|
100035f0: d8f5 bhi.n 100035de <_vsnprintf+0x4be>
|
|
100035f2: 0015 movs r5, r2
|
|
100035f4: e7e2 b.n 100035bc <_vsnprintf+0x49c>
|
|
100035f6: 2301 movs r3, #1
|
|
100035f8: 002a movs r2, r5
|
|
100035fa: 9d0b ldr r5, [sp, #44] @ 0x2c
|
|
100035fc: e7f6 b.n 100035ec <_vsnprintf+0x4cc>
|
|
100035fe: 003a movs r2, r7
|
|
10003600: 46b1 mov r9, r6
|
|
10003602: 9e0b ldr r6, [sp, #44] @ 0x2c
|
|
10003604: e006 b.n 10003614 <_vsnprintf+0x4f4>
|
|
10003606: 1c57 adds r7, r2, #1
|
|
10003608: 465b mov r3, fp
|
|
1000360a: 4641 mov r1, r8
|
|
1000360c: 2020 movs r0, #32
|
|
1000360e: 47c8 blx r9
|
|
10003610: 002c movs r4, r5
|
|
10003612: 003a movs r2, r7
|
|
10003614: 1c65 adds r5, r4, #1
|
|
10003616: 42a6 cmp r6, r4
|
|
10003618: d8f5 bhi.n 10003606 <_vsnprintf+0x4e6>
|
|
1000361a: 0017 movs r7, r2
|
|
1000361c: 464e mov r6, r9
|
|
1000361e: e7d9 b.n 100035d4 <_vsnprintf+0x4b4>
|
|
10003620: 9b1c ldr r3, [sp, #112] @ 0x70
|
|
10003622: 1d1a adds r2, r3, #4
|
|
10003624: 921c str r2, [sp, #112] @ 0x70
|
|
10003626: 681b ldr r3, [r3, #0]
|
|
10003628: 469a mov sl, r3
|
|
1000362a: 2c00 cmp r4, #0
|
|
1000362c: d125 bne.n 1000367a <_vsnprintf+0x55a>
|
|
1000362e: 2201 movs r2, #1
|
|
10003630: 4252 negs r2, r2
|
|
10003632: 4653 mov r3, sl
|
|
10003634: e001 b.n 1000363a <_vsnprintf+0x51a>
|
|
10003636: 3301 adds r3, #1
|
|
10003638: 000a movs r2, r1
|
|
1000363a: 7819 ldrb r1, [r3, #0]
|
|
1000363c: 2900 cmp r1, #0
|
|
1000363e: d002 beq.n 10003646 <_vsnprintf+0x526>
|
|
10003640: 1e51 subs r1, r2, #1
|
|
10003642: 2a00 cmp r2, #0
|
|
10003644: d1f7 bne.n 10003636 <_vsnprintf+0x516>
|
|
10003646: 4652 mov r2, sl
|
|
10003648: 1a9b subs r3, r3, r2
|
|
1000364a: 2280 movs r2, #128 @ 0x80
|
|
1000364c: 00d2 lsls r2, r2, #3
|
|
1000364e: 0039 movs r1, r7
|
|
10003650: 4011 ands r1, r2
|
|
10003652: 4689 mov r9, r1
|
|
10003654: 4217 tst r7, r2
|
|
10003656: d002 beq.n 1000365e <_vsnprintf+0x53e>
|
|
10003658: 42a3 cmp r3, r4
|
|
1000365a: d900 bls.n 1000365e <_vsnprintf+0x53e>
|
|
1000365c: 0023 movs r3, r4
|
|
1000365e: 2202 movs r2, #2
|
|
10003660: 0011 movs r1, r2
|
|
10003662: 4039 ands r1, r7
|
|
10003664: 9110 str r1, [sp, #64] @ 0x40
|
|
10003666: 423a tst r2, r7
|
|
10003668: d009 beq.n 1000367e <_vsnprintf+0x55e>
|
|
1000366a: 002a movs r2, r5
|
|
1000366c: 0025 movs r5, r4
|
|
1000366e: 4657 mov r7, sl
|
|
10003670: 469a mov sl, r3
|
|
10003672: 0033 movs r3, r6
|
|
10003674: 464e mov r6, r9
|
|
10003676: 4699 mov r9, r3
|
|
10003678: e021 b.n 100036be <_vsnprintf+0x59e>
|
|
1000367a: 0022 movs r2, r4
|
|
1000367c: e7d9 b.n 10003632 <_vsnprintf+0x512>
|
|
1000367e: 002a movs r2, r5
|
|
10003680: 4645 mov r5, r8
|
|
10003682: 46a0 mov r8, r4
|
|
10003684: e006 b.n 10003694 <_vsnprintf+0x574>
|
|
10003686: 1c54 adds r4, r2, #1
|
|
10003688: 465b mov r3, fp
|
|
1000368a: 0029 movs r1, r5
|
|
1000368c: 2020 movs r0, #32
|
|
1000368e: 47b0 blx r6
|
|
10003690: 003b movs r3, r7
|
|
10003692: 0022 movs r2, r4
|
|
10003694: 1c5f adds r7, r3, #1
|
|
10003696: 990b ldr r1, [sp, #44] @ 0x2c
|
|
10003698: 4299 cmp r1, r3
|
|
1000369a: d8f4 bhi.n 10003686 <_vsnprintf+0x566>
|
|
1000369c: 4644 mov r4, r8
|
|
1000369e: 46a8 mov r8, r5
|
|
100036a0: 003b movs r3, r7
|
|
100036a2: 0025 movs r5, r4
|
|
100036a4: 4657 mov r7, sl
|
|
100036a6: 469a mov sl, r3
|
|
100036a8: 0033 movs r3, r6
|
|
100036aa: 464e mov r6, r9
|
|
100036ac: 4699 mov r9, r3
|
|
100036ae: e006 b.n 100036be <_vsnprintf+0x59e>
|
|
100036b0: 001d movs r5, r3
|
|
100036b2: 3701 adds r7, #1
|
|
100036b4: 1c54 adds r4, r2, #1
|
|
100036b6: 465b mov r3, fp
|
|
100036b8: 4641 mov r1, r8
|
|
100036ba: 47c8 blx r9
|
|
100036bc: 0022 movs r2, r4
|
|
100036be: 7838 ldrb r0, [r7, #0]
|
|
100036c0: 2800 cmp r0, #0
|
|
100036c2: d004 beq.n 100036ce <_vsnprintf+0x5ae>
|
|
100036c4: 2e00 cmp r6, #0
|
|
100036c6: d0f4 beq.n 100036b2 <_vsnprintf+0x592>
|
|
100036c8: 1e6b subs r3, r5, #1
|
|
100036ca: 2d00 cmp r5, #0
|
|
100036cc: d1f0 bne.n 100036b0 <_vsnprintf+0x590>
|
|
100036ce: 0015 movs r5, r2
|
|
100036d0: 4653 mov r3, sl
|
|
100036d2: 464e mov r6, r9
|
|
100036d4: 9a10 ldr r2, [sp, #64] @ 0x40
|
|
100036d6: 2a00 cmp r2, #0
|
|
100036d8: d103 bne.n 100036e2 <_vsnprintf+0x5c2>
|
|
100036da: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
100036dc: 3301 adds r3, #1
|
|
100036de: 9311 str r3, [sp, #68] @ 0x44
|
|
100036e0: e52e b.n 10003140 <_vsnprintf+0x20>
|
|
100036e2: 9f0b ldr r7, [sp, #44] @ 0x2c
|
|
100036e4: 002a movs r2, r5
|
|
100036e6: e006 b.n 100036f6 <_vsnprintf+0x5d6>
|
|
100036e8: 1c55 adds r5, r2, #1
|
|
100036ea: 465b mov r3, fp
|
|
100036ec: 4641 mov r1, r8
|
|
100036ee: 2020 movs r0, #32
|
|
100036f0: 47b0 blx r6
|
|
100036f2: 0023 movs r3, r4
|
|
100036f4: 002a movs r2, r5
|
|
100036f6: 1c5c adds r4, r3, #1
|
|
100036f8: 429f cmp r7, r3
|
|
100036fa: d8f5 bhi.n 100036e8 <_vsnprintf+0x5c8>
|
|
100036fc: 0015 movs r5, r2
|
|
100036fe: e7ec b.n 100036da <_vsnprintf+0x5ba>
|
|
10003700: 2321 movs r3, #33 @ 0x21
|
|
10003702: 433b orrs r3, r7
|
|
10003704: 9a1c ldr r2, [sp, #112] @ 0x70
|
|
10003706: 1d11 adds r1, r2, #4
|
|
10003708: 911c str r1, [sp, #112] @ 0x70
|
|
1000370a: 6812 ldr r2, [r2, #0]
|
|
1000370c: 9305 str r3, [sp, #20]
|
|
1000370e: 2308 movs r3, #8
|
|
10003710: 9304 str r3, [sp, #16]
|
|
10003712: 9403 str r4, [sp, #12]
|
|
10003714: 3308 adds r3, #8
|
|
10003716: 9302 str r3, [sp, #8]
|
|
10003718: 2300 movs r3, #0
|
|
1000371a: 9301 str r3, [sp, #4]
|
|
1000371c: 9200 str r2, [sp, #0]
|
|
1000371e: 465b mov r3, fp
|
|
10003720: 002a movs r2, r5
|
|
10003722: 4641 mov r1, r8
|
|
10003724: 0030 movs r0, r6
|
|
10003726: f7ff f85c bl 100027e2 <_ntoa_long>
|
|
1000372a: 0005 movs r5, r0
|
|
1000372c: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
1000372e: 3301 adds r3, #1
|
|
10003730: 9311 str r3, [sp, #68] @ 0x44
|
|
10003732: e505 b.n 10003140 <_vsnprintf+0x20>
|
|
10003734: 1c6c adds r4, r5, #1
|
|
10003736: 465b mov r3, fp
|
|
10003738: 002a movs r2, r5
|
|
1000373a: 4641 mov r1, r8
|
|
1000373c: 2025 movs r0, #37 @ 0x25
|
|
1000373e: 47b0 blx r6
|
|
10003740: 9b11 ldr r3, [sp, #68] @ 0x44
|
|
10003742: 3301 adds r3, #1
|
|
10003744: 9311 str r3, [sp, #68] @ 0x44
|
|
10003746: 0025 movs r5, r4
|
|
10003748: e4fa b.n 10003140 <_vsnprintf+0x20>
|
|
1000374a: 4b0b ldr r3, [pc, #44] @ (10003778 <_vsnprintf+0x658>)
|
|
1000374c: 469a mov sl, r3
|
|
1000374e: e4f5 b.n 1000313c <_vsnprintf+0x1c>
|
|
10003750: 46b2 mov sl, r6
|
|
10003752: 455d cmp r5, fp
|
|
10003754: d30d bcc.n 10003772 <_vsnprintf+0x652>
|
|
10003756: 465b mov r3, fp
|
|
10003758: 1e5a subs r2, r3, #1
|
|
1000375a: 465b mov r3, fp
|
|
1000375c: 4641 mov r1, r8
|
|
1000375e: 2000 movs r0, #0
|
|
10003760: 47d0 blx sl
|
|
10003762: 0028 movs r0, r5
|
|
10003764: b013 add sp, #76 @ 0x4c
|
|
10003766: bcf0 pop {r4, r5, r6, r7}
|
|
10003768: 46bb mov fp, r7
|
|
1000376a: 46b2 mov sl, r6
|
|
1000376c: 46a9 mov r9, r5
|
|
1000376e: 46a0 mov r8, r4
|
|
10003770: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003772: 002a movs r2, r5
|
|
10003774: e7f1 b.n 1000375a <_vsnprintf+0x63a>
|
|
10003776: 46c0 nop @ (mov r8, r8)
|
|
10003778: 100025f1 .word 0x100025f1
|
|
|
|
1000377c <vfctprintf>:
|
|
1000377c: b500 push {lr}
|
|
1000377e: b085 sub sp, #20
|
|
10003780: 9002 str r0, [sp, #8]
|
|
10003782: 9103 str r1, [sp, #12]
|
|
10003784: 2101 movs r1, #1
|
|
10003786: 4804 ldr r0, [pc, #16] @ (10003798 <vfctprintf+0x1c>)
|
|
10003788: 9300 str r3, [sp, #0]
|
|
1000378a: 0013 movs r3, r2
|
|
1000378c: 424a negs r2, r1
|
|
1000378e: a902 add r1, sp, #8
|
|
10003790: f7ff fcc6 bl 10003120 <_vsnprintf>
|
|
10003794: b005 add sp, #20
|
|
10003796: bd00 pop {pc}
|
|
10003798: 100025f3 .word 0x100025f3
|
|
|
|
1000379c <__aeabi_bits_init>:
|
|
1000379c: 4801 ldr r0, [pc, #4] @ (100037a4 <__aeabi_bits_init+0x8>)
|
|
1000379e: 2104 movs r1, #4
|
|
100037a0: 4b01 ldr r3, [pc, #4] @ (100037a8 <__aeabi_bits_init+0xc>)
|
|
100037a2: 4718 bx r3
|
|
100037a4: 20000b60 .word 0x20000b60
|
|
100037a8: 100007ed .word 0x100007ed
|
|
|
|
100037ac <__wrap___aeabi_idiv>:
|
|
100037ac: 4a12 ldr r2, [pc, #72] @ (100037f8 <divmod_s32s32_savestate+0x18>)
|
|
100037ae: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
100037b0: 089b lsrs r3, r3, #2
|
|
100037b2: d215 bcs.n 100037e0 <divmod_s32s32_savestate>
|
|
|
|
100037b4 <divmod_s32s32_unsafe>:
|
|
100037b4: 6690 str r0, [r2, #104] @ 0x68
|
|
100037b6: 66d1 str r1, [r2, #108] @ 0x6c
|
|
100037b8: 2900 cmp r1, #0
|
|
100037ba: d005 beq.n 100037c8 <divmod_s32s32_unsafe+0x14>
|
|
100037bc: e7ff b.n 100037be <divmod_s32s32_unsafe+0xa>
|
|
100037be: e7ff b.n 100037c0 <divmod_s32s32_unsafe+0xc>
|
|
100037c0: e7ff b.n 100037c2 <divmod_s32s32_unsafe+0xe>
|
|
100037c2: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
100037c4: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
100037c6: 4770 bx lr
|
|
100037c8: b504 push {r2, lr}
|
|
100037ca: 2180 movs r1, #128 @ 0x80
|
|
100037cc: 0609 lsls r1, r1, #24
|
|
100037ce: 17c2 asrs r2, r0, #31
|
|
100037d0: 4051 eors r1, r2
|
|
100037d2: 2800 cmp r0, #0
|
|
100037d4: d000 beq.n 100037d8 <divmod_s32s32_unsafe+0x24>
|
|
100037d6: 43c8 mvns r0, r1
|
|
100037d8: f005 fcc6 bl 10009168 <____aeabi_idiv0_veneer>
|
|
100037dc: 2100 movs r1, #0
|
|
100037de: bd04 pop {r2, pc}
|
|
|
|
100037e0 <divmod_s32s32_savestate>:
|
|
100037e0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100037e2: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
100037e4: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
100037e6: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
100037e8: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
100037ea: f7ff ffe3 bl 100037b4 <divmod_s32s32_unsafe>
|
|
100037ee: 6614 str r4, [r2, #96] @ 0x60
|
|
100037f0: 6655 str r5, [r2, #100] @ 0x64
|
|
100037f2: 6757 str r7, [r2, #116] @ 0x74
|
|
100037f4: 6716 str r6, [r2, #112] @ 0x70
|
|
100037f6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100037f8: d0000000 .word 0xd0000000
|
|
|
|
100037fc <__wrap___aeabi_uidiv>:
|
|
100037fc: 4a11 ldr r2, [pc, #68] @ (10003844 <divmod_u32u32_savestate+0x18>)
|
|
100037fe: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
10003800: 089b lsrs r3, r3, #2
|
|
10003802: d213 bcs.n 1000382c <divmod_u32u32_savestate>
|
|
|
|
10003804 <divmod_u32u32_unsafe>:
|
|
10003804: 6610 str r0, [r2, #96] @ 0x60
|
|
10003806: 6651 str r1, [r2, #100] @ 0x64
|
|
10003808: 2900 cmp r1, #0
|
|
1000380a: d005 beq.n 10003818 <divmod_u32u32_unsafe+0x14>
|
|
1000380c: e7ff b.n 1000380e <divmod_u32u32_unsafe+0xa>
|
|
1000380e: e7ff b.n 10003810 <divmod_u32u32_unsafe+0xc>
|
|
10003810: e7ff b.n 10003812 <divmod_u32u32_unsafe+0xe>
|
|
10003812: 6f51 ldr r1, [r2, #116] @ 0x74
|
|
10003814: 6f10 ldr r0, [r2, #112] @ 0x70
|
|
10003816: 4770 bx lr
|
|
10003818: b504 push {r2, lr}
|
|
1000381a: 2800 cmp r0, #0
|
|
1000381c: d001 beq.n 10003822 <divmod_u32u32_unsafe+0x1e>
|
|
1000381e: 2000 movs r0, #0
|
|
10003820: 43c0 mvns r0, r0
|
|
10003822: f005 fca1 bl 10009168 <____aeabi_idiv0_veneer>
|
|
10003826: 2100 movs r1, #0
|
|
10003828: bd04 pop {r2, pc}
|
|
1000382a: 46c0 nop @ (mov r8, r8)
|
|
|
|
1000382c <divmod_u32u32_savestate>:
|
|
1000382c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000382e: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003830: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003832: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003834: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003836: f7ff ffe5 bl 10003804 <divmod_u32u32_unsafe>
|
|
1000383a: 6614 str r4, [r2, #96] @ 0x60
|
|
1000383c: 6655 str r5, [r2, #100] @ 0x64
|
|
1000383e: 6757 str r7, [r2, #116] @ 0x74
|
|
10003840: 6716 str r6, [r2, #112] @ 0x70
|
|
10003842: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003844: d0000000 .word 0xd0000000
|
|
|
|
10003848 <__wrap___aeabi_ldivmod>:
|
|
10003848: 4694 mov ip, r2
|
|
1000384a: 4a4a ldr r2, [pc, #296] @ (10003974 <udiv0+0x1a>)
|
|
1000384c: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
1000384e: 0892 lsrs r2, r2, #2
|
|
10003850: 4662 mov r2, ip
|
|
10003852: d201 bcs.n 10003858 <divmod_s64s64_savestate>
|
|
10003854: e028 b.n 100038a8 <divmod_s64s64_unsafe>
|
|
10003856: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003858 <divmod_s64s64_savestate>:
|
|
10003858: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000385a: 4e46 ldr r6, [pc, #280] @ (10003974 <udiv0+0x1a>)
|
|
1000385c: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
1000385e: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
10003860: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
10003862: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
10003864: f000 f820 bl 100038a8 <divmod_s64s64_unsafe>
|
|
10003868: 4694 mov ip, r2
|
|
1000386a: 4a42 ldr r2, [pc, #264] @ (10003974 <udiv0+0x1a>)
|
|
1000386c: 6614 str r4, [r2, #96] @ 0x60
|
|
1000386e: 6655 str r5, [r2, #100] @ 0x64
|
|
10003870: 6757 str r7, [r2, #116] @ 0x74
|
|
10003872: 6716 str r6, [r2, #112] @ 0x70
|
|
10003874: 4662 mov r2, ip
|
|
10003876: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003878 <__wrap___aeabi_uldivmod>:
|
|
10003878: 4694 mov ip, r2
|
|
1000387a: 4a3e ldr r2, [pc, #248] @ (10003974 <udiv0+0x1a>)
|
|
1000387c: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
1000387e: 0892 lsrs r2, r2, #2
|
|
10003880: 4662 mov r2, ip
|
|
10003882: d201 bcs.n 10003888 <divmod_u64u64_savestate>
|
|
10003884: e054 b.n 10003930 <divmod_u64u64_unsafe>
|
|
10003886: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003888 <divmod_u64u64_savestate>:
|
|
10003888: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000388a: 4e3a ldr r6, [pc, #232] @ (10003974 <udiv0+0x1a>)
|
|
1000388c: 6e34 ldr r4, [r6, #96] @ 0x60
|
|
1000388e: 6e75 ldr r5, [r6, #100] @ 0x64
|
|
10003890: 6f77 ldr r7, [r6, #116] @ 0x74
|
|
10003892: 6f36 ldr r6, [r6, #112] @ 0x70
|
|
10003894: f000 f84c bl 10003930 <divmod_u64u64_unsafe>
|
|
10003898: 4694 mov ip, r2
|
|
1000389a: 4a36 ldr r2, [pc, #216] @ (10003974 <udiv0+0x1a>)
|
|
1000389c: 6614 str r4, [r2, #96] @ 0x60
|
|
1000389e: 6655 str r5, [r2, #100] @ 0x64
|
|
100038a0: 6757 str r7, [r2, #116] @ 0x74
|
|
100038a2: 6716 str r6, [r2, #112] @ 0x70
|
|
100038a4: 4662 mov r2, ip
|
|
100038a6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100038a8 <divmod_s64s64_unsafe>:
|
|
100038a8: 2b00 cmp r3, #0
|
|
100038aa: db24 blt.n 100038f6 <l42_1+0x26>
|
|
100038ac: d011 beq.n 100038d2 <l42_1+0x2>
|
|
100038ae: 2900 cmp r1, #0
|
|
100038b0: da3e bge.n 10003930 <divmod_u64u64_unsafe>
|
|
100038b2: b500 push {lr}
|
|
100038b4: 43c9 mvns r1, r1
|
|
100038b6: 4240 negs r0, r0
|
|
100038b8: d100 bne.n 100038bc <l40_1>
|
|
100038ba: 3101 adds r1, #1
|
|
|
|
100038bc <l40_1>:
|
|
100038bc: f000 f838 bl 10003930 <divmod_u64u64_unsafe>
|
|
100038c0: 43c9 mvns r1, r1
|
|
100038c2: 4240 negs r0, r0
|
|
100038c4: d100 bne.n 100038c8 <l41_1>
|
|
100038c6: 3101 adds r1, #1
|
|
|
|
100038c8 <l41_1>:
|
|
100038c8: 43db mvns r3, r3
|
|
100038ca: 4252 negs r2, r2
|
|
100038cc: d100 bne.n 100038d0 <l42_1>
|
|
100038ce: 3301 adds r3, #1
|
|
|
|
100038d0 <l42_1>:
|
|
100038d0: bd00 pop {pc}
|
|
100038d2: 2a00 cmp r2, #0
|
|
100038d4: d1eb bne.n 100038ae <divmod_s64s64_unsafe+0x6>
|
|
100038d6: 2800 cmp r0, #0
|
|
100038d8: d101 bne.n 100038de <l42_1+0xe>
|
|
100038da: 2900 cmp r1, #0
|
|
100038dc: d005 beq.n 100038ea <l42_1+0x1a>
|
|
100038de: 2000 movs r0, #0
|
|
100038e0: 0fc9 lsrs r1, r1, #31
|
|
100038e2: 07c9 lsls r1, r1, #31
|
|
100038e4: d101 bne.n 100038ea <l42_1+0x1a>
|
|
100038e6: 43c0 mvns r0, r0
|
|
100038e8: 0841 lsrs r1, r0, #1
|
|
100038ea: b500 push {lr}
|
|
100038ec: f005 fc24 bl 10009138 <____aeabi_ldiv0_veneer>
|
|
100038f0: 2200 movs r2, #0
|
|
100038f2: 2300 movs r3, #0
|
|
100038f4: bd00 pop {pc}
|
|
100038f6: b500 push {lr}
|
|
100038f8: 2900 cmp r1, #0
|
|
100038fa: db0a blt.n 10003912 <l44_1+0x2>
|
|
100038fc: 43db mvns r3, r3
|
|
100038fe: 4252 negs r2, r2
|
|
10003900: d100 bne.n 10003904 <l43_1>
|
|
10003902: 3301 adds r3, #1
|
|
|
|
10003904 <l43_1>:
|
|
10003904: f000 f814 bl 10003930 <divmod_u64u64_unsafe>
|
|
10003908: 43c9 mvns r1, r1
|
|
1000390a: 4240 negs r0, r0
|
|
1000390c: d100 bne.n 10003910 <l44_1>
|
|
1000390e: 3101 adds r1, #1
|
|
|
|
10003910 <l44_1>:
|
|
10003910: bd00 pop {pc}
|
|
10003912: 43c9 mvns r1, r1
|
|
10003914: 4240 negs r0, r0
|
|
10003916: d100 bne.n 1000391a <l45_1>
|
|
10003918: 3101 adds r1, #1
|
|
|
|
1000391a <l45_1>:
|
|
1000391a: 43db mvns r3, r3
|
|
1000391c: 4252 negs r2, r2
|
|
1000391e: d100 bne.n 10003922 <l46_1>
|
|
10003920: 3301 adds r3, #1
|
|
|
|
10003922 <l46_1>:
|
|
10003922: f000 f805 bl 10003930 <divmod_u64u64_unsafe>
|
|
10003926: 43db mvns r3, r3
|
|
10003928: 4252 negs r2, r2
|
|
1000392a: d100 bne.n 1000392e <l47_1>
|
|
1000392c: 3301 adds r3, #1
|
|
|
|
1000392e <l47_1>:
|
|
1000392e: bd00 pop {pc}
|
|
|
|
10003930 <divmod_u64u64_unsafe>:
|
|
10003930: 2900 cmp r1, #0
|
|
10003932: d123 bne.n 1000397c <y64>
|
|
10003934: 2b00 cmp r3, #0
|
|
10003936: d118 bne.n 1000396a <udiv0+0x10>
|
|
10003938: 2a00 cmp r2, #0
|
|
1000393a: d00c beq.n 10003956 <divmod_u64u64_unsafe+0x26>
|
|
1000393c: 46bc mov ip, r7
|
|
1000393e: 4f0d ldr r7, [pc, #52] @ (10003974 <udiv0+0x1a>)
|
|
10003940: 6638 str r0, [r7, #96] @ 0x60
|
|
10003942: 667a str r2, [r7, #100] @ 0x64
|
|
10003944: 2100 movs r1, #0
|
|
10003946: 2300 movs r3, #0
|
|
10003948: e7ff b.n 1000394a <divmod_u64u64_unsafe+0x1a>
|
|
1000394a: e7ff b.n 1000394c <divmod_u64u64_unsafe+0x1c>
|
|
1000394c: e7ff b.n 1000394e <divmod_u64u64_unsafe+0x1e>
|
|
1000394e: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
10003950: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
10003952: 4667 mov r7, ip
|
|
10003954: 4770 bx lr
|
|
10003956: 2800 cmp r0, #0
|
|
10003958: d001 beq.n 1000395e <udiv0+0x4>
|
|
|
|
1000395a <udiv0>:
|
|
1000395a: 4807 ldr r0, [pc, #28] @ (10003978 <udiv0+0x1e>)
|
|
1000395c: 0001 movs r1, r0
|
|
1000395e: b500 push {lr}
|
|
10003960: f005 fbea bl 10009138 <____aeabi_ldiv0_veneer>
|
|
10003964: 2200 movs r2, #0
|
|
10003966: 2300 movs r3, #0
|
|
10003968: bd00 pop {pc}
|
|
1000396a: 0002 movs r2, r0
|
|
1000396c: 000b movs r3, r1
|
|
1000396e: 2000 movs r0, #0
|
|
10003970: 2100 movs r1, #0
|
|
10003972: 4770 bx lr
|
|
10003974: d0000000 .word 0xd0000000
|
|
10003978: ffffffff .word 0xffffffff
|
|
|
|
1000397c <y64>:
|
|
1000397c: 2b00 cmp r3, #0
|
|
1000397e: d000 beq.n 10003982 <y64+0x6>
|
|
10003980: e0bf b.n 10003b02 <y64_x48>
|
|
10003982: 0c13 lsrs r3, r2, #16
|
|
10003984: d128 bne.n 100039d8 <y64_x32>
|
|
10003986: 2a00 cmp r2, #0
|
|
10003988: d0e7 beq.n 1000395a <udiv0>
|
|
1000398a: b480 push {r7}
|
|
1000398c: 4f11 ldr r7, [pc, #68] @ (100039d4 <y64+0x58>)
|
|
1000398e: 6639 str r1, [r7, #96] @ 0x60
|
|
10003990: 667a str r2, [r7, #100] @ 0x64
|
|
10003992: e7ff b.n 10003994 <y64+0x18>
|
|
10003994: e7ff b.n 10003996 <y64+0x1a>
|
|
10003996: b430 push {r4, r5}
|
|
10003998: 0c04 lsrs r4, r0, #16
|
|
1000399a: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
1000399c: 6f39 ldr r1, [r7, #112] @ 0x70
|
|
1000399e: 041b lsls r3, r3, #16
|
|
100039a0: 4323 orrs r3, r4
|
|
100039a2: 663b str r3, [r7, #96] @ 0x60
|
|
100039a4: 667a str r2, [r7, #100] @ 0x64
|
|
100039a6: e7ff b.n 100039a8 <y64+0x2c>
|
|
100039a8: e7ff b.n 100039aa <y64+0x2e>
|
|
100039aa: e7ff b.n 100039ac <y64+0x30>
|
|
100039ac: 46c0 nop @ (mov r8, r8)
|
|
100039ae: b284 uxth r4, r0
|
|
100039b0: 6f7b ldr r3, [r7, #116] @ 0x74
|
|
100039b2: 6f3d ldr r5, [r7, #112] @ 0x70
|
|
100039b4: 041b lsls r3, r3, #16
|
|
100039b6: 4323 orrs r3, r4
|
|
100039b8: 663b str r3, [r7, #96] @ 0x60
|
|
100039ba: 667a str r2, [r7, #100] @ 0x64
|
|
100039bc: e7ff b.n 100039be <y64+0x42>
|
|
100039be: e7ff b.n 100039c0 <y64+0x44>
|
|
100039c0: 46c0 nop @ (mov r8, r8)
|
|
100039c2: 2300 movs r3, #0
|
|
100039c4: 042c lsls r4, r5, #16
|
|
100039c6: 0c2d lsrs r5, r5, #16
|
|
100039c8: 6f7a ldr r2, [r7, #116] @ 0x74
|
|
100039ca: 6f38 ldr r0, [r7, #112] @ 0x70
|
|
100039cc: 1900 adds r0, r0, r4
|
|
100039ce: 4169 adcs r1, r5
|
|
100039d0: bcb0 pop {r4, r5, r7}
|
|
100039d2: 4770 bx lr
|
|
100039d4: d0000000 .word 0xd0000000
|
|
|
|
100039d8 <y64_x32>:
|
|
100039d8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100039da: 4694 mov ip, r2
|
|
100039dc: 2500 movs r5, #0
|
|
100039de: 0e14 lsrs r4, r2, #24
|
|
100039e0: d101 bne.n 100039e6 <y64_x32+0xe>
|
|
100039e2: 0212 lsls r2, r2, #8
|
|
100039e4: 3508 adds r5, #8
|
|
100039e6: 0f14 lsrs r4, r2, #28
|
|
100039e8: d101 bne.n 100039ee <y64_x32+0x16>
|
|
100039ea: 0112 lsls r2, r2, #4
|
|
100039ec: 3504 adds r5, #4
|
|
100039ee: 0f94 lsrs r4, r2, #30
|
|
100039f0: d101 bne.n 100039f6 <y64_x32+0x1e>
|
|
100039f2: 0092 lsls r2, r2, #2
|
|
100039f4: 3502 adds r5, #2
|
|
100039f6: 0fd4 lsrs r4, r2, #31
|
|
100039f8: d101 bne.n 100039fe <y64_x32+0x26>
|
|
100039fa: 0052 lsls r2, r2, #1
|
|
100039fc: 3501 adds r5, #1
|
|
100039fe: 0bd4 lsrs r4, r2, #15
|
|
10003a00: 3401 adds r4, #1
|
|
10003a02: 4f25 ldr r7, [pc, #148] @ (10003a98 <y64_x32+0xc0>)
|
|
10003a04: 667c str r4, [r7, #100] @ 0x64
|
|
10003a06: 4c25 ldr r4, [pc, #148] @ (10003a9c <y64_x32+0xc4>)
|
|
10003a08: 663c str r4, [r7, #96] @ 0x60
|
|
10003a0a: 0c0e lsrs r6, r1, #16
|
|
10003a0c: b293 uxth r3, r2
|
|
10003a0e: e7ff b.n 10003a10 <y64_x32+0x38>
|
|
10003a10: e7ff b.n 10003a12 <y64_x32+0x3a>
|
|
10003a12: e7ff b.n 10003a14 <y64_x32+0x3c>
|
|
10003a14: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003a16: 4366 muls r6, r4
|
|
10003a18: 0c36 lsrs r6, r6, #16
|
|
10003a1a: 0377 lsls r7, r6, #13
|
|
10003a1c: 46be mov lr, r7
|
|
10003a1e: 4373 muls r3, r6
|
|
10003a20: 0bdf lsrs r7, r3, #15
|
|
10003a22: 045b lsls r3, r3, #17
|
|
10003a24: 1ac0 subs r0, r0, r3
|
|
10003a26: 41b9 sbcs r1, r7
|
|
10003a28: 0c13 lsrs r3, r2, #16
|
|
10003a2a: 4373 muls r3, r6
|
|
10003a2c: 18db adds r3, r3, r3
|
|
10003a2e: 1ac9 subs r1, r1, r3
|
|
10003a30: 08ce lsrs r6, r1, #3
|
|
10003a32: 4366 muls r6, r4
|
|
10003a34: 0c36 lsrs r6, r6, #16
|
|
10003a36: 44b6 add lr, r6
|
|
10003a38: b293 uxth r3, r2
|
|
10003a3a: 4373 muls r3, r6
|
|
10003a3c: 0f1f lsrs r7, r3, #28
|
|
10003a3e: 011b lsls r3, r3, #4
|
|
10003a40: 1ac0 subs r0, r0, r3
|
|
10003a42: 41b9 sbcs r1, r7
|
|
10003a44: 0c13 lsrs r3, r2, #16
|
|
10003a46: 4373 muls r3, r6
|
|
10003a48: 0b1f lsrs r7, r3, #12
|
|
10003a4a: 051b lsls r3, r3, #20
|
|
10003a4c: 1ac0 subs r0, r0, r3
|
|
10003a4e: 41b9 sbcs r1, r7
|
|
10003a50: 0d86 lsrs r6, r0, #22
|
|
10003a52: 028f lsls r7, r1, #10
|
|
10003a54: 433e orrs r6, r7
|
|
10003a56: 4366 muls r6, r4
|
|
10003a58: 0c36 lsrs r6, r6, #16
|
|
10003a5a: 2d09 cmp r5, #9
|
|
10003a5c: db24 blt.n 10003aa8 <last0>
|
|
10003a5e: 0a52 lsrs r2, r2, #9
|
|
10003a60: 4372 muls r2, r6
|
|
10003a62: 1a80 subs r0, r0, r2
|
|
10003a64: 0377 lsls r7, r6, #13
|
|
10003a66: 0a46 lsrs r6, r0, #9
|
|
10003a68: 4366 muls r6, r4
|
|
10003a6a: 0c36 lsrs r6, r6, #16
|
|
10003a6c: 2316 movs r3, #22
|
|
10003a6e: 1b5b subs r3, r3, r5
|
|
10003a70: 40de lsrs r6, r3
|
|
10003a72: 40df lsrs r7, r3
|
|
10003a74: 19bf adds r7, r7, r6
|
|
10003a76: 4664 mov r4, ip
|
|
10003a78: 4366 muls r6, r4
|
|
10003a7a: 1b82 subs r2, r0, r6
|
|
10003a7c: 4670 mov r0, lr
|
|
10003a7e: 3504 adds r5, #4
|
|
10003a80: 3306 adds r3, #6
|
|
10003a82: 0001 movs r1, r0
|
|
10003a84: 40d9 lsrs r1, r3
|
|
10003a86: 40a8 lsls r0, r5
|
|
10003a88: 19c0 adds r0, r0, r7
|
|
10003a8a: d300 bcc.n 10003a8e <y64_x32+0xb6>
|
|
10003a8c: 3101 adds r1, #1
|
|
10003a8e: 42a2 cmp r2, r4
|
|
10003a90: d206 bcs.n 10003aa0 <y64_x32+0xc8>
|
|
10003a92: 2300 movs r3, #0
|
|
10003a94: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003a96: 0000 .short 0x0000
|
|
10003a98: d0000000 .word 0xd0000000
|
|
10003a9c: ffffffff .word 0xffffffff
|
|
10003aa0: 1b12 subs r2, r2, r4
|
|
10003aa2: 3001 adds r0, #1
|
|
10003aa4: d3f3 bcc.n 10003a8e <y64_x32+0xb6>
|
|
10003aa6: e7f1 b.n 10003a8c <y64_x32+0xb4>
|
|
|
|
10003aa8 <last0>:
|
|
10003aa8: 2709 movs r7, #9
|
|
10003aaa: 1b7f subs r7, r7, r5
|
|
10003aac: 40fe lsrs r6, r7
|
|
10003aae: 4664 mov r4, ip
|
|
10003ab0: b2a2 uxth r2, r4
|
|
10003ab2: 4372 muls r2, r6
|
|
10003ab4: 1a80 subs r0, r0, r2
|
|
10003ab6: d200 bcs.n 10003aba <last0+0x12>
|
|
10003ab8: 3901 subs r1, #1
|
|
10003aba: 0c22 lsrs r2, r4, #16
|
|
10003abc: 4372 muls r2, r6
|
|
10003abe: 0c13 lsrs r3, r2, #16
|
|
10003ac0: 0412 lsls r2, r2, #16
|
|
10003ac2: 1a82 subs r2, r0, r2
|
|
10003ac4: 4199 sbcs r1, r3
|
|
10003ac6: 000b movs r3, r1
|
|
10003ac8: 4670 mov r0, lr
|
|
10003aca: 3504 adds r5, #4
|
|
10003acc: 3713 adds r7, #19
|
|
10003ace: 0001 movs r1, r0
|
|
10003ad0: 40f9 lsrs r1, r7
|
|
10003ad2: 40a8 lsls r0, r5
|
|
10003ad4: 1980 adds r0, r0, r6
|
|
10003ad6: d300 bcc.n 10003ada <last0+0x32>
|
|
10003ad8: 3101 adds r1, #1
|
|
10003ada: 2b00 cmp r3, #0
|
|
10003adc: d102 bne.n 10003ae4 <last0+0x3c>
|
|
10003ade: 42a2 cmp r2, r4
|
|
10003ae0: d20a bcs.n 10003af8 <last0+0x50>
|
|
10003ae2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003ae4: 3001 adds r0, #1
|
|
10003ae6: d300 bcc.n 10003aea <last0+0x42>
|
|
10003ae8: 3101 adds r1, #1
|
|
10003aea: 1b12 subs r2, r2, r4
|
|
10003aec: d2fa bcs.n 10003ae4 <last0+0x3c>
|
|
10003aee: 3b01 subs r3, #1
|
|
10003af0: d1f8 bne.n 10003ae4 <last0+0x3c>
|
|
10003af2: 42a2 cmp r2, r4
|
|
10003af4: d200 bcs.n 10003af8 <last0+0x50>
|
|
10003af6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003af8: 3001 adds r0, #1
|
|
10003afa: d300 bcc.n 10003afe <last0+0x56>
|
|
10003afc: 3101 adds r1, #1
|
|
10003afe: 1b12 subs r2, r2, r4
|
|
10003b00: e7f7 b.n 10003af2 <last0+0x4a>
|
|
|
|
10003b02 <y64_x48>:
|
|
10003b02: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003b04: 0c1c lsrs r4, r3, #16
|
|
10003b06: d000 beq.n 10003b0a <y64_x48+0x8>
|
|
10003b08: e080 b.n 10003c0c <y64_x64>
|
|
10003b0a: b40c push {r2, r3}
|
|
10003b0c: 2500 movs r5, #0
|
|
10003b0e: 0a1c lsrs r4, r3, #8
|
|
10003b10: d104 bne.n 10003b1c <y64_x48+0x1a>
|
|
10003b12: 021b lsls r3, r3, #8
|
|
10003b14: 0e16 lsrs r6, r2, #24
|
|
10003b16: 4333 orrs r3, r6
|
|
10003b18: 0212 lsls r2, r2, #8
|
|
10003b1a: 3508 adds r5, #8
|
|
10003b1c: 0b1c lsrs r4, r3, #12
|
|
10003b1e: d104 bne.n 10003b2a <y64_x48+0x28>
|
|
10003b20: 011b lsls r3, r3, #4
|
|
10003b22: 0f16 lsrs r6, r2, #28
|
|
10003b24: 4333 orrs r3, r6
|
|
10003b26: 0112 lsls r2, r2, #4
|
|
10003b28: 3504 adds r5, #4
|
|
10003b2a: 0b9c lsrs r4, r3, #14
|
|
10003b2c: d104 bne.n 10003b38 <y64_x48+0x36>
|
|
10003b2e: 009b lsls r3, r3, #2
|
|
10003b30: 0f96 lsrs r6, r2, #30
|
|
10003b32: 4333 orrs r3, r6
|
|
10003b34: 0092 lsls r2, r2, #2
|
|
10003b36: 3502 adds r5, #2
|
|
10003b38: 0bdc lsrs r4, r3, #15
|
|
10003b3a: d102 bne.n 10003b42 <y64_x48+0x40>
|
|
10003b3c: 1892 adds r2, r2, r2
|
|
10003b3e: 415b adcs r3, r3
|
|
10003b40: 3501 adds r5, #1
|
|
10003b42: 001c movs r4, r3
|
|
10003b44: 1897 adds r7, r2, r2
|
|
10003b46: 4164 adcs r4, r4
|
|
10003b48: 3401 adds r4, #1
|
|
10003b4a: 4f46 ldr r7, [pc, #280] @ (10003c64 <y64_x64+0x58>)
|
|
10003b4c: 667c str r4, [r7, #100] @ 0x64
|
|
10003b4e: 4c46 ldr r4, [pc, #280] @ (10003c68 <y64_x64+0x5c>)
|
|
10003b50: 663c str r4, [r7, #96] @ 0x60
|
|
10003b52: 0c0e lsrs r6, r1, #16
|
|
10003b54: e7ff b.n 10003b56 <y64_x48+0x54>
|
|
10003b56: e7ff b.n 10003b58 <y64_x48+0x56>
|
|
10003b58: e7ff b.n 10003b5a <y64_x48+0x58>
|
|
10003b5a: 46c0 nop @ (mov r8, r8)
|
|
10003b5c: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003b5e: 4366 muls r6, r4
|
|
10003b60: 0c36 lsrs r6, r6, #16
|
|
10003b62: 0377 lsls r7, r6, #13
|
|
10003b64: 46be mov lr, r7
|
|
10003b66: b297 uxth r7, r2
|
|
10003b68: 4377 muls r7, r6
|
|
10003b6a: 1bc0 subs r0, r0, r7
|
|
10003b6c: d200 bcs.n 10003b70 <y64_x48+0x6e>
|
|
10003b6e: 3901 subs r1, #1
|
|
10003b70: 1bc0 subs r0, r0, r7
|
|
10003b72: d200 bcs.n 10003b76 <y64_x48+0x74>
|
|
10003b74: 3901 subs r1, #1
|
|
10003b76: b29f uxth r7, r3
|
|
10003b78: 4377 muls r7, r6
|
|
10003b7a: 1bc9 subs r1, r1, r7
|
|
10003b7c: 1bc9 subs r1, r1, r7
|
|
10003b7e: 0c17 lsrs r7, r2, #16
|
|
10003b80: 4377 muls r7, r6
|
|
10003b82: 047e lsls r6, r7, #17
|
|
10003b84: 0bff lsrs r7, r7, #15
|
|
10003b86: 1b80 subs r0, r0, r6
|
|
10003b88: 41b9 sbcs r1, r7
|
|
10003b8a: 08ce lsrs r6, r1, #3
|
|
10003b8c: 4366 muls r6, r4
|
|
10003b8e: 0c36 lsrs r6, r6, #16
|
|
10003b90: 2d0c cmp r5, #12
|
|
10003b92: db33 blt.n 10003bfc <last1>
|
|
10003b94: 44b6 add lr, r6
|
|
10003b96: 0b12 lsrs r2, r2, #12
|
|
10003b98: 051f lsls r7, r3, #20
|
|
10003b9a: 433a orrs r2, r7
|
|
10003b9c: 0b1b lsrs r3, r3, #12
|
|
10003b9e: b297 uxth r7, r2
|
|
10003ba0: 4377 muls r7, r6
|
|
10003ba2: 1bc0 subs r0, r0, r7
|
|
10003ba4: d200 bcs.n 10003ba8 <y64_x48+0xa6>
|
|
10003ba6: 3901 subs r1, #1
|
|
10003ba8: b29f uxth r7, r3
|
|
10003baa: 4377 muls r7, r6
|
|
10003bac: 1bc9 subs r1, r1, r7
|
|
10003bae: 0c17 lsrs r7, r2, #16
|
|
10003bb0: 4377 muls r7, r6
|
|
10003bb2: 043e lsls r6, r7, #16
|
|
10003bb4: 0c3f lsrs r7, r7, #16
|
|
10003bb6: 1b80 subs r0, r0, r6
|
|
10003bb8: 41b9 sbcs r1, r7
|
|
10003bba: 0d86 lsrs r6, r0, #22
|
|
10003bbc: 028f lsls r7, r1, #10
|
|
10003bbe: 433e orrs r6, r7
|
|
10003bc0: 4366 muls r6, r4
|
|
10003bc2: 2729 movs r7, #41 @ 0x29
|
|
10003bc4: 1b7f subs r7, r7, r5
|
|
10003bc6: 40fe lsrs r6, r7
|
|
10003bc8: 3d0c subs r5, #12
|
|
10003bca: 4677 mov r7, lr
|
|
10003bcc: 40af lsls r7, r5
|
|
10003bce: 19bf adds r7, r7, r6
|
|
10003bd0: bc30 pop {r4, r5}
|
|
10003bd2: b2a2 uxth r2, r4
|
|
10003bd4: b2ab uxth r3, r5
|
|
10003bd6: 4372 muls r2, r6
|
|
10003bd8: 4373 muls r3, r6
|
|
10003bda: 1a80 subs r0, r0, r2
|
|
10003bdc: 4199 sbcs r1, r3
|
|
10003bde: 0c22 lsrs r2, r4, #16
|
|
10003be0: 4372 muls r2, r6
|
|
10003be2: 0c13 lsrs r3, r2, #16
|
|
10003be4: 0412 lsls r2, r2, #16
|
|
10003be6: 1a80 subs r0, r0, r2
|
|
10003be8: 4199 sbcs r1, r3
|
|
10003bea: 0002 movs r2, r0
|
|
10003bec: 000b movs r3, r1
|
|
10003bee: 3701 adds r7, #1
|
|
10003bf0: 1b00 subs r0, r0, r4
|
|
10003bf2: 41a9 sbcs r1, r5
|
|
10003bf4: d2f9 bcs.n 10003bea <y64_x48+0xe8>
|
|
10003bf6: 1e78 subs r0, r7, #1
|
|
10003bf8: 2100 movs r1, #0
|
|
10003bfa: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003bfc <last1>:
|
|
10003bfc: 270c movs r7, #12
|
|
10003bfe: 1b7f subs r7, r7, r5
|
|
10003c00: 40fe lsrs r6, r7
|
|
10003c02: 4677 mov r7, lr
|
|
10003c04: 0b7f lsrs r7, r7, #13
|
|
10003c06: 40af lsls r7, r5
|
|
10003c08: 19ff adds r7, r7, r7
|
|
10003c0a: e7e0 b.n 10003bce <y64_x48+0xcc>
|
|
|
|
10003c0c <y64_x64>:
|
|
10003c0c: 2400 movs r4, #0
|
|
10003c0e: 1c5d adds r5, r3, #1
|
|
10003c10: d007 beq.n 10003c22 <y64_x64+0x16>
|
|
10003c12: 4f14 ldr r7, [pc, #80] @ (10003c64 <y64_x64+0x58>)
|
|
10003c14: 667d str r5, [r7, #100] @ 0x64
|
|
10003c16: 6639 str r1, [r7, #96] @ 0x60
|
|
10003c18: e7ff b.n 10003c1a <y64_x64+0xe>
|
|
10003c1a: e7ff b.n 10003c1c <y64_x64+0x10>
|
|
10003c1c: e7ff b.n 10003c1e <y64_x64+0x12>
|
|
10003c1e: e7ff b.n 10003c20 <y64_x64+0x14>
|
|
10003c20: 6f3c ldr r4, [r7, #112] @ 0x70
|
|
10003c22: b295 uxth r5, r2
|
|
10003c24: b29e uxth r6, r3
|
|
10003c26: 4365 muls r5, r4
|
|
10003c28: 4366 muls r6, r4
|
|
10003c2a: 1b40 subs r0, r0, r5
|
|
10003c2c: 41b1 sbcs r1, r6
|
|
10003c2e: 0c15 lsrs r5, r2, #16
|
|
10003c30: 0c1e lsrs r6, r3, #16
|
|
10003c32: 4365 muls r5, r4
|
|
10003c34: 4366 muls r6, r4
|
|
10003c36: 0436 lsls r6, r6, #16
|
|
10003c38: 0c2f lsrs r7, r5, #16
|
|
10003c3a: 433e orrs r6, r7
|
|
10003c3c: 042d lsls r5, r5, #16
|
|
10003c3e: 1b40 subs r0, r0, r5
|
|
10003c40: 41b1 sbcs r1, r6
|
|
10003c42: 4299 cmp r1, r3
|
|
10003c44: d204 bcs.n 10003c50 <y64_x64+0x44>
|
|
10003c46: 0002 movs r2, r0
|
|
10003c48: 000b movs r3, r1
|
|
10003c4a: 0020 movs r0, r4
|
|
10003c4c: 2100 movs r1, #0
|
|
10003c4e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10003c50: d101 bne.n 10003c56 <y64_x64+0x4a>
|
|
10003c52: 4290 cmp r0, r2
|
|
10003c54: d3f7 bcc.n 10003c46 <y64_x64+0x3a>
|
|
10003c56: 1a80 subs r0, r0, r2
|
|
10003c58: 4199 sbcs r1, r3
|
|
10003c5a: 3401 adds r4, #1
|
|
10003c5c: 4299 cmp r1, r3
|
|
10003c5e: d3f2 bcc.n 10003c46 <y64_x64+0x3a>
|
|
10003c60: e7f6 b.n 10003c50 <y64_x64+0x44>
|
|
10003c62: 0000 .short 0x0000
|
|
10003c64: d0000000 .word 0xd0000000
|
|
10003c68: ffffffff .word 0xffffffff
|
|
|
|
10003c6c <__wrap___aeabi_drsub>:
|
|
10003c6c: 4048 eors r0, r1
|
|
10003c6e: 4041 eors r1, r0
|
|
10003c70: 4048 eors r0, r1
|
|
|
|
10003c72 <__wrap___aeabi_dsub>:
|
|
10003c72: b418 push {r3, r4}
|
|
10003c74: 4b13 ldr r3, [pc, #76] @ (10003cc4 <__wrap___aeabi_dmul+0xa>)
|
|
10003c76: 685b ldr r3, [r3, #4]
|
|
10003c78: 9301 str r3, [sp, #4]
|
|
10003c7a: bd08 pop {r3, pc}
|
|
|
|
10003c7c <__wrap___aeabi_dadd>:
|
|
10003c7c: b418 push {r3, r4}
|
|
10003c7e: 4b11 ldr r3, [pc, #68] @ (10003cc4 <__wrap___aeabi_dmul+0xa>)
|
|
10003c80: 681b ldr r3, [r3, #0]
|
|
10003c82: 9301 str r3, [sp, #4]
|
|
10003c84: bd08 pop {r3, pc}
|
|
|
|
10003c86 <__wrap___aeabi_ddiv>:
|
|
10003c86: 4694 mov ip, r2
|
|
10003c88: 4a0f ldr r2, [pc, #60] @ (10003cc8 <__wrap___aeabi_dmul+0xe>)
|
|
10003c8a: 6f92 ldr r2, [r2, #120] @ 0x78
|
|
10003c8c: 0892 lsrs r2, r2, #2
|
|
10003c8e: d205 bcs.n 10003c9c <ddiv_save_state>
|
|
10003c90: 4662 mov r2, ip
|
|
|
|
10003c92 <ddiv_shim_call>:
|
|
10003c92: b418 push {r3, r4}
|
|
10003c94: 4b0b ldr r3, [pc, #44] @ (10003cc4 <__wrap___aeabi_dmul+0xa>)
|
|
10003c96: 68db ldr r3, [r3, #12]
|
|
10003c98: 9301 str r3, [sp, #4]
|
|
10003c9a: bd08 pop {r3, pc}
|
|
|
|
10003c9c <ddiv_save_state>:
|
|
10003c9c: 4a0a ldr r2, [pc, #40] @ (10003cc8 <__wrap___aeabi_dmul+0xe>)
|
|
10003c9e: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003ca0: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003ca2: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003ca4: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003ca6: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003ca8: 4662 mov r2, ip
|
|
10003caa: f7ff fff2 bl 10003c92 <ddiv_shim_call>
|
|
10003cae: 4a06 ldr r2, [pc, #24] @ (10003cc8 <__wrap___aeabi_dmul+0xe>)
|
|
10003cb0: 6614 str r4, [r2, #96] @ 0x60
|
|
10003cb2: 6655 str r5, [r2, #100] @ 0x64
|
|
10003cb4: 6757 str r7, [r2, #116] @ 0x74
|
|
10003cb6: 6716 str r6, [r2, #112] @ 0x70
|
|
10003cb8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003cba <__wrap___aeabi_dmul>:
|
|
10003cba: b418 push {r3, r4}
|
|
10003cbc: 4b01 ldr r3, [pc, #4] @ (10003cc4 <__wrap___aeabi_dmul+0xa>)
|
|
10003cbe: 689b ldr r3, [r3, #8]
|
|
10003cc0: 9301 str r3, [sp, #4]
|
|
10003cc2: bd08 pop {r3, pc}
|
|
10003cc4: 200019dc .word 0x200019dc
|
|
10003cc8: d0000000 .word 0xd0000000
|
|
|
|
10003ccc <__wrap___aeabi_cdrcmple>:
|
|
10003ccc: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
10003cce: 4050 eors r0, r2
|
|
10003cd0: 4042 eors r2, r0
|
|
10003cd2: 4050 eors r0, r2
|
|
10003cd4: 4059 eors r1, r3
|
|
10003cd6: 404b eors r3, r1
|
|
10003cd8: 4059 eors r1, r3
|
|
10003cda: e000 b.n 10003cde <__aeabi_dfcmple_guts>
|
|
|
|
10003cdc <__wrap___aeabi_cdcmpeq>:
|
|
10003cdc: b5ff push {r0, r1, r2, r3, r4, r5, r6, r7, lr}
|
|
|
|
10003cde <__aeabi_dfcmple_guts>:
|
|
10003cde: 4f15 ldr r7, [pc, #84] @ (10003d34 <__aeabi_dfcmple_guts+0x56>)
|
|
10003ce0: 004c lsls r4, r1, #1
|
|
10003ce2: 0d64 lsrs r4, r4, #21
|
|
10003ce4: d003 beq.n 10003cee <__aeabi_dfcmple_guts+0x10>
|
|
10003ce6: 42bc cmp r4, r7
|
|
10003ce8: d104 bne.n 10003cf4 <__aeabi_dfcmple_guts+0x16>
|
|
10003cea: 030c lsls r4, r1, #12
|
|
10003cec: d814 bhi.n 10003d18 <__aeabi_dfcmple_guts+0x3a>
|
|
10003cee: 2000 movs r0, #0
|
|
10003cf0: 0d09 lsrs r1, r1, #20
|
|
10003cf2: 0509 lsls r1, r1, #20
|
|
10003cf4: 005c lsls r4, r3, #1
|
|
10003cf6: 0d64 lsrs r4, r4, #21
|
|
10003cf8: d003 beq.n 10003d02 <__aeabi_dfcmple_guts+0x24>
|
|
10003cfa: 42bc cmp r4, r7
|
|
10003cfc: d104 bne.n 10003d08 <__aeabi_dfcmple_guts+0x2a>
|
|
10003cfe: 031c lsls r4, r3, #12
|
|
10003d00: d80a bhi.n 10003d18 <__aeabi_dfcmple_guts+0x3a>
|
|
10003d02: 2200 movs r2, #0
|
|
10003d04: 0d1b lsrs r3, r3, #20
|
|
10003d06: 051b lsls r3, r3, #20
|
|
10003d08: 2601 movs r6, #1
|
|
10003d0a: 404b eors r3, r1
|
|
10003d0c: d409 bmi.n 10003d22 <__aeabi_dfcmple_guts+0x44>
|
|
10003d0e: 404b eors r3, r1
|
|
10003d10: d503 bpl.n 10003d1a <__aeabi_dfcmple_guts+0x3c>
|
|
10003d12: 428b cmp r3, r1
|
|
10003d14: d100 bne.n 10003d18 <__aeabi_dfcmple_guts+0x3a>
|
|
10003d16: 4282 cmp r2, r0
|
|
10003d18: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003d1a: 4299 cmp r1, r3
|
|
10003d1c: d1fc bne.n 10003d18 <__aeabi_dfcmple_guts+0x3a>
|
|
10003d1e: 4290 cmp r0, r2
|
|
10003d20: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003d22: 430b orrs r3, r1
|
|
10003d24: 18db adds r3, r3, r3
|
|
10003d26: 4303 orrs r3, r0
|
|
10003d28: 4313 orrs r3, r2
|
|
10003d2a: d0f5 beq.n 10003d18 <__aeabi_dfcmple_guts+0x3a>
|
|
10003d2c: 43c9 mvns r1, r1
|
|
10003d2e: 1849 adds r1, r1, r1
|
|
10003d30: bdff pop {r0, r1, r2, r3, r4, r5, r6, r7, pc}
|
|
10003d32: 0000 .short 0x0000
|
|
10003d34: 000007ff .word 0x000007ff
|
|
|
|
10003d38 <__wrap___aeabi_dcmplt>:
|
|
10003d38: b500 push {lr}
|
|
10003d3a: f7ff ffcf bl 10003cdc <__wrap___aeabi_cdcmpeq>
|
|
10003d3e: 4180 sbcs r0, r0
|
|
10003d40: bd00 pop {pc}
|
|
10003d42: 46c0 nop @ (mov r8, r8)
|
|
|
|
10003d44 <__wrap___aeabi_dcmple>:
|
|
10003d44: b500 push {lr}
|
|
10003d46: f7ff ffc9 bl 10003cdc <__wrap___aeabi_cdcmpeq>
|
|
10003d4a: d901 bls.n 10003d50 <__wrap___aeabi_dcmple+0xc>
|
|
10003d4c: 2000 movs r0, #0
|
|
10003d4e: bd00 pop {pc}
|
|
10003d50: 2001 movs r0, #1
|
|
10003d52: bd00 pop {pc}
|
|
|
|
10003d54 <__wrap___aeabi_dcmpge>:
|
|
10003d54: b500 push {lr}
|
|
10003d56: f7ff ffb9 bl 10003ccc <__wrap___aeabi_cdrcmple>
|
|
10003d5a: d901 bls.n 10003d60 <__wrap___aeabi_dcmpge+0xc>
|
|
10003d5c: 2000 movs r0, #0
|
|
10003d5e: bd00 pop {pc}
|
|
10003d60: 2001 movs r0, #1
|
|
10003d62: bd00 pop {pc}
|
|
|
|
10003d64 <__wrap___aeabi_dcmpgt>:
|
|
10003d64: b500 push {lr}
|
|
10003d66: f7ff ffb1 bl 10003ccc <__wrap___aeabi_cdrcmple>
|
|
10003d6a: 4180 sbcs r0, r0
|
|
10003d6c: bd00 pop {pc}
|
|
|
|
10003d6e <__wrap___aeabi_dcmpun>:
|
|
10003d6e: 2001 movs r0, #1
|
|
10003d70: 0540 lsls r0, r0, #21
|
|
10003d72: 004a lsls r2, r1, #1
|
|
10003d74: 1812 adds r2, r2, r0
|
|
10003d76: d804 bhi.n 10003d82 <__wrap___aeabi_dcmpun+0x14>
|
|
10003d78: 005a lsls r2, r3, #1
|
|
10003d7a: 1812 adds r2, r2, r0
|
|
10003d7c: d801 bhi.n 10003d82 <__wrap___aeabi_dcmpun+0x14>
|
|
10003d7e: 2000 movs r0, #0
|
|
10003d80: 4770 bx lr
|
|
10003d82: 2001 movs r0, #1
|
|
10003d84: 4770 bx lr
|
|
10003d86: 2000 movs r0, #0
|
|
10003d88: 4770 bx lr
|
|
...
|
|
|
|
10003d8c <__wrap___aeabi_ui2d>:
|
|
10003d8c: 2100 movs r1, #0
|
|
10003d8e: 2800 cmp r0, #0
|
|
10003d90: d105 bne.n 10003d9e <__wrap___aeabi_i2d+0xa>
|
|
10003d92: 4770 bx lr
|
|
|
|
10003d94 <__wrap___aeabi_i2d>:
|
|
10003d94: 17c1 asrs r1, r0, #31
|
|
10003d96: 4048 eors r0, r1
|
|
10003d98: 1a40 subs r0, r0, r1
|
|
10003d9a: d0fa beq.n 10003d92 <__wrap___aeabi_ui2d+0x6>
|
|
10003d9c: 07c9 lsls r1, r1, #31
|
|
10003d9e: b513 push {r0, r1, r4, lr}
|
|
10003da0: 4b06 ldr r3, [pc, #24] @ (10003dbc <__wrap___aeabi_i2d+0x28>)
|
|
10003da2: 681b ldr r3, [r3, #0]
|
|
10003da4: 4798 blx r3
|
|
10003da6: bc0c pop {r2, r3}
|
|
10003da8: 1c44 adds r4, r0, #1
|
|
10003daa: 40a2 lsls r2, r4
|
|
10003dac: 0510 lsls r0, r2, #20
|
|
10003dae: 0b12 lsrs r2, r2, #12
|
|
10003db0: 4903 ldr r1, [pc, #12] @ (10003dc0 <__wrap___aeabi_i2d+0x2c>)
|
|
10003db2: 1b09 subs r1, r1, r4
|
|
10003db4: 0509 lsls r1, r1, #20
|
|
10003db6: 4319 orrs r1, r3
|
|
10003db8: 4311 orrs r1, r2
|
|
10003dba: bd10 pop {r4, pc}
|
|
10003dbc: 20001adc .word 0x20001adc
|
|
10003dc0: 0000041f .word 0x0000041f
|
|
|
|
10003dc4 <__wrap___aeabi_d2iz>:
|
|
10003dc4: b510 push {r4, lr}
|
|
10003dc6: 004c lsls r4, r1, #1
|
|
10003dc8: 0d62 lsrs r2, r4, #21
|
|
10003dca: 2380 movs r3, #128 @ 0x80
|
|
10003dcc: 18d2 adds r2, r2, r3
|
|
10003dce: 00db lsls r3, r3, #3
|
|
10003dd0: 1ad2 subs r2, r2, r3
|
|
10003dd2: 055b lsls r3, r3, #21
|
|
10003dd4: 2a7e cmp r2, #126 @ 0x7e
|
|
10003dd6: dd10 ble.n 10003dfa <__wrap___aeabi_d2iz+0x36>
|
|
10003dd8: 3a9e subs r2, #158 @ 0x9e
|
|
10003dda: da13 bge.n 10003e04 <__wrap___aeabi_d2iz+0x40>
|
|
10003ddc: 17cc asrs r4, r1, #31
|
|
10003dde: 0309 lsls r1, r1, #12
|
|
10003de0: 0849 lsrs r1, r1, #1
|
|
10003de2: 4319 orrs r1, r3
|
|
10003de4: 4252 negs r2, r2
|
|
10003de6: 40d1 lsrs r1, r2
|
|
10003de8: 0064 lsls r4, r4, #1
|
|
10003dea: 3401 adds r4, #1
|
|
10003dec: 3215 adds r2, #21
|
|
10003dee: 2a20 cmp r2, #32
|
|
10003df0: da05 bge.n 10003dfe <__wrap___aeabi_d2iz+0x3a>
|
|
10003df2: 40d0 lsrs r0, r2
|
|
10003df4: 4308 orrs r0, r1
|
|
10003df6: 4360 muls r0, r4
|
|
10003df8: bd10 pop {r4, pc}
|
|
10003dfa: 2000 movs r0, #0
|
|
10003dfc: bd10 pop {r4, pc}
|
|
10003dfe: 4608 mov r0, r1
|
|
10003e00: 4360 muls r0, r4
|
|
10003e02: bd10 pop {r4, pc}
|
|
10003e04: 0fc8 lsrs r0, r1, #31
|
|
10003e06: 18c0 adds r0, r0, r3
|
|
10003e08: 3801 subs r0, #1
|
|
10003e0a: bd10 pop {r4, pc}
|
|
|
|
10003e0c <__wrap___aeabi_d2uiz>:
|
|
10003e0c: b418 push {r3, r4}
|
|
10003e0e: 4b02 ldr r3, [pc, #8] @ (10003e18 <__wrap___aeabi_d2uiz+0xc>)
|
|
10003e10: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10003e12: 9301 str r3, [sp, #4]
|
|
10003e14: bd08 pop {r3, pc}
|
|
10003e16: 0000 .short 0x0000
|
|
10003e18: 200019dc .word 0x200019dc
|
|
|
|
10003e1c <missing_double_func_shim>:
|
|
10003e1c: b510 push {r4, lr}
|
|
10003e1e: 4801 ldr r0, [pc, #4] @ (10003e24 <missing_double_func_shim+0x8>)
|
|
10003e20: f7fe fbc8 bl 100025b4 <panic>
|
|
10003e24: 1000a210 .word 0x1000a210
|
|
|
|
10003e28 <__aeabi_double_init>:
|
|
10003e28: b570 push {r4, r5, r6, lr}
|
|
10003e2a: 2313 movs r3, #19
|
|
10003e2c: 781c ldrb r4, [r3, #0]
|
|
10003e2e: 2c01 cmp r4, #1
|
|
10003e30: d012 beq.n 10003e58 <__aeabi_double_init+0x30>
|
|
10003e32: 2c01 cmp r4, #1
|
|
10003e34: dc12 bgt.n 10003e5c <__aeabi_double_init+0x34>
|
|
10003e36: 4b21 ldr r3, [pc, #132] @ (10003ebc <__aeabi_double_init+0x94>)
|
|
10003e38: 4a21 ldr r2, [pc, #132] @ (10003ec0 <__aeabi_double_init+0x98>)
|
|
10003e3a: 6493 str r3, [r2, #72] @ 0x48
|
|
10003e3c: 4821 ldr r0, [pc, #132] @ (10003ec4 <__aeabi_double_init+0x9c>)
|
|
10003e3e: f7fc fcc5 bl 100007cc <rom_func_lookup>
|
|
10003e42: 4b21 ldr r3, [pc, #132] @ (10003ec8 <__aeabi_double_init+0xa0>)
|
|
10003e44: 6018 str r0, [r3, #0]
|
|
10003e46: bd70 pop {r4, r5, r6, pc}
|
|
10003e48: 4920 ldr r1, [pc, #128] @ (10003ecc <__aeabi_double_init+0xa4>)
|
|
10003e4a: 4a1d ldr r2, [pc, #116] @ (10003ec0 <__aeabi_double_init+0x98>)
|
|
10003e4c: 0098 lsls r0, r3, #2
|
|
10003e4e: 5081 str r1, [r0, r2]
|
|
10003e50: 3301 adds r3, #1
|
|
10003e52: 2b1f cmp r3, #31
|
|
10003e54: d9f8 bls.n 10003e48 <__aeabi_double_init+0x20>
|
|
10003e56: e7ec b.n 10003e32 <__aeabi_double_init+0xa>
|
|
10003e58: 2300 movs r3, #0
|
|
10003e5a: e7fa b.n 10003e52 <__aeabi_double_init+0x2a>
|
|
10003e5c: 481c ldr r0, [pc, #112] @ (10003ed0 <__aeabi_double_init+0xa8>)
|
|
10003e5e: f7fc fcbd bl 100007dc <rom_data_lookup>
|
|
10003e62: 0005 movs r5, r0
|
|
10003e64: 481b ldr r0, [pc, #108] @ (10003ed4 <__aeabi_double_init+0xac>)
|
|
10003e66: f7fc fcb9 bl 100007dc <rom_data_lookup>
|
|
10003e6a: 3802 subs r0, #2
|
|
10003e6c: 7803 ldrb r3, [r0, #0]
|
|
10003e6e: 009b lsls r3, r3, #2
|
|
10003e70: 2b7f cmp r3, #127 @ 0x7f
|
|
10003e72: dd09 ble.n 10003e88 <__aeabi_double_init+0x60>
|
|
10003e74: 4812 ldr r0, [pc, #72] @ (10003ec0 <__aeabi_double_init+0x98>)
|
|
10003e76: 2280 movs r2, #128 @ 0x80
|
|
10003e78: 0029 movs r1, r5
|
|
10003e7a: f000 f94f bl 1000411c <__wrap___aeabi_memcpy>
|
|
10003e7e: 2c02 cmp r4, #2
|
|
10003e80: d008 beq.n 10003e94 <__aeabi_double_init+0x6c>
|
|
10003e82: 2c02 cmp r4, #2
|
|
10003e84: dcda bgt.n 10003e3c <__aeabi_double_init+0x14>
|
|
10003e86: e7d6 b.n 10003e36 <__aeabi_double_init+0xe>
|
|
10003e88: 4b13 ldr r3, [pc, #76] @ (10003ed8 <__aeabi_double_init+0xb0>)
|
|
10003e8a: 4a14 ldr r2, [pc, #80] @ (10003edc <__aeabi_double_init+0xb4>)
|
|
10003e8c: 4814 ldr r0, [pc, #80] @ (10003ee0 <__aeabi_double_init+0xb8>)
|
|
10003e8e: 2132 movs r1, #50 @ 0x32
|
|
10003e90: f7fe faf8 bl 10002484 <__assert_func>
|
|
10003e94: 4b13 ldr r3, [pc, #76] @ (10003ee4 <__aeabi_double_init+0xbc>)
|
|
10003e96: 881a ldrh r2, [r3, #0]
|
|
10003e98: 23b5 movs r3, #181 @ 0xb5
|
|
10003e9a: 021b lsls r3, r3, #8
|
|
10003e9c: 429a cmp r2, r3
|
|
10003e9e: d109 bne.n 10003eb4 <__aeabi_double_init+0x8c>
|
|
10003ea0: 4b11 ldr r3, [pc, #68] @ (10003ee8 <__aeabi_double_init+0xc0>)
|
|
10003ea2: 881a ldrh r2, [r3, #0]
|
|
10003ea4: 4b11 ldr r3, [pc, #68] @ (10003eec <__aeabi_double_init+0xc4>)
|
|
10003ea6: 429a cmp r2, r3
|
|
10003ea8: d104 bne.n 10003eb4 <__aeabi_double_init+0x8c>
|
|
10003eaa: 4b11 ldr r3, [pc, #68] @ (10003ef0 <__aeabi_double_init+0xc8>)
|
|
10003eac: 881a ldrh r2, [r3, #0]
|
|
10003eae: 4b11 ldr r3, [pc, #68] @ (10003ef4 <__aeabi_double_init+0xcc>)
|
|
10003eb0: 429a cmp r2, r3
|
|
10003eb2: d0e6 beq.n 10003e82 <__aeabi_double_init+0x5a>
|
|
10003eb4: 2000 movs r0, #0
|
|
10003eb6: f7fe fb7d bl 100025b4 <panic>
|
|
10003eba: 46c0 nop @ (mov r8, r8)
|
|
10003ebc: 10003ef9 .word 0x10003ef9
|
|
10003ec0: 200019dc .word 0x200019dc
|
|
10003ec4: 0000334c .word 0x0000334c
|
|
10003ec8: 20001adc .word 0x20001adc
|
|
10003ecc: 10003e1d .word 0x10003e1d
|
|
10003ed0: 00004453 .word 0x00004453
|
|
10003ed4: 00004653 .word 0x00004653
|
|
10003ed8: 1000a228 .word 0x1000a228
|
|
10003edc: 1000a2c4 .word 0x1000a2c4
|
|
10003ee0: 1000a27c .word 0x1000a27c
|
|
10003ee4: 00003854 .word 0x00003854
|
|
10003ee8: 000038d8 .word 0x000038d8
|
|
10003eec: 00004649 .word 0x00004649
|
|
10003ef0: 0000389c .word 0x0000389c
|
|
10003ef4: 00004659 .word 0x00004659
|
|
|
|
10003ef8 <double_table_shim_on_use_helper>:
|
|
10003ef8: b507 push {r0, r1, r2, lr}
|
|
10003efa: 4660 mov r0, ip
|
|
10003efc: 2800 cmp r0, #0
|
|
10003efe: d100 bne.n 10003f02 <double_table_shim_on_use_helper+0xa>
|
|
10003f00: be00 bkpt 0x0000
|
|
10003f02: 8801 ldrh r1, [r0, #0]
|
|
10003f04: 0a0a lsrs r2, r1, #8
|
|
10003f06: 3002 adds r0, #2
|
|
10003f08: 2adf cmp r2, #223 @ 0xdf
|
|
10003f0a: d1fa bne.n 10003f02 <double_table_shim_on_use_helper+0xa>
|
|
10003f0c: b2c9 uxtb r1, r1
|
|
10003f0e: 0882 lsrs r2, r0, #2
|
|
10003f10: d304 bcc.n 10003f1c <double_table_shim_on_use_helper+0x24>
|
|
10003f12: 8802 ldrh r2, [r0, #0]
|
|
10003f14: 8840 ldrh r0, [r0, #2]
|
|
10003f16: 0400 lsls r0, r0, #16
|
|
10003f18: 4310 orrs r0, r2
|
|
10003f1a: e000 b.n 10003f1e <double_table_shim_on_use_helper+0x26>
|
|
10003f1c: 6800 ldr r0, [r0, #0]
|
|
10003f1e: 4a02 ldr r2, [pc, #8] @ (10003f28 <double_table_shim_on_use_helper+0x30>)
|
|
10003f20: 5050 str r0, [r2, r1]
|
|
10003f22: 9003 str r0, [sp, #12]
|
|
10003f24: bd07 pop {r0, r1, r2, pc}
|
|
10003f26: 0000 .short 0x0000
|
|
10003f28: 200019dc .word 0x200019dc
|
|
|
|
10003f2c <__wrap___aeabi_lmul>:
|
|
10003f2c: 4351 muls r1, r2
|
|
10003f2e: 4343 muls r3, r0
|
|
10003f30: 18c9 adds r1, r1, r3
|
|
10003f32: 468c mov ip, r1
|
|
10003f34: 0c11 lsrs r1, r2, #16
|
|
10003f36: b283 uxth r3, r0
|
|
10003f38: 434b muls r3, r1
|
|
10003f3a: b410 push {r4}
|
|
10003f3c: 0c04 lsrs r4, r0, #16
|
|
10003f3e: 4361 muls r1, r4
|
|
10003f40: b292 uxth r2, r2
|
|
10003f42: b280 uxth r0, r0
|
|
10003f44: 4350 muls r0, r2
|
|
10003f46: 4362 muls r2, r4
|
|
10003f48: 041c lsls r4, r3, #16
|
|
10003f4a: 0c1b lsrs r3, r3, #16
|
|
10003f4c: 1900 adds r0, r0, r4
|
|
10003f4e: bc10 pop {r4}
|
|
10003f50: 4159 adcs r1, r3
|
|
10003f52: 0413 lsls r3, r2, #16
|
|
10003f54: 0c12 lsrs r2, r2, #16
|
|
10003f56: 18c0 adds r0, r0, r3
|
|
10003f58: 4151 adcs r1, r2
|
|
10003f5a: 4461 add r1, ip
|
|
10003f5c: 4770 bx lr
|
|
...
|
|
|
|
10003f60 <__wrap___aeabi_frsub>:
|
|
10003f60: 4048 eors r0, r1
|
|
10003f62: 4041 eors r1, r0
|
|
10003f64: 4048 eors r0, r1
|
|
|
|
10003f66 <__wrap___aeabi_fsub>:
|
|
10003f66: 4b0e ldr r3, [pc, #56] @ (10003fa0 <__wrap___aeabi_fmul+0x6>)
|
|
10003f68: 685b ldr r3, [r3, #4]
|
|
10003f6a: 4718 bx r3
|
|
|
|
10003f6c <__wrap___aeabi_fadd>:
|
|
10003f6c: 4b0c ldr r3, [pc, #48] @ (10003fa0 <__wrap___aeabi_fmul+0x6>)
|
|
10003f6e: 681b ldr r3, [r3, #0]
|
|
10003f70: 4718 bx r3
|
|
|
|
10003f72 <__wrap___aeabi_fdiv>:
|
|
10003f72: 4a0c ldr r2, [pc, #48] @ (10003fa4 <__wrap___aeabi_fmul+0xa>)
|
|
10003f74: 6f93 ldr r3, [r2, #120] @ 0x78
|
|
10003f76: 089b lsrs r3, r3, #2
|
|
10003f78: d202 bcs.n 10003f80 <fdiv_save_state>
|
|
|
|
10003f7a <fdiv_shim_call>:
|
|
10003f7a: 4b09 ldr r3, [pc, #36] @ (10003fa0 <__wrap___aeabi_fmul+0x6>)
|
|
10003f7c: 68db ldr r3, [r3, #12]
|
|
10003f7e: 4718 bx r3
|
|
|
|
10003f80 <fdiv_save_state>:
|
|
10003f80: b5f0 push {r4, r5, r6, r7, lr}
|
|
10003f82: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10003f84: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10003f86: 6f57 ldr r7, [r2, #116] @ 0x74
|
|
10003f88: 6f16 ldr r6, [r2, #112] @ 0x70
|
|
10003f8a: f7ff fff6 bl 10003f7a <fdiv_shim_call>
|
|
10003f8e: 4a05 ldr r2, [pc, #20] @ (10003fa4 <__wrap___aeabi_fmul+0xa>)
|
|
10003f90: 6614 str r4, [r2, #96] @ 0x60
|
|
10003f92: 6655 str r5, [r2, #100] @ 0x64
|
|
10003f94: 6757 str r7, [r2, #116] @ 0x74
|
|
10003f96: 6716 str r6, [r2, #112] @ 0x70
|
|
10003f98: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10003f9a <__wrap___aeabi_fmul>:
|
|
10003f9a: 4b01 ldr r3, [pc, #4] @ (10003fa0 <__wrap___aeabi_fmul+0x6>)
|
|
10003f9c: 689b ldr r3, [r3, #8]
|
|
10003f9e: 4718 bx r3
|
|
10003fa0: 20001ae0 .word 0x20001ae0
|
|
10003fa4: d0000000 .word 0xd0000000
|
|
|
|
10003fa8 <__wrap___aeabi_ui2f>:
|
|
10003fa8: 1a49 subs r1, r1, r1
|
|
10003faa: 2800 cmp r0, #0
|
|
10003fac: d108 bne.n 10003fc0 <__aeabi_i2f_main>
|
|
10003fae: 4608 mov r0, r1
|
|
10003fb0: 4770 bx lr
|
|
...
|
|
|
|
10003fb4 <__wrap___aeabi_i2f>:
|
|
10003fb4: 0fc1 lsrs r1, r0, #31
|
|
10003fb6: 07c9 lsls r1, r1, #31
|
|
10003fb8: d500 bpl.n 10003fbc <__wrap___aeabi_i2f+0x8>
|
|
10003fba: 4240 negs r0, r0
|
|
10003fbc: 2800 cmp r0, #0
|
|
10003fbe: d017 beq.n 10003ff0 <__aeabi_i2f_main+0x30>
|
|
|
|
10003fc0 <__aeabi_i2f_main>:
|
|
10003fc0: 46f4 mov ip, lr
|
|
10003fc2: b403 push {r0, r1}
|
|
10003fc4: 4b0b ldr r3, [pc, #44] @ (10003ff4 <__aeabi_i2f_main+0x34>)
|
|
10003fc6: 681b ldr r3, [r3, #0]
|
|
10003fc8: 4798 blx r3
|
|
10003fca: bc06 pop {r1, r2}
|
|
10003fcc: 4081 lsls r1, r0
|
|
10003fce: 389e subs r0, #158 @ 0x9e
|
|
10003fd0: 4240 negs r0, r0
|
|
10003fd2: 3180 adds r1, #128 @ 0x80
|
|
10003fd4: d207 bcs.n 10003fe6 <__aeabi_i2f_main+0x26>
|
|
10003fd6: 060b lsls r3, r1, #24
|
|
10003fd8: d007 beq.n 10003fea <__aeabi_i2f_main+0x2a>
|
|
10003fda: 0049 lsls r1, r1, #1
|
|
10003fdc: 0a49 lsrs r1, r1, #9
|
|
10003fde: 05c0 lsls r0, r0, #23
|
|
10003fe0: 4310 orrs r0, r2
|
|
10003fe2: 4308 orrs r0, r1
|
|
10003fe4: 4760 bx ip
|
|
10003fe6: 3001 adds r0, #1
|
|
10003fe8: e7f8 b.n 10003fdc <__aeabi_i2f_main+0x1c>
|
|
10003fea: 0a49 lsrs r1, r1, #9
|
|
10003fec: 0289 lsls r1, r1, #10
|
|
10003fee: e7f5 b.n 10003fdc <__aeabi_i2f_main+0x1c>
|
|
10003ff0: 4770 bx lr
|
|
10003ff2: 0000 .short 0x0000
|
|
10003ff4: 20001adc .word 0x20001adc
|
|
|
|
10003ff8 <__wrap___aeabi_f2iz>:
|
|
10003ff8: 0041 lsls r1, r0, #1
|
|
10003ffa: 0e0a lsrs r2, r1, #24
|
|
10003ffc: 2380 movs r3, #128 @ 0x80
|
|
10003ffe: 061b lsls r3, r3, #24
|
|
10004000: 2a7e cmp r2, #126 @ 0x7e
|
|
10004002: dd0b ble.n 1000401c <__wrap___aeabi_f2iz+0x24>
|
|
10004004: 3a9e subs r2, #158 @ 0x9e
|
|
10004006: da0b bge.n 10004020 <__wrap___aeabi_f2iz+0x28>
|
|
10004008: 17c1 asrs r1, r0, #31
|
|
1000400a: 0240 lsls r0, r0, #9
|
|
1000400c: 0840 lsrs r0, r0, #1
|
|
1000400e: 4318 orrs r0, r3
|
|
10004010: 4252 negs r2, r2
|
|
10004012: 40d0 lsrs r0, r2
|
|
10004014: 0049 lsls r1, r1, #1
|
|
10004016: 3101 adds r1, #1
|
|
10004018: 4348 muls r0, r1
|
|
1000401a: 4770 bx lr
|
|
1000401c: 2000 movs r0, #0
|
|
1000401e: 4770 bx lr
|
|
10004020: 0fc0 lsrs r0, r0, #31
|
|
10004022: 18c0 adds r0, r0, r3
|
|
10004024: 3801 subs r0, #1
|
|
10004026: 4770 bx lr
|
|
10004028: 42c0 cmn r0, r0
|
|
1000402a: d30d bcc.n 10004048 <float2int>
|
|
1000402c: b500 push {lr}
|
|
1000402e: 0040 lsls r0, r0, #1
|
|
10004030: 0840 lsrs r0, r0, #1
|
|
10004032: 2100 movs r1, #0
|
|
10004034: f000 f80e bl 10004054 <__wrap___aeabi_f2uiz>
|
|
10004038: 2800 cmp r0, #0
|
|
1000403a: d401 bmi.n 10004040 <__wrap___aeabi_f2iz+0x48>
|
|
1000403c: 4240 negs r0, r0
|
|
1000403e: bd00 pop {pc}
|
|
10004040: 2080 movs r0, #128 @ 0x80
|
|
10004042: 0600 lsls r0, r0, #24
|
|
10004044: bd00 pop {pc}
|
|
...
|
|
|
|
10004048 <float2int>:
|
|
10004048: 4b01 ldr r3, [pc, #4] @ (10004050 <float2int+0x8>)
|
|
1000404a: 69db ldr r3, [r3, #28]
|
|
1000404c: 4718 bx r3
|
|
1000404e: 0000 .short 0x0000
|
|
10004050: 20001ae0 .word 0x20001ae0
|
|
|
|
10004054 <__wrap___aeabi_f2uiz>:
|
|
10004054: 4b01 ldr r3, [pc, #4] @ (1000405c <__wrap___aeabi_f2uiz+0x8>)
|
|
10004056: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10004058: 4718 bx r3
|
|
1000405a: 0000 .short 0x0000
|
|
1000405c: 20001ae0 .word 0x20001ae0
|
|
|
|
10004060 <__wrap___aeabi_f2d>:
|
|
10004060: 4b01 ldr r3, [pc, #4] @ (10004068 <__wrap___aeabi_f2d+0x8>)
|
|
10004062: 6fdb ldr r3, [r3, #124] @ 0x7c
|
|
10004064: 4718 bx r3
|
|
10004066: 0000 .short 0x0000
|
|
10004068: 20001ae0 .word 0x20001ae0
|
|
|
|
1000406c <missing_float_func_shim>:
|
|
1000406c: b510 push {r4, lr}
|
|
1000406e: 4801 ldr r0, [pc, #4] @ (10004074 <missing_float_func_shim+0x8>)
|
|
10004070: f7fe faa0 bl 100025b4 <panic>
|
|
10004074: 10009f40 .word 0x10009f40
|
|
|
|
10004078 <__aeabi_float_init>:
|
|
10004078: b570 push {r4, r5, r6, lr}
|
|
1000407a: 2313 movs r3, #19
|
|
1000407c: 781e ldrb r6, [r3, #0]
|
|
1000407e: 4818 ldr r0, [pc, #96] @ (100040e0 <__aeabi_float_init+0x68>)
|
|
10004080: f7fc fbac bl 100007dc <rom_data_lookup>
|
|
10004084: 0005 movs r5, r0
|
|
10004086: 2e01 cmp r6, #1
|
|
10004088: d011 beq.n 100040ae <__aeabi_float_init+0x36>
|
|
1000408a: 2e01 cmp r6, #1
|
|
1000408c: dd09 ble.n 100040a2 <__aeabi_float_init+0x2a>
|
|
1000408e: 1eab subs r3, r5, #2
|
|
10004090: 781b ldrb r3, [r3, #0]
|
|
10004092: 009b lsls r3, r3, #2
|
|
10004094: 2b7f cmp r3, #127 @ 0x7f
|
|
10004096: dd1d ble.n 100040d4 <__aeabi_float_init+0x5c>
|
|
10004098: 4812 ldr r0, [pc, #72] @ (100040e4 <__aeabi_float_init+0x6c>)
|
|
1000409a: 2280 movs r2, #128 @ 0x80
|
|
1000409c: 0029 movs r1, r5
|
|
1000409e: f000 f83d bl 1000411c <__wrap___aeabi_memcpy>
|
|
100040a2: 4811 ldr r0, [pc, #68] @ (100040e8 <__aeabi_float_init+0x70>)
|
|
100040a4: f7fc fb92 bl 100007cc <rom_func_lookup>
|
|
100040a8: 4b10 ldr r3, [pc, #64] @ (100040ec <__aeabi_float_init+0x74>)
|
|
100040aa: 6018 str r0, [r3, #0]
|
|
100040ac: bd70 pop {r4, r5, r6, pc}
|
|
100040ae: 480d ldr r0, [pc, #52] @ (100040e4 <__aeabi_float_init+0x6c>)
|
|
100040b0: 2254 movs r2, #84 @ 0x54
|
|
100040b2: 0029 movs r1, r5
|
|
100040b4: f000 f832 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100040b8: 2300 movs r3, #0
|
|
100040ba: e000 b.n 100040be <__aeabi_float_init+0x46>
|
|
100040bc: 3301 adds r3, #1
|
|
100040be: 2b1f cmp r3, #31
|
|
100040c0: d8e3 bhi.n 1000408a <__aeabi_float_init+0x12>
|
|
100040c2: 4a08 ldr r2, [pc, #32] @ (100040e4 <__aeabi_float_init+0x6c>)
|
|
100040c4: 009c lsls r4, r3, #2
|
|
100040c6: 58a2 ldr r2, [r4, r2]
|
|
100040c8: 2a00 cmp r2, #0
|
|
100040ca: d1f7 bne.n 100040bc <__aeabi_float_init+0x44>
|
|
100040cc: 4908 ldr r1, [pc, #32] @ (100040f0 <__aeabi_float_init+0x78>)
|
|
100040ce: 4a05 ldr r2, [pc, #20] @ (100040e4 <__aeabi_float_init+0x6c>)
|
|
100040d0: 50a1 str r1, [r4, r2]
|
|
100040d2: e7f3 b.n 100040bc <__aeabi_float_init+0x44>
|
|
100040d4: 4b07 ldr r3, [pc, #28] @ (100040f4 <__aeabi_float_init+0x7c>)
|
|
100040d6: 4a08 ldr r2, [pc, #32] @ (100040f8 <__aeabi_float_init+0x80>)
|
|
100040d8: 4808 ldr r0, [pc, #32] @ (100040fc <__aeabi_float_init+0x84>)
|
|
100040da: 2142 movs r1, #66 @ 0x42
|
|
100040dc: f7fe f9d2 bl 10002484 <__assert_func>
|
|
100040e0: 00004653 .word 0x00004653
|
|
100040e4: 20001ae0 .word 0x20001ae0
|
|
100040e8: 0000334c .word 0x0000334c
|
|
100040ec: 20001adc .word 0x20001adc
|
|
100040f0: 1000406d .word 0x1000406d
|
|
100040f4: 1000a2d8 .word 0x1000a2d8
|
|
100040f8: 1000a350 .word 0x1000a350
|
|
100040fc: 1000a30c .word 0x1000a30c
|
|
|
|
10004100 <__aeabi_mem_init>:
|
|
10004100: 4801 ldr r0, [pc, #4] @ (10004108 <__aeabi_mem_init+0x8>)
|
|
10004102: 2104 movs r1, #4
|
|
10004104: 4b01 ldr r3, [pc, #4] @ (1000410c <__aeabi_mem_init+0xc>)
|
|
10004106: 4718 bx r3
|
|
10004108: 20000b70 .word 0x20000b70
|
|
1000410c: 100007ed .word 0x100007ed
|
|
|
|
10004110 <__wrap_memset>:
|
|
10004110: 4b01 ldr r3, [pc, #4] @ (10004118 <__wrap_memset+0x8>)
|
|
10004112: 681b ldr r3, [r3, #0]
|
|
10004114: 4718 bx r3
|
|
10004116: 0000 .short 0x0000
|
|
10004118: 20000b70 .word 0x20000b70
|
|
|
|
1000411c <__wrap___aeabi_memcpy>:
|
|
1000411c: 4b01 ldr r3, [pc, #4] @ (10004124 <__wrap___aeabi_memcpy+0x8>)
|
|
1000411e: 685b ldr r3, [r3, #4]
|
|
10004120: 4718 bx r3
|
|
10004122: 0000 .short 0x0000
|
|
10004124: 20000b70 .word 0x20000b70
|
|
|
|
10004128 <stdio_out_chars_no_crlf>:
|
|
10004128: b510 push {r4, lr}
|
|
1000412a: 0003 movs r3, r0
|
|
1000412c: 0008 movs r0, r1
|
|
1000412e: 0011 movs r1, r2
|
|
10004130: 681b ldr r3, [r3, #0]
|
|
10004132: 4798 blx r3
|
|
10004134: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10004138 <stdio_out_chars_crlf>:
|
|
10004138: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000413a: 0007 movs r7, r0
|
|
1000413c: 000d movs r5, r1
|
|
1000413e: 0016 movs r6, r2
|
|
10004140: 7d43 ldrb r3, [r0, #21]
|
|
10004142: 2b00 cmp r3, #0
|
|
10004144: d002 beq.n 1000414c <stdio_out_chars_crlf+0x14>
|
|
10004146: 2400 movs r4, #0
|
|
10004148: 2000 movs r0, #0
|
|
1000414a: e00c b.n 10004166 <stdio_out_chars_crlf+0x2e>
|
|
1000414c: 6803 ldr r3, [r0, #0]
|
|
1000414e: 0011 movs r1, r2
|
|
10004150: 0028 movs r0, r5
|
|
10004152: 4798 blx r3
|
|
10004154: e02d b.n 100041b2 <stdio_out_chars_crlf+0x7a>
|
|
10004156: 7d3b ldrb r3, [r7, #20]
|
|
10004158: e010 b.n 1000417c <stdio_out_chars_crlf+0x44>
|
|
1000415a: 683b ldr r3, [r7, #0]
|
|
1000415c: 4815 ldr r0, [pc, #84] @ (100041b4 <stdio_out_chars_crlf+0x7c>)
|
|
1000415e: 2102 movs r1, #2
|
|
10004160: 4798 blx r3
|
|
10004162: 1c60 adds r0, r4, #1
|
|
10004164: 3401 adds r4, #1
|
|
10004166: 42b4 cmp r4, r6
|
|
10004168: da14 bge.n 10004194 <stdio_out_chars_crlf+0x5c>
|
|
1000416a: 2c00 cmp r4, #0
|
|
1000416c: ddf3 ble.n 10004156 <stdio_out_chars_crlf+0x1e>
|
|
1000416e: 192b adds r3, r5, r4
|
|
10004170: 3b01 subs r3, #1
|
|
10004172: 781b ldrb r3, [r3, #0]
|
|
10004174: 3b0d subs r3, #13
|
|
10004176: 425a negs r2, r3
|
|
10004178: 4153 adcs r3, r2
|
|
1000417a: b2db uxtb r3, r3
|
|
1000417c: 5d2a ldrb r2, [r5, r4]
|
|
1000417e: 2a0a cmp r2, #10
|
|
10004180: d1f0 bne.n 10004164 <stdio_out_chars_crlf+0x2c>
|
|
10004182: 2b00 cmp r3, #0
|
|
10004184: d1ee bne.n 10004164 <stdio_out_chars_crlf+0x2c>
|
|
10004186: 42a0 cmp r0, r4
|
|
10004188: dae7 bge.n 1000415a <stdio_out_chars_crlf+0x22>
|
|
1000418a: 683b ldr r3, [r7, #0]
|
|
1000418c: 1a21 subs r1, r4, r0
|
|
1000418e: 1828 adds r0, r5, r0
|
|
10004190: 4798 blx r3
|
|
10004192: e7e2 b.n 1000415a <stdio_out_chars_crlf+0x22>
|
|
10004194: 42b0 cmp r0, r6
|
|
10004196: da03 bge.n 100041a0 <stdio_out_chars_crlf+0x68>
|
|
10004198: 683b ldr r3, [r7, #0]
|
|
1000419a: 1a31 subs r1, r6, r0
|
|
1000419c: 1828 adds r0, r5, r0
|
|
1000419e: 4798 blx r3
|
|
100041a0: 2e00 cmp r6, #0
|
|
100041a2: dd06 ble.n 100041b2 <stdio_out_chars_crlf+0x7a>
|
|
100041a4: 19ad adds r5, r5, r6
|
|
100041a6: 3d01 subs r5, #1
|
|
100041a8: 782b ldrb r3, [r5, #0]
|
|
100041aa: 3b0d subs r3, #13
|
|
100041ac: 425a negs r2, r3
|
|
100041ae: 4153 adcs r3, r2
|
|
100041b0: 753b strb r3, [r7, #20]
|
|
100041b2: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100041b4: 1000a3c8 .word 0x1000a3c8
|
|
|
|
100041b8 <stdio_stack_buffer_flush>:
|
|
100041b8: b570 push {r4, r5, r6, lr}
|
|
100041ba: 0005 movs r5, r0
|
|
100041bc: 6803 ldr r3, [r0, #0]
|
|
100041be: 2b00 cmp r3, #0
|
|
100041c0: d016 beq.n 100041f0 <stdio_stack_buffer_flush+0x38>
|
|
100041c2: 4b0c ldr r3, [pc, #48] @ (100041f4 <stdio_stack_buffer_flush+0x3c>)
|
|
100041c4: 681c ldr r4, [r3, #0]
|
|
100041c6: e005 b.n 100041d4 <stdio_stack_buffer_flush+0x1c>
|
|
100041c8: 0029 movs r1, r5
|
|
100041ca: c904 ldmia r1!, {r2}
|
|
100041cc: 0020 movs r0, r4
|
|
100041ce: f7ff ffb3 bl 10004138 <stdio_out_chars_crlf>
|
|
100041d2: 6924 ldr r4, [r4, #16]
|
|
100041d4: 2c00 cmp r4, #0
|
|
100041d6: d009 beq.n 100041ec <stdio_stack_buffer_flush+0x34>
|
|
100041d8: 6823 ldr r3, [r4, #0]
|
|
100041da: 2b00 cmp r3, #0
|
|
100041dc: d0f9 beq.n 100041d2 <stdio_stack_buffer_flush+0x1a>
|
|
100041de: 4b06 ldr r3, [pc, #24] @ (100041f8 <stdio_stack_buffer_flush+0x40>)
|
|
100041e0: 681b ldr r3, [r3, #0]
|
|
100041e2: 2b00 cmp r3, #0
|
|
100041e4: d0f0 beq.n 100041c8 <stdio_stack_buffer_flush+0x10>
|
|
100041e6: 42a3 cmp r3, r4
|
|
100041e8: d1f3 bne.n 100041d2 <stdio_stack_buffer_flush+0x1a>
|
|
100041ea: e7ed b.n 100041c8 <stdio_stack_buffer_flush+0x10>
|
|
100041ec: 2300 movs r3, #0
|
|
100041ee: 602b str r3, [r5, #0]
|
|
100041f0: bd70 pop {r4, r5, r6, pc}
|
|
100041f2: 46c0 nop @ (mov r8, r8)
|
|
100041f4: 200012e8 .word 0x200012e8
|
|
100041f8: 200012f0 .word 0x200012f0
|
|
|
|
100041fc <stdio_buffered_printer>:
|
|
100041fc: b570 push {r4, r5, r6, lr}
|
|
100041fe: 0005 movs r5, r0
|
|
10004200: 000c movs r4, r1
|
|
10004202: 680b ldr r3, [r1, #0]
|
|
10004204: 2b80 cmp r3, #128 @ 0x80
|
|
10004206: d005 beq.n 10004214 <stdio_buffered_printer+0x18>
|
|
10004208: 6823 ldr r3, [r4, #0]
|
|
1000420a: 1c5a adds r2, r3, #1
|
|
1000420c: 6022 str r2, [r4, #0]
|
|
1000420e: 18e4 adds r4, r4, r3
|
|
10004210: 7125 strb r5, [r4, #4]
|
|
10004212: bd70 pop {r4, r5, r6, pc}
|
|
10004214: 0008 movs r0, r1
|
|
10004216: f7ff ffcf bl 100041b8 <stdio_stack_buffer_flush>
|
|
1000421a: e7f5 b.n 10004208 <stdio_buffered_printer+0xc>
|
|
|
|
1000421c <update_us_since_boot>:
|
|
1000421c: b510 push {r4, lr}
|
|
1000421e: 2b00 cmp r3, #0
|
|
10004220: db02 blt.n 10004228 <update_us_since_boot+0xc>
|
|
10004222: 6002 str r2, [r0, #0]
|
|
10004224: 6043 str r3, [r0, #4]
|
|
10004226: bd10 pop {r4, pc}
|
|
10004228: 4b02 ldr r3, [pc, #8] @ (10004234 <update_us_since_boot+0x18>)
|
|
1000422a: 4a03 ldr r2, [pc, #12] @ (10004238 <update_us_since_boot+0x1c>)
|
|
1000422c: 4803 ldr r0, [pc, #12] @ (1000423c <update_us_since_boot+0x20>)
|
|
1000422e: 213f movs r1, #63 @ 0x3f
|
|
10004230: f7fe f928 bl 10002484 <__assert_func>
|
|
10004234: 10009770 .word 0x10009770
|
|
10004238: 1000a3cc .word 0x1000a3cc
|
|
1000423c: 1000978c .word 0x1000978c
|
|
|
|
10004240 <get_absolute_time>:
|
|
10004240: b510 push {r4, lr}
|
|
10004242: b082 sub sp, #8
|
|
10004244: 0004 movs r4, r0
|
|
10004246: f7fd fd49 bl 10001cdc <time_us_64>
|
|
1000424a: 0002 movs r2, r0
|
|
1000424c: 000b movs r3, r1
|
|
1000424e: 4668 mov r0, sp
|
|
10004250: f7ff ffe4 bl 1000421c <update_us_since_boot>
|
|
10004254: 9a00 ldr r2, [sp, #0]
|
|
10004256: 9b01 ldr r3, [sp, #4]
|
|
10004258: 6022 str r2, [r4, #0]
|
|
1000425a: 6063 str r3, [r4, #4]
|
|
1000425c: 0020 movs r0, r4
|
|
1000425e: b002 add sp, #8
|
|
10004260: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10004264 <delayed_by_ms>:
|
|
10004264: b570 push {r4, r5, r6, lr}
|
|
10004266: b082 sub sp, #8
|
|
10004268: 0006 movs r6, r0
|
|
1000426a: 0014 movs r4, r2
|
|
1000426c: 001d movs r5, r3
|
|
1000426e: 22fa movs r2, #250 @ 0xfa
|
|
10004270: 0092 lsls r2, r2, #2
|
|
10004272: 2300 movs r3, #0
|
|
10004274: 9806 ldr r0, [sp, #24]
|
|
10004276: 2100 movs r1, #0
|
|
10004278: f7ff fe58 bl 10003f2c <__wrap___aeabi_lmul>
|
|
1000427c: 0002 movs r2, r0
|
|
1000427e: 000b movs r3, r1
|
|
10004280: 1912 adds r2, r2, r4
|
|
10004282: 416b adcs r3, r5
|
|
10004284: 2b00 cmp r3, #0
|
|
10004286: db09 blt.n 1000429c <delayed_by_ms+0x38>
|
|
10004288: 4668 mov r0, sp
|
|
1000428a: f7ff ffc7 bl 1000421c <update_us_since_boot>
|
|
1000428e: 9a00 ldr r2, [sp, #0]
|
|
10004290: 9b01 ldr r3, [sp, #4]
|
|
10004292: 6032 str r2, [r6, #0]
|
|
10004294: 6073 str r3, [r6, #4]
|
|
10004296: 0030 movs r0, r6
|
|
10004298: b002 add sp, #8
|
|
1000429a: bd70 pop {r4, r5, r6, pc}
|
|
1000429c: 2201 movs r2, #1
|
|
1000429e: 4252 negs r2, r2
|
|
100042a0: 4b00 ldr r3, [pc, #0] @ (100042a4 <delayed_by_ms+0x40>)
|
|
100042a2: e7f1 b.n 10004288 <delayed_by_ms+0x24>
|
|
100042a4: 7fffffff .word 0x7fffffff
|
|
|
|
100042a8 <make_timeout_time_ms>:
|
|
100042a8: b530 push {r4, r5, lr}
|
|
100042aa: b085 sub sp, #20
|
|
100042ac: 0004 movs r4, r0
|
|
100042ae: 000d movs r5, r1
|
|
100042b0: a802 add r0, sp, #8
|
|
100042b2: f7ff ffc5 bl 10004240 <get_absolute_time>
|
|
100042b6: 9a02 ldr r2, [sp, #8]
|
|
100042b8: 9b03 ldr r3, [sp, #12]
|
|
100042ba: 9500 str r5, [sp, #0]
|
|
100042bc: 0020 movs r0, r4
|
|
100042be: f7ff ffd1 bl 10004264 <delayed_by_ms>
|
|
100042c2: 0020 movs r0, r4
|
|
100042c4: b005 add sp, #20
|
|
100042c6: bd30 pop {r4, r5, pc}
|
|
|
|
100042c8 <stdout_serialize_begin>:
|
|
100042c8: b500 push {lr}
|
|
100042ca: b083 sub sp, #12
|
|
100042cc: 21fa movs r1, #250 @ 0xfa
|
|
100042ce: 0089 lsls r1, r1, #2
|
|
100042d0: 4668 mov r0, sp
|
|
100042d2: f7ff ffe9 bl 100042a8 <make_timeout_time_ms>
|
|
100042d6: 9a00 ldr r2, [sp, #0]
|
|
100042d8: 9b01 ldr r3, [sp, #4]
|
|
100042da: 4802 ldr r0, [pc, #8] @ (100042e4 <stdout_serialize_begin+0x1c>)
|
|
100042dc: f004 ff6c bl 100091b8 <__mutex_try_enter_block_until_veneer>
|
|
100042e0: b003 add sp, #12
|
|
100042e2: bd00 pop {pc}
|
|
100042e4: 20000bcc .word 0x20000bcc
|
|
|
|
100042e8 <stdout_serialize_end>:
|
|
100042e8: b510 push {r4, lr}
|
|
100042ea: 4802 ldr r0, [pc, #8] @ (100042f4 <stdout_serialize_end+0xc>)
|
|
100042ec: f004 ff1c bl 10009128 <__mutex_exit_veneer>
|
|
100042f0: bd10 pop {r4, pc}
|
|
100042f2: 46c0 nop @ (mov r8, r8)
|
|
100042f4: 20000bcc .word 0x20000bcc
|
|
|
|
100042f8 <stdio_put_string>:
|
|
100042f8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100042fa: 46ce mov lr, r9
|
|
100042fc: 4647 mov r7, r8
|
|
100042fe: b580 push {r7, lr}
|
|
10004300: b083 sub sp, #12
|
|
10004302: 0006 movs r6, r0
|
|
10004304: 000d movs r5, r1
|
|
10004306: 4690 mov r8, r2
|
|
10004308: 001c movs r4, r3
|
|
1000430a: f7ff ffdd bl 100042c8 <stdout_serialize_begin>
|
|
1000430e: 4681 mov r9, r0
|
|
10004310: 1c6b adds r3, r5, #1
|
|
10004312: d005 beq.n 10004320 <stdio_put_string+0x28>
|
|
10004314: 2c00 cmp r4, #0
|
|
10004316: d008 beq.n 1000432a <stdio_put_string+0x32>
|
|
10004318: 4f19 ldr r7, [pc, #100] @ (10004380 <stdio_put_string+0x88>)
|
|
1000431a: 4b1a ldr r3, [pc, #104] @ (10004384 <stdio_put_string+0x8c>)
|
|
1000431c: 681c ldr r4, [r3, #0]
|
|
1000431e: e007 b.n 10004330 <stdio_put_string+0x38>
|
|
10004320: 0030 movs r0, r6
|
|
10004322: f004 fec7 bl 100090b4 <strlen>
|
|
10004326: 0005 movs r5, r0
|
|
10004328: e7f4 b.n 10004314 <stdio_put_string+0x1c>
|
|
1000432a: 4f17 ldr r7, [pc, #92] @ (10004388 <stdio_put_string+0x90>)
|
|
1000432c: e7f5 b.n 1000431a <stdio_put_string+0x22>
|
|
1000432e: 6924 ldr r4, [r4, #16]
|
|
10004330: 2c00 cmp r4, #0
|
|
10004332: d017 beq.n 10004364 <stdio_put_string+0x6c>
|
|
10004334: 6823 ldr r3, [r4, #0]
|
|
10004336: 2b00 cmp r3, #0
|
|
10004338: d0f9 beq.n 1000432e <stdio_put_string+0x36>
|
|
1000433a: 4b14 ldr r3, [pc, #80] @ (1000438c <stdio_put_string+0x94>)
|
|
1000433c: 681b ldr r3, [r3, #0]
|
|
1000433e: 2b00 cmp r3, #0
|
|
10004340: d001 beq.n 10004346 <stdio_put_string+0x4e>
|
|
10004342: 42a3 cmp r3, r4
|
|
10004344: d1f3 bne.n 1000432e <stdio_put_string+0x36>
|
|
10004346: 002a movs r2, r5
|
|
10004348: 0031 movs r1, r6
|
|
1000434a: 0020 movs r0, r4
|
|
1000434c: 47b8 blx r7
|
|
1000434e: 4643 mov r3, r8
|
|
10004350: 2b00 cmp r3, #0
|
|
10004352: d0ec beq.n 1000432e <stdio_put_string+0x36>
|
|
10004354: 466b mov r3, sp
|
|
10004356: 1dd9 adds r1, r3, #7
|
|
10004358: 230a movs r3, #10
|
|
1000435a: 700b strb r3, [r1, #0]
|
|
1000435c: 2201 movs r2, #1
|
|
1000435e: 0020 movs r0, r4
|
|
10004360: 47b8 blx r7
|
|
10004362: e7e4 b.n 1000432e <stdio_put_string+0x36>
|
|
10004364: 464b mov r3, r9
|
|
10004366: 2b00 cmp r3, #0
|
|
10004368: d107 bne.n 1000437a <stdio_put_string+0x82>
|
|
1000436a: 1e6b subs r3, r5, #1
|
|
1000436c: 419d sbcs r5, r3
|
|
1000436e: b2e8 uxtb r0, r5
|
|
10004370: b003 add sp, #12
|
|
10004372: bcc0 pop {r6, r7}
|
|
10004374: 46b9 mov r9, r7
|
|
10004376: 46b0 mov r8, r6
|
|
10004378: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000437a: f7ff ffb5 bl 100042e8 <stdout_serialize_end>
|
|
1000437e: e7f4 b.n 1000436a <stdio_put_string+0x72>
|
|
10004380: 10004129 .word 0x10004129
|
|
10004384: 200012e8 .word 0x200012e8
|
|
10004388: 10004139 .word 0x10004139
|
|
1000438c: 200012f0 .word 0x200012f0
|
|
|
|
10004390 <stdio_set_driver_enabled>:
|
|
10004390: 4a09 ldr r2, [pc, #36] @ (100043b8 <stdio_set_driver_enabled+0x28>)
|
|
10004392: e001 b.n 10004398 <stdio_set_driver_enabled+0x8>
|
|
10004394: 3310 adds r3, #16
|
|
10004396: 001a movs r2, r3
|
|
10004398: 6813 ldr r3, [r2, #0]
|
|
1000439a: 2b00 cmp r3, #0
|
|
1000439c: d008 beq.n 100043b0 <stdio_set_driver_enabled+0x20>
|
|
1000439e: 4283 cmp r3, r0
|
|
100043a0: d1f8 bne.n 10004394 <stdio_set_driver_enabled+0x4>
|
|
100043a2: 2900 cmp r1, #0
|
|
100043a4: d107 bne.n 100043b6 <stdio_set_driver_enabled+0x26>
|
|
100043a6: 6903 ldr r3, [r0, #16]
|
|
100043a8: 6013 str r3, [r2, #0]
|
|
100043aa: 2300 movs r3, #0
|
|
100043ac: 6103 str r3, [r0, #16]
|
|
100043ae: e002 b.n 100043b6 <stdio_set_driver_enabled+0x26>
|
|
100043b0: 2900 cmp r1, #0
|
|
100043b2: d000 beq.n 100043b6 <stdio_set_driver_enabled+0x26>
|
|
100043b4: 6010 str r0, [r2, #0]
|
|
100043b6: 4770 bx lr
|
|
100043b8: 200012e8 .word 0x200012e8
|
|
|
|
100043bc <stdio_flush>:
|
|
100043bc: b510 push {r4, lr}
|
|
100043be: 4b06 ldr r3, [pc, #24] @ (100043d8 <stdio_flush+0x1c>)
|
|
100043c0: 681c ldr r4, [r3, #0]
|
|
100043c2: e001 b.n 100043c8 <stdio_flush+0xc>
|
|
100043c4: 4798 blx r3
|
|
100043c6: 6924 ldr r4, [r4, #16]
|
|
100043c8: 2c00 cmp r4, #0
|
|
100043ca: d003 beq.n 100043d4 <stdio_flush+0x18>
|
|
100043cc: 6863 ldr r3, [r4, #4]
|
|
100043ce: 2b00 cmp r3, #0
|
|
100043d0: d1f8 bne.n 100043c4 <stdio_flush+0x8>
|
|
100043d2: e7f8 b.n 100043c6 <stdio_flush+0xa>
|
|
100043d4: bd10 pop {r4, pc}
|
|
100043d6: 46c0 nop @ (mov r8, r8)
|
|
100043d8: 200012e8 .word 0x200012e8
|
|
|
|
100043dc <__wrap_puts>:
|
|
100043dc: b570 push {r4, r5, r6, lr}
|
|
100043de: 0005 movs r5, r0
|
|
100043e0: f004 fe68 bl 100090b4 <strlen>
|
|
100043e4: 0004 movs r4, r0
|
|
100043e6: 2300 movs r3, #0
|
|
100043e8: 2201 movs r2, #1
|
|
100043ea: 0001 movs r1, r0
|
|
100043ec: 0028 movs r0, r5
|
|
100043ee: f7ff ff83 bl 100042f8 <stdio_put_string>
|
|
100043f2: f7ff ffe3 bl 100043bc <stdio_flush>
|
|
100043f6: 0020 movs r0, r4
|
|
100043f8: bd70 pop {r4, r5, r6, pc}
|
|
...
|
|
|
|
100043fc <__wrap_vprintf>:
|
|
100043fc: b570 push {r4, r5, r6, lr}
|
|
100043fe: b0a2 sub sp, #136 @ 0x88
|
|
10004400: 0004 movs r4, r0
|
|
10004402: 000e movs r6, r1
|
|
10004404: f7ff ff60 bl 100042c8 <stdout_serialize_begin>
|
|
10004408: 0005 movs r5, r0
|
|
1000440a: 2300 movs r3, #0
|
|
1000440c: 9301 str r3, [sp, #4]
|
|
1000440e: 480a ldr r0, [pc, #40] @ (10004438 <__wrap_vprintf+0x3c>)
|
|
10004410: 0033 movs r3, r6
|
|
10004412: 0022 movs r2, r4
|
|
10004414: a901 add r1, sp, #4
|
|
10004416: f7ff f9b1 bl 1000377c <vfctprintf>
|
|
1000441a: 0004 movs r4, r0
|
|
1000441c: a801 add r0, sp, #4
|
|
1000441e: f7ff fecb bl 100041b8 <stdio_stack_buffer_flush>
|
|
10004422: f7ff ffcb bl 100043bc <stdio_flush>
|
|
10004426: 2d00 cmp r5, #0
|
|
10004428: d102 bne.n 10004430 <__wrap_vprintf+0x34>
|
|
1000442a: 0020 movs r0, r4
|
|
1000442c: b022 add sp, #136 @ 0x88
|
|
1000442e: bd70 pop {r4, r5, r6, pc}
|
|
10004430: f7ff ff5a bl 100042e8 <stdout_serialize_end>
|
|
10004434: e7f9 b.n 1000442a <__wrap_vprintf+0x2e>
|
|
10004436: 46c0 nop @ (mov r8, r8)
|
|
10004438: 100041fd .word 0x100041fd
|
|
|
|
1000443c <__wrap_printf>:
|
|
1000443c: b40f push {r0, r1, r2, r3}
|
|
1000443e: b500 push {lr}
|
|
10004440: b083 sub sp, #12
|
|
10004442: a904 add r1, sp, #16
|
|
10004444: c901 ldmia r1!, {r0}
|
|
10004446: 9101 str r1, [sp, #4]
|
|
10004448: f7ff ffd8 bl 100043fc <__wrap_vprintf>
|
|
1000444c: b003 add sp, #12
|
|
1000444e: bc08 pop {r3}
|
|
10004450: b004 add sp, #16
|
|
10004452: 4718 bx r3
|
|
|
|
10004454 <resetd_init>:
|
|
10004454: 4770 bx lr
|
|
...
|
|
|
|
10004458 <resetd_reset>:
|
|
10004458: 4b01 ldr r3, [pc, #4] @ (10004460 <resetd_reset+0x8>)
|
|
1000445a: 2200 movs r2, #0
|
|
1000445c: 701a strb r2, [r3, #0]
|
|
1000445e: 4770 bx lr
|
|
10004460: 20021d43 .word 0x20021d43
|
|
|
|
10004464 <resetd_open>:
|
|
10004464: 794b ldrb r3, [r1, #5]
|
|
10004466: 2bff cmp r3, #255 @ 0xff
|
|
10004468: d10c bne.n 10004484 <resetd_open+0x20>
|
|
1000446a: 798b ldrb r3, [r1, #6]
|
|
1000446c: 2b00 cmp r3, #0
|
|
1000446e: d10b bne.n 10004488 <resetd_open+0x24>
|
|
10004470: 79cb ldrb r3, [r1, #7]
|
|
10004472: 2b01 cmp r3, #1
|
|
10004474: d10a bne.n 1000448c <resetd_open+0x28>
|
|
10004476: 2a08 cmp r2, #8
|
|
10004478: d90a bls.n 10004490 <resetd_open+0x2c>
|
|
1000447a: 788a ldrb r2, [r1, #2]
|
|
1000447c: 4b05 ldr r3, [pc, #20] @ (10004494 <resetd_open+0x30>)
|
|
1000447e: 701a strb r2, [r3, #0]
|
|
10004480: 2009 movs r0, #9
|
|
10004482: e000 b.n 10004486 <resetd_open+0x22>
|
|
10004484: 2000 movs r0, #0
|
|
10004486: 4770 bx lr
|
|
10004488: 2000 movs r0, #0
|
|
1000448a: e7fc b.n 10004486 <resetd_open+0x22>
|
|
1000448c: 2000 movs r0, #0
|
|
1000448e: e7fa b.n 10004486 <resetd_open+0x22>
|
|
10004490: 2000 movs r0, #0
|
|
10004492: e7f8 b.n 10004486 <resetd_open+0x22>
|
|
10004494: 20021d43 .word 0x20021d43
|
|
|
|
10004498 <resetd_xfer_cb>:
|
|
10004498: 2001 movs r0, #1
|
|
1000449a: 4770 bx lr
|
|
|
|
1000449c <reset_usb_boot>:
|
|
1000449c: b570 push {r4, r5, r6, lr}
|
|
1000449e: 0004 movs r4, r0
|
|
100044a0: 000d movs r5, r1
|
|
100044a2: 4803 ldr r0, [pc, #12] @ (100044b0 <reset_usb_boot+0x14>)
|
|
100044a4: f7fc f992 bl 100007cc <rom_func_lookup>
|
|
100044a8: 0003 movs r3, r0
|
|
100044aa: 0029 movs r1, r5
|
|
100044ac: 0020 movs r0, r4
|
|
100044ae: 4798 blx r3
|
|
100044b0: 00004255 .word 0x00004255
|
|
|
|
100044b4 <resetd_control_xfer_cb>:
|
|
100044b4: b510 push {r4, lr}
|
|
100044b6: 2901 cmp r1, #1
|
|
100044b8: d126 bne.n 10004508 <resetd_control_xfer_cb+0x54>
|
|
100044ba: 7911 ldrb r1, [r2, #4]
|
|
100044bc: 7953 ldrb r3, [r2, #5]
|
|
100044be: 021b lsls r3, r3, #8
|
|
100044c0: 430b orrs r3, r1
|
|
100044c2: 4912 ldr r1, [pc, #72] @ (1000450c <resetd_control_xfer_cb+0x58>)
|
|
100044c4: 7809 ldrb r1, [r1, #0]
|
|
100044c6: 428b cmp r3, r1
|
|
100044c8: d001 beq.n 100044ce <resetd_control_xfer_cb+0x1a>
|
|
100044ca: 2000 movs r0, #0
|
|
100044cc: e01d b.n 1000450a <resetd_control_xfer_cb+0x56>
|
|
100044ce: 7853 ldrb r3, [r2, #1]
|
|
100044d0: 2b01 cmp r3, #1
|
|
100044d2: d003 beq.n 100044dc <resetd_control_xfer_cb+0x28>
|
|
100044d4: 2b02 cmp r3, #2
|
|
100044d6: d010 beq.n 100044fa <resetd_control_xfer_cb+0x46>
|
|
100044d8: 2000 movs r0, #0
|
|
100044da: e016 b.n 1000450a <resetd_control_xfer_cb+0x56>
|
|
100044dc: 7891 ldrb r1, [r2, #2]
|
|
100044de: 78d3 ldrb r3, [r2, #3]
|
|
100044e0: 021b lsls r3, r3, #8
|
|
100044e2: 4319 orrs r1, r3
|
|
100044e4: 05db lsls r3, r3, #23
|
|
100044e6: d506 bpl.n 100044f6 <resetd_control_xfer_cb+0x42>
|
|
100044e8: 0a4b lsrs r3, r1, #9
|
|
100044ea: 2001 movs r0, #1
|
|
100044ec: 4098 lsls r0, r3
|
|
100044ee: 237f movs r3, #127 @ 0x7f
|
|
100044f0: 4019 ands r1, r3
|
|
100044f2: f7ff ffd3 bl 1000449c <reset_usb_boot>
|
|
100044f6: 2000 movs r0, #0
|
|
100044f8: e7f9 b.n 100044ee <resetd_control_xfer_cb+0x3a>
|
|
100044fa: 2264 movs r2, #100 @ 0x64
|
|
100044fc: 2100 movs r1, #0
|
|
100044fe: 2000 movs r0, #0
|
|
10004500: f7fd ff3c bl 1000237c <watchdog_reboot>
|
|
10004504: 2001 movs r0, #1
|
|
10004506: e000 b.n 1000450a <resetd_control_xfer_cb+0x56>
|
|
10004508: 2001 movs r0, #1
|
|
1000450a: bd10 pop {r4, pc}
|
|
1000450c: 20021d43 .word 0x20021d43
|
|
|
|
10004510 <usbd_app_driver_get_cb>:
|
|
10004510: 2301 movs r3, #1
|
|
10004512: 7003 strb r3, [r0, #0]
|
|
10004514: 4800 ldr r0, [pc, #0] @ (10004518 <usbd_app_driver_get_cb+0x8>)
|
|
10004516: 4770 bx lr
|
|
10004518: 1000a3e4 .word 0x1000a3e4
|
|
|
|
1000451c <tud_cdc_line_coding_cb>:
|
|
1000451c: b510 push {r4, lr}
|
|
1000451e: 780a ldrb r2, [r1, #0]
|
|
10004520: 784b ldrb r3, [r1, #1]
|
|
10004522: 021b lsls r3, r3, #8
|
|
10004524: 4313 orrs r3, r2
|
|
10004526: 788a ldrb r2, [r1, #2]
|
|
10004528: 0412 lsls r2, r2, #16
|
|
1000452a: 431a orrs r2, r3
|
|
1000452c: 78cb ldrb r3, [r1, #3]
|
|
1000452e: 061b lsls r3, r3, #24
|
|
10004530: 4313 orrs r3, r2
|
|
10004532: 2296 movs r2, #150 @ 0x96
|
|
10004534: 00d2 lsls r2, r2, #3
|
|
10004536: 4293 cmp r3, r2
|
|
10004538: d000 beq.n 1000453c <tud_cdc_line_coding_cb+0x20>
|
|
1000453a: bd10 pop {r4, pc}
|
|
1000453c: 2100 movs r1, #0
|
|
1000453e: 0008 movs r0, r1
|
|
10004540: f7ff ffac bl 1000449c <reset_usb_boot>
|
|
|
|
10004544 <stdio_usb_set_chars_available_callback>:
|
|
10004544: 4b02 ldr r3, [pc, #8] @ (10004550 <stdio_usb_set_chars_available_callback+0xc>)
|
|
10004546: 6018 str r0, [r3, #0]
|
|
10004548: 4b02 ldr r3, [pc, #8] @ (10004554 <stdio_usb_set_chars_available_callback+0x10>)
|
|
1000454a: 6019 str r1, [r3, #0]
|
|
1000454c: 4770 bx lr
|
|
1000454e: 46c0 nop @ (mov r8, r8)
|
|
10004550: 2000124c .word 0x2000124c
|
|
10004554: 20001250 .word 0x20001250
|
|
|
|
10004558 <update_us_since_boot>:
|
|
10004558: b510 push {r4, lr}
|
|
1000455a: 2b00 cmp r3, #0
|
|
1000455c: db02 blt.n 10004564 <update_us_since_boot+0xc>
|
|
1000455e: 6002 str r2, [r0, #0]
|
|
10004560: 6043 str r3, [r0, #4]
|
|
10004562: bd10 pop {r4, pc}
|
|
10004564: 4b02 ldr r3, [pc, #8] @ (10004570 <update_us_since_boot+0x18>)
|
|
10004566: 4a03 ldr r2, [pc, #12] @ (10004574 <update_us_since_boot+0x1c>)
|
|
10004568: 4803 ldr r0, [pc, #12] @ (10004578 <update_us_since_boot+0x20>)
|
|
1000456a: 213f movs r1, #63 @ 0x3f
|
|
1000456c: f7fd ff8a bl 10002484 <__assert_func>
|
|
10004570: 10009770 .word 0x10009770
|
|
10004574: 1000a470 .word 0x1000a470
|
|
10004578: 1000978c .word 0x1000978c
|
|
|
|
1000457c <get_absolute_time>:
|
|
1000457c: b510 push {r4, lr}
|
|
1000457e: b082 sub sp, #8
|
|
10004580: 0004 movs r4, r0
|
|
10004582: f7fd fbab bl 10001cdc <time_us_64>
|
|
10004586: 0002 movs r2, r0
|
|
10004588: 000b movs r3, r1
|
|
1000458a: 4668 mov r0, sp
|
|
1000458c: f7ff ffe4 bl 10004558 <update_us_since_boot>
|
|
10004590: 9a00 ldr r2, [sp, #0]
|
|
10004592: 9b01 ldr r3, [sp, #4]
|
|
10004594: 6022 str r2, [r4, #0]
|
|
10004596: 6063 str r3, [r4, #4]
|
|
10004598: 0020 movs r0, r4
|
|
1000459a: b002 add sp, #8
|
|
1000459c: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100045a0 <delayed_by_ms>:
|
|
100045a0: b570 push {r4, r5, r6, lr}
|
|
100045a2: b082 sub sp, #8
|
|
100045a4: 0006 movs r6, r0
|
|
100045a6: 0014 movs r4, r2
|
|
100045a8: 001d movs r5, r3
|
|
100045aa: 22fa movs r2, #250 @ 0xfa
|
|
100045ac: 0092 lsls r2, r2, #2
|
|
100045ae: 2300 movs r3, #0
|
|
100045b0: 9806 ldr r0, [sp, #24]
|
|
100045b2: 2100 movs r1, #0
|
|
100045b4: f7ff fcba bl 10003f2c <__wrap___aeabi_lmul>
|
|
100045b8: 0002 movs r2, r0
|
|
100045ba: 000b movs r3, r1
|
|
100045bc: 1912 adds r2, r2, r4
|
|
100045be: 416b adcs r3, r5
|
|
100045c0: 2b00 cmp r3, #0
|
|
100045c2: db09 blt.n 100045d8 <delayed_by_ms+0x38>
|
|
100045c4: 4668 mov r0, sp
|
|
100045c6: f7ff ffc7 bl 10004558 <update_us_since_boot>
|
|
100045ca: 9a00 ldr r2, [sp, #0]
|
|
100045cc: 9b01 ldr r3, [sp, #4]
|
|
100045ce: 6032 str r2, [r6, #0]
|
|
100045d0: 6073 str r3, [r6, #4]
|
|
100045d2: 0030 movs r0, r6
|
|
100045d4: b002 add sp, #8
|
|
100045d6: bd70 pop {r4, r5, r6, pc}
|
|
100045d8: 2201 movs r2, #1
|
|
100045da: 4252 negs r2, r2
|
|
100045dc: 4b00 ldr r3, [pc, #0] @ (100045e0 <delayed_by_ms+0x40>)
|
|
100045de: e7f1 b.n 100045c4 <delayed_by_ms+0x24>
|
|
100045e0: 7fffffff .word 0x7fffffff
|
|
|
|
100045e4 <make_timeout_time_ms>:
|
|
100045e4: b530 push {r4, r5, lr}
|
|
100045e6: b085 sub sp, #20
|
|
100045e8: 0004 movs r4, r0
|
|
100045ea: 000d movs r5, r1
|
|
100045ec: a802 add r0, sp, #8
|
|
100045ee: f7ff ffc5 bl 1000457c <get_absolute_time>
|
|
100045f2: 9a02 ldr r2, [sp, #8]
|
|
100045f4: 9b03 ldr r3, [sp, #12]
|
|
100045f6: 9500 str r5, [sp, #0]
|
|
100045f8: 0020 movs r0, r4
|
|
100045fa: f7ff ffd1 bl 100045a0 <delayed_by_ms>
|
|
100045fe: 0020 movs r0, r4
|
|
10004600: b005 add sp, #20
|
|
10004602: bd30 pop {r4, r5, pc}
|
|
|
|
10004604 <delayed_by_us>:
|
|
10004604: b510 push {r4, lr}
|
|
10004606: b082 sub sp, #8
|
|
10004608: 0004 movs r4, r0
|
|
1000460a: 9804 ldr r0, [sp, #16]
|
|
1000460c: 9905 ldr r1, [sp, #20]
|
|
1000460e: 1812 adds r2, r2, r0
|
|
10004610: 414b adcs r3, r1
|
|
10004612: 2b00 cmp r3, #0
|
|
10004614: db09 blt.n 1000462a <delayed_by_us+0x26>
|
|
10004616: 4668 mov r0, sp
|
|
10004618: f7ff ff9e bl 10004558 <update_us_since_boot>
|
|
1000461c: 9a00 ldr r2, [sp, #0]
|
|
1000461e: 9b01 ldr r3, [sp, #4]
|
|
10004620: 6022 str r2, [r4, #0]
|
|
10004622: 6063 str r3, [r4, #4]
|
|
10004624: 0020 movs r0, r4
|
|
10004626: b002 add sp, #8
|
|
10004628: bd10 pop {r4, pc}
|
|
1000462a: 2201 movs r2, #1
|
|
1000462c: 4252 negs r2, r2
|
|
1000462e: 4b01 ldr r3, [pc, #4] @ (10004634 <delayed_by_us+0x30>)
|
|
10004630: e7f1 b.n 10004616 <delayed_by_us+0x12>
|
|
10004632: 46c0 nop @ (mov r8, r8)
|
|
10004634: 7fffffff .word 0x7fffffff
|
|
|
|
10004638 <usb_irq>:
|
|
10004638: b510 push {r4, lr}
|
|
1000463a: 4b02 ldr r3, [pc, #8] @ (10004644 <usb_irq+0xc>)
|
|
1000463c: 7818 ldrb r0, [r3, #0]
|
|
1000463e: f7fc fae5 bl 10000c0c <irq_set_pending>
|
|
10004642: bd10 pop {r4, pc}
|
|
10004644: 20021d44 .word 0x20021d44
|
|
|
|
10004648 <critical_section_enter_blocking>:
|
|
10004648: 6802 ldr r2, [r0, #0]
|
|
1000464a: f3ef 8110 mrs r1, PRIMASK
|
|
1000464e: b672 cpsid i
|
|
10004650: 6813 ldr r3, [r2, #0]
|
|
10004652: 2b00 cmp r3, #0
|
|
10004654: d0fc beq.n 10004650 <critical_section_enter_blocking+0x8>
|
|
10004656: f3bf 8f5f dmb sy
|
|
1000465a: 6041 str r1, [r0, #4]
|
|
1000465c: 4770 bx lr
|
|
...
|
|
|
|
10004660 <timer_task>:
|
|
10004660: b570 push {r4, r5, r6, lr}
|
|
10004662: 4b0f ldr r3, [pc, #60] @ (100046a0 <timer_task+0x40>)
|
|
10004664: 681b ldr r3, [r3, #0]
|
|
10004666: 2b00 cmp r3, #0
|
|
10004668: d016 beq.n 10004698 <timer_task+0x38>
|
|
1000466a: 4c0d ldr r4, [pc, #52] @ (100046a0 <timer_task+0x40>)
|
|
1000466c: 0020 movs r0, r4
|
|
1000466e: f7ff ffeb bl 10004648 <critical_section_enter_blocking>
|
|
10004672: 4b0c ldr r3, [pc, #48] @ (100046a4 <timer_task+0x44>)
|
|
10004674: 2200 movs r2, #0
|
|
10004676: 701a strb r2, [r3, #0]
|
|
10004678: 6821 ldr r1, [r4, #0]
|
|
1000467a: 6863 ldr r3, [r4, #4]
|
|
1000467c: f3bf 8f5f dmb sy
|
|
10004680: 600a str r2, [r1, #0]
|
|
10004682: f383 8810 msr PRIMASK, r3
|
|
10004686: 2400 movs r4, #0
|
|
10004688: 2500 movs r5, #0
|
|
1000468a: 4b07 ldr r3, [pc, #28] @ (100046a8 <timer_task+0x48>)
|
|
1000468c: 7818 ldrb r0, [r3, #0]
|
|
1000468e: f7fc fabd bl 10000c0c <irq_set_pending>
|
|
10004692: 0020 movs r0, r4
|
|
10004694: 0029 movs r1, r5
|
|
10004696: bd70 pop {r4, r5, r6, pc}
|
|
10004698: 24fa movs r4, #250 @ 0xfa
|
|
1000469a: 00a4 lsls r4, r4, #2
|
|
1000469c: 2500 movs r5, #0
|
|
1000469e: e7f4 b.n 1000468a <timer_task+0x2a>
|
|
100046a0: 20001720 .word 0x20001720
|
|
100046a4: 20021d45 .word 0x20021d45
|
|
100046a8: 20021d44 .word 0x20021d44
|
|
|
|
100046ac <alarm_pool_add_alarm_in_us>:
|
|
100046ac: b5f0 push {r4, r5, r6, r7, lr}
|
|
100046ae: b087 sub sp, #28
|
|
100046b0: 0004 movs r4, r0
|
|
100046b2: 0016 movs r6, r2
|
|
100046b4: 001d movs r5, r3
|
|
100046b6: ab0e add r3, sp, #56 @ 0x38
|
|
100046b8: 781f ldrb r7, [r3, #0]
|
|
100046ba: a804 add r0, sp, #16
|
|
100046bc: f7ff ff5e bl 1000457c <get_absolute_time>
|
|
100046c0: 9a04 ldr r2, [sp, #16]
|
|
100046c2: 9b05 ldr r3, [sp, #20]
|
|
100046c4: 9600 str r6, [sp, #0]
|
|
100046c6: 9501 str r5, [sp, #4]
|
|
100046c8: a804 add r0, sp, #16
|
|
100046ca: f7ff ff9b bl 10004604 <delayed_by_us>
|
|
100046ce: 9a04 ldr r2, [sp, #16]
|
|
100046d0: 9b05 ldr r3, [sp, #20]
|
|
100046d2: 9702 str r7, [sp, #8]
|
|
100046d4: 990d ldr r1, [sp, #52] @ 0x34
|
|
100046d6: 9101 str r1, [sp, #4]
|
|
100046d8: 990c ldr r1, [sp, #48] @ 0x30
|
|
100046da: 9100 str r1, [sp, #0]
|
|
100046dc: 0020 movs r0, r4
|
|
100046de: f7fd f923 bl 10001928 <alarm_pool_add_alarm_at>
|
|
100046e2: b007 add sp, #28
|
|
100046e4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100046e6 <add_alarm_in_us>:
|
|
100046e6: b5f0 push {r4, r5, r6, r7, lr}
|
|
100046e8: 46c6 mov lr, r8
|
|
100046ea: b500 push {lr}
|
|
100046ec: b084 sub sp, #16
|
|
100046ee: 0005 movs r5, r0
|
|
100046f0: 4688 mov r8, r1
|
|
100046f2: 0016 movs r6, r2
|
|
100046f4: 001f movs r7, r3
|
|
100046f6: ab0a add r3, sp, #40 @ 0x28
|
|
100046f8: 781c ldrb r4, [r3, #0]
|
|
100046fa: f7fd f8ff bl 100018fc <alarm_pool_get_default>
|
|
100046fe: 9402 str r4, [sp, #8]
|
|
10004700: 9701 str r7, [sp, #4]
|
|
10004702: 9600 str r6, [sp, #0]
|
|
10004704: 002a movs r2, r5
|
|
10004706: 4643 mov r3, r8
|
|
10004708: f7ff ffd0 bl 100046ac <alarm_pool_add_alarm_in_us>
|
|
1000470c: b004 add sp, #16
|
|
1000470e: bc80 pop {r7}
|
|
10004710: 46b8 mov r8, r7
|
|
10004712: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
10004714 <low_priority_worker_irq>:
|
|
10004714: b510 push {r4, lr}
|
|
10004716: b082 sub sp, #8
|
|
10004718: 4819 ldr r0, [pc, #100] @ (10004780 <low_priority_worker_irq+0x6c>)
|
|
1000471a: 2100 movs r1, #0
|
|
1000471c: f004 fd2c bl 10009178 <__mutex_try_enter_veneer>
|
|
10004720: 2800 cmp r0, #0
|
|
10004722: d122 bne.n 1000476a <low_priority_worker_irq+0x56>
|
|
10004724: 4b17 ldr r3, [pc, #92] @ (10004784 <low_priority_worker_irq+0x70>)
|
|
10004726: 681b ldr r3, [r3, #0]
|
|
10004728: 2b00 cmp r3, #0
|
|
1000472a: d026 beq.n 1000477a <low_priority_worker_irq+0x66>
|
|
1000472c: 4c15 ldr r4, [pc, #84] @ (10004784 <low_priority_worker_irq+0x70>)
|
|
1000472e: 0020 movs r0, r4
|
|
10004730: f7ff ff8a bl 10004648 <critical_section_enter_blocking>
|
|
10004734: 4a14 ldr r2, [pc, #80] @ (10004788 <low_priority_worker_irq+0x74>)
|
|
10004736: 7813 ldrb r3, [r2, #0]
|
|
10004738: 2101 movs r1, #1
|
|
1000473a: 404b eors r3, r1
|
|
1000473c: b2db uxtb r3, r3
|
|
1000473e: 2101 movs r1, #1
|
|
10004740: 7011 strb r1, [r2, #0]
|
|
10004742: 6821 ldr r1, [r4, #0]
|
|
10004744: 6862 ldr r2, [r4, #4]
|
|
10004746: f3bf 8f5f dmb sy
|
|
1000474a: 2000 movs r0, #0
|
|
1000474c: 6008 str r0, [r1, #0]
|
|
1000474e: f382 8810 msr PRIMASK, r2
|
|
10004752: 2b00 cmp r3, #0
|
|
10004754: d011 beq.n 1000477a <low_priority_worker_irq+0x66>
|
|
10004756: 4a0d ldr r2, [pc, #52] @ (1000478c <low_priority_worker_irq+0x78>)
|
|
10004758: 2301 movs r3, #1
|
|
1000475a: 9300 str r3, [sp, #0]
|
|
1000475c: 2300 movs r3, #0
|
|
1000475e: 20fa movs r0, #250 @ 0xfa
|
|
10004760: 0080 lsls r0, r0, #2
|
|
10004762: 2100 movs r1, #0
|
|
10004764: f7ff ffbf bl 100046e6 <add_alarm_in_us>
|
|
10004768: e007 b.n 1000477a <low_priority_worker_irq+0x66>
|
|
1000476a: 2001 movs r0, #1
|
|
1000476c: 2100 movs r1, #0
|
|
1000476e: 4240 negs r0, r0
|
|
10004770: f001 f836 bl 100057e0 <tud_task_ext>
|
|
10004774: 4802 ldr r0, [pc, #8] @ (10004780 <low_priority_worker_irq+0x6c>)
|
|
10004776: f004 fcd7 bl 10009128 <__mutex_exit_veneer>
|
|
1000477a: b002 add sp, #8
|
|
1000477c: bd10 pop {r4, pc}
|
|
1000477e: 46c0 nop @ (mov r8, r8)
|
|
10004780: 20001be4 .word 0x20001be4
|
|
10004784: 20001720 .word 0x20001720
|
|
10004788: 20021d45 .word 0x20021d45
|
|
1000478c: 10004661 .word 0x10004661
|
|
|
|
10004790 <tud_cdc_rx_cb>:
|
|
10004790: b510 push {r4, lr}
|
|
10004792: 4b05 ldr r3, [pc, #20] @ (100047a8 <tud_cdc_rx_cb+0x18>)
|
|
10004794: 6818 ldr r0, [r3, #0]
|
|
10004796: 2800 cmp r0, #0
|
|
10004798: d004 beq.n 100047a4 <tud_cdc_rx_cb+0x14>
|
|
1000479a: 4b04 ldr r3, [pc, #16] @ (100047ac <tud_cdc_rx_cb+0x1c>)
|
|
1000479c: 6819 ldr r1, [r3, #0]
|
|
1000479e: 2200 movs r2, #0
|
|
100047a0: f000 fd48 bl 10005234 <usbd_defer_func>
|
|
100047a4: bd10 pop {r4, pc}
|
|
100047a6: 46c0 nop @ (mov r8, r8)
|
|
100047a8: 2000124c .word 0x2000124c
|
|
100047ac: 20001250 .word 0x20001250
|
|
|
|
100047b0 <stdio_usb_init>:
|
|
100047b0: b510 push {r4, lr}
|
|
100047b2: b082 sub sp, #8
|
|
100047b4: 23d0 movs r3, #208 @ 0xd0
|
|
100047b6: 061b lsls r3, r3, #24
|
|
100047b8: 681c ldr r4, [r3, #0]
|
|
100047ba: f7fd f89f bl 100018fc <alarm_pool_get_default>
|
|
100047be: f7fd f9ad bl 10001b1c <alarm_pool_core_num>
|
|
100047c2: 42a0 cmp r0, r4
|
|
100047c4: d12c bne.n 10004820 <stdio_usb_init+0x70>
|
|
100047c6: 4b23 ldr r3, [pc, #140] @ (10004854 <stdio_usb_init+0xa4>)
|
|
100047c8: 781b ldrb r3, [r3, #0]
|
|
100047ca: f001 fcd7 bl 1000617c <tusb_init>
|
|
100047ce: 4822 ldr r0, [pc, #136] @ (10004858 <stdio_usb_init+0xa8>)
|
|
100047d0: f7fc fd2d bl 1000122e <mutex_init>
|
|
100047d4: 2001 movs r0, #1
|
|
100047d6: f7fc fcb7 bl 10001148 <user_irq_claim_unused>
|
|
100047da: 4c20 ldr r4, [pc, #128] @ (1000485c <stdio_usb_init+0xac>)
|
|
100047dc: 7020 strb r0, [r4, #0]
|
|
100047de: 4920 ldr r1, [pc, #128] @ (10004860 <stdio_usb_init+0xb0>)
|
|
100047e0: 23ff movs r3, #255 @ 0xff
|
|
100047e2: 4018 ands r0, r3
|
|
100047e4: f7fc fa34 bl 10000c50 <irq_set_exclusive_handler>
|
|
100047e8: 7820 ldrb r0, [r4, #0]
|
|
100047ea: 2101 movs r1, #1
|
|
100047ec: f7fc fa06 bl 10000bfc <irq_set_enabled>
|
|
100047f0: 2005 movs r0, #5
|
|
100047f2: f7fc fa1b bl 10000c2c <irq_has_shared_handler>
|
|
100047f6: 1e04 subs r4, r0, #0
|
|
100047f8: d018 beq.n 1000482c <stdio_usb_init+0x7c>
|
|
100047fa: 491a ldr r1, [pc, #104] @ (10004864 <stdio_usb_init+0xb4>)
|
|
100047fc: 2200 movs r2, #0
|
|
100047fe: 2005 movs r0, #5
|
|
10004800: f7fc fa50 bl 10000ca4 <irq_add_shared_handler>
|
|
10004804: f7fb ffc2 bl 1000078c <next_striped_spin_lock_num>
|
|
10004808: 0001 movs r1, r0
|
|
1000480a: 4b17 ldr r3, [pc, #92] @ (10004868 <stdio_usb_init+0xb8>)
|
|
1000480c: 0018 movs r0, r3
|
|
1000480e: f7fc fd2d bl 1000126c <critical_section_init_with_lock_num>
|
|
10004812: 4816 ldr r0, [pc, #88] @ (1000486c <stdio_usb_init+0xbc>)
|
|
10004814: 2101 movs r1, #1
|
|
10004816: f7ff fdbb bl 10004390 <stdio_set_driver_enabled>
|
|
1000481a: 0020 movs r0, r4
|
|
1000481c: b002 add sp, #8
|
|
1000481e: bd10 pop {r4, pc}
|
|
10004820: 4b13 ldr r3, [pc, #76] @ (10004870 <stdio_usb_init+0xc0>)
|
|
10004822: 4a14 ldr r2, [pc, #80] @ (10004874 <stdio_usb_init+0xc4>)
|
|
10004824: 4814 ldr r0, [pc, #80] @ (10004878 <stdio_usb_init+0xc8>)
|
|
10004826: 21b2 movs r1, #178 @ 0xb2
|
|
10004828: f7fd fe2c bl 10002484 <__assert_func>
|
|
1000482c: 4a13 ldr r2, [pc, #76] @ (1000487c <stdio_usb_init+0xcc>)
|
|
1000482e: 2301 movs r3, #1
|
|
10004830: 9300 str r3, [sp, #0]
|
|
10004832: 2300 movs r3, #0
|
|
10004834: 20fa movs r0, #250 @ 0xfa
|
|
10004836: 0080 lsls r0, r0, #2
|
|
10004838: 2100 movs r1, #0
|
|
1000483a: f7ff ff54 bl 100046e6 <add_alarm_in_us>
|
|
1000483e: 43c4 mvns r4, r0
|
|
10004840: 0fe4 lsrs r4, r4, #31
|
|
10004842: 4809 ldr r0, [pc, #36] @ (10004868 <stdio_usb_init+0xb8>)
|
|
10004844: 2208 movs r2, #8
|
|
10004846: 2100 movs r1, #0
|
|
10004848: f7ff fc62 bl 10004110 <__wrap_memset>
|
|
1000484c: 2c00 cmp r4, #0
|
|
1000484e: d0e4 beq.n 1000481a <stdio_usb_init+0x6a>
|
|
10004850: e7df b.n 10004812 <stdio_usb_init+0x62>
|
|
10004852: 46c0 nop @ (mov r8, r8)
|
|
10004854: 1000b350 .word 0x1000b350
|
|
10004858: 20001be4 .word 0x20001be4
|
|
1000485c: 20021d44 .word 0x20021d44
|
|
10004860: 10004715 .word 0x10004715
|
|
10004864: 10004639 .word 0x10004639
|
|
10004868: 20001720 .word 0x20001720
|
|
1000486c: 20000b80 .word 0x20000b80
|
|
10004870: 10009678 .word 0x10009678
|
|
10004874: 1000a460 .word 0x1000a460
|
|
10004878: 1000a3fc .word 0x1000a3fc
|
|
1000487c: 10004661 .word 0x10004661
|
|
|
|
10004880 <stdio_usb_connected>:
|
|
10004880: b510 push {r4, lr}
|
|
10004882: 2000 movs r0, #0
|
|
10004884: f001 f9a4 bl 10005bd0 <tud_cdc_n_connected>
|
|
10004888: bd10 pop {r4, pc}
|
|
...
|
|
|
|
1000488c <stdio_usb_in_chars>:
|
|
1000488c: b530 push {r4, r5, lr}
|
|
1000488e: b083 sub sp, #12
|
|
10004890: 0004 movs r4, r0
|
|
10004892: 000d movs r5, r1
|
|
10004894: f7ff fff4 bl 10004880 <stdio_usb_connected>
|
|
10004898: 2800 cmp r0, #0
|
|
1000489a: d030 beq.n 100048fe <stdio_usb_in_chars+0x72>
|
|
1000489c: 2000 movs r0, #0
|
|
1000489e: f001 f9b3 bl 10005c08 <tud_cdc_n_available>
|
|
100048a2: 2800 cmp r0, #0
|
|
100048a4: d02e beq.n 10004904 <stdio_usb_in_chars+0x78>
|
|
100048a6: 21fa movs r1, #250 @ 0xfa
|
|
100048a8: 0089 lsls r1, r1, #2
|
|
100048aa: 4668 mov r0, sp
|
|
100048ac: f7ff fe9a bl 100045e4 <make_timeout_time_ms>
|
|
100048b0: 9a00 ldr r2, [sp, #0]
|
|
100048b2: 9b01 ldr r3, [sp, #4]
|
|
100048b4: 4816 ldr r0, [pc, #88] @ (10004910 <stdio_usb_in_chars+0x84>)
|
|
100048b6: f004 fc7f bl 100091b8 <__mutex_try_enter_block_until_veneer>
|
|
100048ba: 2800 cmp r0, #0
|
|
100048bc: d025 beq.n 1000490a <stdio_usb_in_chars+0x7e>
|
|
100048be: f7ff ffdf bl 10004880 <stdio_usb_connected>
|
|
100048c2: 2800 cmp r0, #0
|
|
100048c4: d004 beq.n 100048d0 <stdio_usb_in_chars+0x44>
|
|
100048c6: 2000 movs r0, #0
|
|
100048c8: f001 f99e bl 10005c08 <tud_cdc_n_available>
|
|
100048cc: 2800 cmp r0, #0
|
|
100048ce: d10c bne.n 100048ea <stdio_usb_in_chars+0x5e>
|
|
100048d0: 2001 movs r0, #1
|
|
100048d2: 2100 movs r1, #0
|
|
100048d4: 4240 negs r0, r0
|
|
100048d6: f000 ff83 bl 100057e0 <tud_task_ext>
|
|
100048da: 2403 movs r4, #3
|
|
100048dc: 4264 negs r4, r4
|
|
100048de: 480c ldr r0, [pc, #48] @ (10004910 <stdio_usb_in_chars+0x84>)
|
|
100048e0: f004 fc22 bl 10009128 <__mutex_exit_veneer>
|
|
100048e4: 0020 movs r0, r4
|
|
100048e6: b003 add sp, #12
|
|
100048e8: bd30 pop {r4, r5, pc}
|
|
100048ea: 002a movs r2, r5
|
|
100048ec: 0021 movs r1, r4
|
|
100048ee: 2000 movs r0, #0
|
|
100048f0: f001 f996 bl 10005c20 <tud_cdc_n_read>
|
|
100048f4: 1e04 subs r4, r0, #0
|
|
100048f6: d1f2 bne.n 100048de <stdio_usb_in_chars+0x52>
|
|
100048f8: 2403 movs r4, #3
|
|
100048fa: 4264 negs r4, r4
|
|
100048fc: e7ef b.n 100048de <stdio_usb_in_chars+0x52>
|
|
100048fe: 2403 movs r4, #3
|
|
10004900: 4264 negs r4, r4
|
|
10004902: e7ef b.n 100048e4 <stdio_usb_in_chars+0x58>
|
|
10004904: 2403 movs r4, #3
|
|
10004906: 4264 negs r4, r4
|
|
10004908: e7ec b.n 100048e4 <stdio_usb_in_chars+0x58>
|
|
1000490a: 2403 movs r4, #3
|
|
1000490c: 4264 negs r4, r4
|
|
1000490e: e7e9 b.n 100048e4 <stdio_usb_in_chars+0x58>
|
|
10004910: 20001be4 .word 0x20001be4
|
|
|
|
10004914 <stdio_usb_out_chars>:
|
|
10004914: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004916: 46c6 mov lr, r8
|
|
10004918: b500 push {lr}
|
|
1000491a: b082 sub sp, #8
|
|
1000491c: 4680 mov r8, r0
|
|
1000491e: 000d movs r5, r1
|
|
10004920: 21fa movs r1, #250 @ 0xfa
|
|
10004922: 0089 lsls r1, r1, #2
|
|
10004924: 4668 mov r0, sp
|
|
10004926: f7ff fe5d bl 100045e4 <make_timeout_time_ms>
|
|
1000492a: 9a00 ldr r2, [sp, #0]
|
|
1000492c: 9b01 ldr r3, [sp, #4]
|
|
1000492e: 482c ldr r0, [pc, #176] @ (100049e0 <stdio_usb_out_chars+0xcc>)
|
|
10004930: f004 fc42 bl 100091b8 <__mutex_try_enter_block_until_veneer>
|
|
10004934: 2800 cmp r0, #0
|
|
10004936: d103 bne.n 10004940 <stdio_usb_out_chars+0x2c>
|
|
10004938: b002 add sp, #8
|
|
1000493a: bc80 pop {r7}
|
|
1000493c: 46b8 mov r8, r7
|
|
1000493e: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10004940: f7ff ff9e bl 10004880 <stdio_usb_connected>
|
|
10004944: 2800 cmp r0, #0
|
|
10004946: d149 bne.n 100049dc <stdio_usb_out_chars+0xc8>
|
|
10004948: 4b26 ldr r3, [pc, #152] @ (100049e4 <stdio_usb_out_chars+0xd0>)
|
|
1000494a: 2000 movs r0, #0
|
|
1000494c: 2100 movs r1, #0
|
|
1000494e: 6018 str r0, [r3, #0]
|
|
10004950: 6059 str r1, [r3, #4]
|
|
10004952: 4823 ldr r0, [pc, #140] @ (100049e0 <stdio_usb_out_chars+0xcc>)
|
|
10004954: f004 fbe8 bl 10009128 <__mutex_exit_veneer>
|
|
10004958: e7ee b.n 10004938 <stdio_usb_out_chars+0x24>
|
|
1000495a: 2001 movs r0, #1
|
|
1000495c: 2100 movs r1, #0
|
|
1000495e: 4240 negs r0, r0
|
|
10004960: f000 ff3e bl 100057e0 <tud_task_ext>
|
|
10004964: 2000 movs r0, #0
|
|
10004966: f001 f96f bl 10005c48 <tud_cdc_n_write_flush>
|
|
1000496a: f7ff ff89 bl 10004880 <stdio_usb_connected>
|
|
1000496e: 2800 cmp r0, #0
|
|
10004970: d0ef beq.n 10004952 <stdio_usb_out_chars+0x3e>
|
|
10004972: 2000 movs r0, #0
|
|
10004974: f001 f9e0 bl 10005d38 <tud_cdc_n_write_available>
|
|
10004978: 2800 cmp r0, #0
|
|
1000497a: d020 beq.n 100049be <stdio_usb_out_chars+0xaa>
|
|
1000497c: 42ac cmp r4, r5
|
|
1000497e: dae8 bge.n 10004952 <stdio_usb_out_chars+0x3e>
|
|
10004980: 1b2e subs r6, r5, r4
|
|
10004982: 2000 movs r0, #0
|
|
10004984: f001 f9d8 bl 10005d38 <tud_cdc_n_write_available>
|
|
10004988: 0002 movs r2, r0
|
|
1000498a: 4286 cmp r6, r0
|
|
1000498c: dc00 bgt.n 10004990 <stdio_usb_out_chars+0x7c>
|
|
1000498e: 0032 movs r2, r6
|
|
10004990: 2a00 cmp r2, #0
|
|
10004992: d0e2 beq.n 1000495a <stdio_usb_out_chars+0x46>
|
|
10004994: 4643 mov r3, r8
|
|
10004996: 1919 adds r1, r3, r4
|
|
10004998: 2000 movs r0, #0
|
|
1000499a: f001 f9b1 bl 10005d00 <tud_cdc_n_write>
|
|
1000499e: 0006 movs r6, r0
|
|
100049a0: 2001 movs r0, #1
|
|
100049a2: 2100 movs r1, #0
|
|
100049a4: 4240 negs r0, r0
|
|
100049a6: f000 ff1b bl 100057e0 <tud_task_ext>
|
|
100049aa: 2000 movs r0, #0
|
|
100049ac: f001 f94c bl 10005c48 <tud_cdc_n_write_flush>
|
|
100049b0: 19a4 adds r4, r4, r6
|
|
100049b2: f7fd f993 bl 10001cdc <time_us_64>
|
|
100049b6: 4b0b ldr r3, [pc, #44] @ (100049e4 <stdio_usb_out_chars+0xd0>)
|
|
100049b8: 6018 str r0, [r3, #0]
|
|
100049ba: 6059 str r1, [r3, #4]
|
|
100049bc: e7de b.n 1000497c <stdio_usb_out_chars+0x68>
|
|
100049be: f7fd f98d bl 10001cdc <time_us_64>
|
|
100049c2: 4b08 ldr r3, [pc, #32] @ (100049e4 <stdio_usb_out_chars+0xd0>)
|
|
100049c4: 681e ldr r6, [r3, #0]
|
|
100049c6: 685f ldr r7, [r3, #4]
|
|
100049c8: 4a07 ldr r2, [pc, #28] @ (100049e8 <stdio_usb_out_chars+0xd4>)
|
|
100049ca: 2300 movs r3, #0
|
|
100049cc: 1992 adds r2, r2, r6
|
|
100049ce: 417b adcs r3, r7
|
|
100049d0: 4299 cmp r1, r3
|
|
100049d2: d8be bhi.n 10004952 <stdio_usb_out_chars+0x3e>
|
|
100049d4: d1d2 bne.n 1000497c <stdio_usb_out_chars+0x68>
|
|
100049d6: 4290 cmp r0, r2
|
|
100049d8: d9d0 bls.n 1000497c <stdio_usb_out_chars+0x68>
|
|
100049da: e7ba b.n 10004952 <stdio_usb_out_chars+0x3e>
|
|
100049dc: 2400 movs r4, #0
|
|
100049de: e7cd b.n 1000497c <stdio_usb_out_chars+0x68>
|
|
100049e0: 20001be4 .word 0x20001be4
|
|
100049e4: 20000cf0 .word 0x20000cf0
|
|
100049e8: 0007a120 .word 0x0007a120
|
|
|
|
100049ec <tud_descriptor_device_cb>:
|
|
100049ec: 4800 ldr r0, [pc, #0] @ (100049f0 <tud_descriptor_device_cb+0x4>)
|
|
100049ee: 4770 bx lr
|
|
100049f0: 1000a520 .word 0x1000a520
|
|
|
|
100049f4 <tud_descriptor_configuration_cb>:
|
|
100049f4: 4800 ldr r0, [pc, #0] @ (100049f8 <tud_descriptor_configuration_cb+0x4>)
|
|
100049f6: 4770 bx lr
|
|
100049f8: 1000a4cc .word 0x1000a4cc
|
|
|
|
100049fc <tud_descriptor_string_cb>:
|
|
100049fc: b510 push {r4, lr}
|
|
100049fe: 0004 movs r4, r0
|
|
10004a00: 4b15 ldr r3, [pc, #84] @ (10004a58 <tud_descriptor_string_cb+0x5c>)
|
|
10004a02: 781b ldrb r3, [r3, #0]
|
|
10004a04: 2b00 cmp r3, #0
|
|
10004a06: d00e beq.n 10004a26 <tud_descriptor_string_cb+0x2a>
|
|
10004a08: 2c00 cmp r4, #0
|
|
10004a0a: d111 bne.n 10004a30 <tud_descriptor_string_cb+0x34>
|
|
10004a0c: 4b13 ldr r3, [pc, #76] @ (10004a5c <tud_descriptor_string_cb+0x60>)
|
|
10004a0e: 4a14 ldr r2, [pc, #80] @ (10004a60 <tud_descriptor_string_cb+0x64>)
|
|
10004a10: 805a strh r2, [r3, #2]
|
|
10004a12: 2301 movs r3, #1
|
|
10004a14: 3301 adds r3, #1
|
|
10004a16: 005b lsls r3, r3, #1
|
|
10004a18: b29b uxth r3, r3
|
|
10004a1a: 4810 ldr r0, [pc, #64] @ (10004a5c <tud_descriptor_string_cb+0x60>)
|
|
10004a1c: 22c0 movs r2, #192 @ 0xc0
|
|
10004a1e: 0092 lsls r2, r2, #2
|
|
10004a20: 4313 orrs r3, r2
|
|
10004a22: 8003 strh r3, [r0, #0]
|
|
10004a24: bd10 pop {r4, pc}
|
|
10004a26: 480c ldr r0, [pc, #48] @ (10004a58 <tud_descriptor_string_cb+0x5c>)
|
|
10004a28: 2111 movs r1, #17
|
|
10004a2a: f7fb fdf5 bl 10000618 <pico_get_unique_board_id_string>
|
|
10004a2e: e7eb b.n 10004a08 <tud_descriptor_string_cb+0xc>
|
|
10004a30: 2c05 cmp r4, #5
|
|
10004a32: d80e bhi.n 10004a52 <tud_descriptor_string_cb+0x56>
|
|
10004a34: 4b0b ldr r3, [pc, #44] @ (10004a64 <tud_descriptor_string_cb+0x68>)
|
|
10004a36: 00a4 lsls r4, r4, #2
|
|
10004a38: 58e4 ldr r4, [r4, r3]
|
|
10004a3a: 2300 movs r3, #0
|
|
10004a3c: 2b12 cmp r3, #18
|
|
10004a3e: d8e9 bhi.n 10004a14 <tud_descriptor_string_cb+0x18>
|
|
10004a40: 5ce1 ldrb r1, [r4, r3]
|
|
10004a42: 2900 cmp r1, #0
|
|
10004a44: d0e6 beq.n 10004a14 <tud_descriptor_string_cb+0x18>
|
|
10004a46: 3301 adds r3, #1
|
|
10004a48: 4a04 ldr r2, [pc, #16] @ (10004a5c <tud_descriptor_string_cb+0x60>)
|
|
10004a4a: 0058 lsls r0, r3, #1
|
|
10004a4c: 5281 strh r1, [r0, r2]
|
|
10004a4e: b2db uxtb r3, r3
|
|
10004a50: e7f4 b.n 10004a3c <tud_descriptor_string_cb+0x40>
|
|
10004a52: 2000 movs r0, #0
|
|
10004a54: e7e6 b.n 10004a24 <tud_descriptor_string_cb+0x28>
|
|
10004a56: 46c0 nop @ (mov r8, r8)
|
|
10004a58: 20021c00 .word 0x20021c00
|
|
10004a5c: 200012c0 .word 0x200012c0
|
|
10004a60: 00000409 .word 0x00000409
|
|
10004a64: 1000a4b4 .word 0x1000a4b4
|
|
|
|
10004a68 <hw_endpoint_get_by_addr>:
|
|
10004a68: 0002 movs r2, r0
|
|
10004a6a: 207f movs r0, #127 @ 0x7f
|
|
10004a6c: 4010 ands r0, r2
|
|
10004a6e: 09d2 lsrs r2, r2, #7
|
|
10004a70: 0040 lsls r0, r0, #1
|
|
10004a72: 1880 adds r0, r0, r2
|
|
10004a74: 0140 lsls r0, r0, #5
|
|
10004a76: 4b01 ldr r3, [pc, #4] @ (10004a7c <hw_endpoint_get_by_addr+0x14>)
|
|
10004a78: 18c0 adds r0, r0, r3
|
|
10004a7a: 4770 bx lr
|
|
10004a7c: 20001300 .word 0x20001300
|
|
|
|
10004a80 <_hw_endpoint_alloc>:
|
|
10004a80: b510 push {r4, lr}
|
|
10004a82: 8b03 ldrh r3, [r0, #24]
|
|
10004a84: 333f adds r3, #63 @ 0x3f
|
|
10004a86: 223f movs r2, #63 @ 0x3f
|
|
10004a88: 4393 bics r3, r2
|
|
10004a8a: 2902 cmp r1, #2
|
|
10004a8c: d015 beq.n 10004aba <_hw_endpoint_alloc+0x3a>
|
|
10004a8e: 4c12 ldr r4, [pc, #72] @ (10004ad8 <_hw_endpoint_alloc+0x58>)
|
|
10004a90: 6822 ldr r2, [r4, #0]
|
|
10004a92: 60c2 str r2, [r0, #12]
|
|
10004a94: 18d3 adds r3, r2, r3
|
|
10004a96: 6023 str r3, [r4, #0]
|
|
10004a98: 069c lsls r4, r3, #26
|
|
10004a9a: d110 bne.n 10004abe <_hw_endpoint_alloc+0x3e>
|
|
10004a9c: 4c0f ldr r4, [pc, #60] @ (10004adc <_hw_endpoint_alloc+0x5c>)
|
|
10004a9e: 4062 eors r2, r4
|
|
10004aa0: 4063 eors r3, r4
|
|
10004aa2: 2480 movs r4, #128 @ 0x80
|
|
10004aa4: 0164 lsls r4, r4, #5
|
|
10004aa6: 42a3 cmp r3, r4
|
|
10004aa8: d80f bhi.n 10004aca <_hw_endpoint_alloc+0x4a>
|
|
10004aaa: 0689 lsls r1, r1, #26
|
|
10004aac: 4311 orrs r1, r2
|
|
10004aae: 2380 movs r3, #128 @ 0x80
|
|
10004ab0: 061b lsls r3, r3, #24
|
|
10004ab2: 430b orrs r3, r1
|
|
10004ab4: 6842 ldr r2, [r0, #4]
|
|
10004ab6: 6013 str r3, [r2, #0]
|
|
10004ab8: bd10 pop {r4, pc}
|
|
10004aba: 005b lsls r3, r3, #1
|
|
10004abc: e7e7 b.n 10004a8e <_hw_endpoint_alloc+0xe>
|
|
10004abe: 4b08 ldr r3, [pc, #32] @ (10004ae0 <_hw_endpoint_alloc+0x60>)
|
|
10004ac0: 4a08 ldr r2, [pc, #32] @ (10004ae4 <_hw_endpoint_alloc+0x64>)
|
|
10004ac2: 4809 ldr r0, [pc, #36] @ (10004ae8 <_hw_endpoint_alloc+0x68>)
|
|
10004ac4: 2154 movs r1, #84 @ 0x54
|
|
10004ac6: f7fd fcdd bl 10002484 <__assert_func>
|
|
10004aca: 4b08 ldr r3, [pc, #32] @ (10004aec <_hw_endpoint_alloc+0x6c>)
|
|
10004acc: 4a05 ldr r2, [pc, #20] @ (10004ae4 <_hw_endpoint_alloc+0x64>)
|
|
10004ace: 4806 ldr r0, [pc, #24] @ (10004ae8 <_hw_endpoint_alloc+0x68>)
|
|
10004ad0: 2156 movs r1, #86 @ 0x56
|
|
10004ad2: f7fd fcd7 bl 10002484 <__assert_func>
|
|
10004ad6: 46c0 nop @ (mov r8, r8)
|
|
10004ad8: 20001704 .word 0x20001704
|
|
10004adc: 50100000 .word 0x50100000
|
|
10004ae0: 1000a534 .word 0x1000a534
|
|
10004ae4: 1000a64c .word 0x1000a64c
|
|
10004ae8: 1000a564 .word 0x1000a564
|
|
10004aec: 1000a5b8 .word 0x1000a5b8
|
|
|
|
10004af0 <hw_endpoint_init>:
|
|
10004af0: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10004af2: 0005 movs r5, r0
|
|
10004af4: 000e movs r6, r1
|
|
10004af6: 0014 movs r4, r2
|
|
10004af8: f7ff ffb6 bl 10004a68 <hw_endpoint_get_by_addr>
|
|
10004afc: 237f movs r3, #127 @ 0x7f
|
|
10004afe: 402b ands r3, r5
|
|
10004b00: 09ef lsrs r7, r5, #7
|
|
10004b02: 7085 strb r5, [r0, #2]
|
|
10004b04: 427a negs r2, r7
|
|
10004b06: 417a adcs r2, r7
|
|
10004b08: 7042 strb r2, [r0, #1]
|
|
10004b0a: 2200 movs r2, #0
|
|
10004b0c: 70c2 strb r2, [r0, #3]
|
|
10004b0e: 8306 strh r6, [r0, #24]
|
|
10004b10: 76c4 strb r4, [r0, #27]
|
|
10004b12: 2f01 cmp r7, #1
|
|
10004b14: d00d beq.n 10004b32 <hw_endpoint_init+0x42>
|
|
10004b16: 00da lsls r2, r3, #3
|
|
10004b18: 4912 ldr r1, [pc, #72] @ (10004b64 <hw_endpoint_init+0x74>)
|
|
10004b1a: 468c mov ip, r1
|
|
10004b1c: 4462 add r2, ip
|
|
10004b1e: 6082 str r2, [r0, #8]
|
|
10004b20: 6882 ldr r2, [r0, #8]
|
|
10004b22: 2100 movs r1, #0
|
|
10004b24: 6011 str r1, [r2, #0]
|
|
10004b26: 2b00 cmp r3, #0
|
|
10004b28: d109 bne.n 10004b3e <hw_endpoint_init+0x4e>
|
|
10004b2a: 6043 str r3, [r0, #4]
|
|
10004b2c: 4b0e ldr r3, [pc, #56] @ (10004b68 <hw_endpoint_init+0x78>)
|
|
10004b2e: 60c3 str r3, [r0, #12]
|
|
10004b30: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10004b32: 00da lsls r2, r3, #3
|
|
10004b34: 490d ldr r1, [pc, #52] @ (10004b6c <hw_endpoint_init+0x7c>)
|
|
10004b36: 468c mov ip, r1
|
|
10004b38: 4462 add r2, ip
|
|
10004b3a: 6082 str r2, [r0, #8]
|
|
10004b3c: e7f0 b.n 10004b20 <hw_endpoint_init+0x30>
|
|
10004b3e: 2f01 cmp r7, #1
|
|
10004b40: d009 beq.n 10004b56 <hw_endpoint_init+0x66>
|
|
10004b42: 3b01 subs r3, #1
|
|
10004b44: 00db lsls r3, r3, #3
|
|
10004b46: 4a0a ldr r2, [pc, #40] @ (10004b70 <hw_endpoint_init+0x80>)
|
|
10004b48: 4694 mov ip, r2
|
|
10004b4a: 4463 add r3, ip
|
|
10004b4c: 6043 str r3, [r0, #4]
|
|
10004b4e: 0021 movs r1, r4
|
|
10004b50: f7ff ff96 bl 10004a80 <_hw_endpoint_alloc>
|
|
10004b54: e7ec b.n 10004b30 <hw_endpoint_init+0x40>
|
|
10004b56: 3b01 subs r3, #1
|
|
10004b58: 00db lsls r3, r3, #3
|
|
10004b5a: 4a06 ldr r2, [pc, #24] @ (10004b74 <hw_endpoint_init+0x84>)
|
|
10004b5c: 4694 mov ip, r2
|
|
10004b5e: 4463 add r3, ip
|
|
10004b60: 6043 str r3, [r0, #4]
|
|
10004b62: e7f4 b.n 10004b4e <hw_endpoint_init+0x5e>
|
|
10004b64: 50100084 .word 0x50100084
|
|
10004b68: 50100100 .word 0x50100100
|
|
10004b6c: 50100080 .word 0x50100080
|
|
10004b70: 5010000c .word 0x5010000c
|
|
10004b74: 50100008 .word 0x50100008
|
|
|
|
10004b78 <dcd_event_sof>:
|
|
10004b78: b570 push {r4, r5, r6, lr}
|
|
10004b7a: b084 sub sp, #16
|
|
10004b7c: 0006 movs r6, r0
|
|
10004b7e: 000d movs r5, r1
|
|
10004b80: 0014 movs r4, r2
|
|
10004b82: 220c movs r2, #12
|
|
10004b84: 2100 movs r1, #0
|
|
10004b86: a801 add r0, sp, #4
|
|
10004b88: f7ff fac2 bl 10004110 <__wrap_memset>
|
|
10004b8c: 466b mov r3, sp
|
|
10004b8e: 711e strb r6, [r3, #4]
|
|
10004b90: 2303 movs r3, #3
|
|
10004b92: 466a mov r2, sp
|
|
10004b94: 7153 strb r3, [r2, #5]
|
|
10004b96: 9502 str r5, [sp, #8]
|
|
10004b98: 0021 movs r1, r4
|
|
10004b9a: a801 add r0, sp, #4
|
|
10004b9c: f004 fafc bl 10009198 <__dcd_event_handler_veneer>
|
|
10004ba0: b004 add sp, #16
|
|
10004ba2: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10004ba4 <hw_endpoint_xfer>:
|
|
10004ba4: b570 push {r4, r5, r6, lr}
|
|
10004ba6: 000c movs r4, r1
|
|
10004ba8: 0015 movs r5, r2
|
|
10004baa: f7ff ff5d bl 10004a68 <hw_endpoint_get_by_addr>
|
|
10004bae: 002a movs r2, r5
|
|
10004bb0: 0021 movs r1, r4
|
|
10004bb2: f000 f90d bl 10004dd0 <hw_endpoint_xfer_start>
|
|
10004bb6: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10004bb8 <dcd_int_enable>:
|
|
10004bb8: b510 push {r4, lr}
|
|
10004bba: 2800 cmp r0, #0
|
|
10004bbc: d104 bne.n 10004bc8 <dcd_int_enable+0x10>
|
|
10004bbe: 2101 movs r1, #1
|
|
10004bc0: 2005 movs r0, #5
|
|
10004bc2: f7fc f81b bl 10000bfc <irq_set_enabled>
|
|
10004bc6: bd10 pop {r4, pc}
|
|
10004bc8: 4b03 ldr r3, [pc, #12] @ (10004bd8 <dcd_int_enable+0x20>)
|
|
10004bca: 4a04 ldr r2, [pc, #16] @ (10004bdc <dcd_int_enable+0x24>)
|
|
10004bcc: 21d5 movs r1, #213 @ 0xd5
|
|
10004bce: 4804 ldr r0, [pc, #16] @ (10004be0 <dcd_int_enable+0x28>)
|
|
10004bd0: 0049 lsls r1, r1, #1
|
|
10004bd2: f7fd fc57 bl 10002484 <__assert_func>
|
|
10004bd6: 46c0 nop @ (mov r8, r8)
|
|
10004bd8: 1000a600 .word 0x1000a600
|
|
10004bdc: 1000a63c .word 0x1000a63c
|
|
10004be0: 1000a564 .word 0x1000a564
|
|
|
|
10004be4 <dcd_set_address>:
|
|
10004be4: b510 push {r4, lr}
|
|
10004be6: 2800 cmp r0, #0
|
|
10004be8: d105 bne.n 10004bf6 <dcd_set_address+0x12>
|
|
10004bea: 2200 movs r2, #0
|
|
10004bec: 2100 movs r1, #0
|
|
10004bee: 2080 movs r0, #128 @ 0x80
|
|
10004bf0: f7ff ffd8 bl 10004ba4 <hw_endpoint_xfer>
|
|
10004bf4: bd10 pop {r4, pc}
|
|
10004bf6: 4b03 ldr r3, [pc, #12] @ (10004c04 <dcd_set_address+0x20>)
|
|
10004bf8: 4a03 ldr r2, [pc, #12] @ (10004c08 <dcd_set_address+0x24>)
|
|
10004bfa: 21db movs r1, #219 @ 0xdb
|
|
10004bfc: 4803 ldr r0, [pc, #12] @ (10004c0c <dcd_set_address+0x28>)
|
|
10004bfe: 0049 lsls r1, r1, #1
|
|
10004c00: f7fd fc40 bl 10002484 <__assert_func>
|
|
10004c04: 1000a600 .word 0x1000a600
|
|
10004c08: 1000a62c .word 0x1000a62c
|
|
10004c0c: 1000a564 .word 0x1000a564
|
|
|
|
10004c10 <dcd_connect>:
|
|
10004c10: 4b02 ldr r3, [pc, #8] @ (10004c1c <dcd_connect+0xc>)
|
|
10004c12: 2280 movs r2, #128 @ 0x80
|
|
10004c14: 0252 lsls r2, r2, #9
|
|
10004c16: 64da str r2, [r3, #76] @ 0x4c
|
|
10004c18: 4770 bx lr
|
|
10004c1a: 46c0 nop @ (mov r8, r8)
|
|
10004c1c: 50112000 .word 0x50112000
|
|
|
|
10004c20 <dcd_init>:
|
|
10004c20: b570 push {r4, r5, r6, lr}
|
|
10004c22: 1e04 subs r4, r0, #0
|
|
10004c24: d126 bne.n 10004c74 <dcd_init+0x54>
|
|
10004c26: f000 f8ad bl 10004d84 <rp2040_usb_init>
|
|
10004c2a: 4d16 ldr r5, [pc, #88] @ (10004c84 <dcd_init+0x64>)
|
|
10004c2c: 230c movs r3, #12
|
|
10004c2e: 67ab str r3, [r5, #120] @ 0x78
|
|
10004c30: 4915 ldr r1, [pc, #84] @ (10004c88 <dcd_init+0x68>)
|
|
10004c32: 22ff movs r2, #255 @ 0xff
|
|
10004c34: 2005 movs r0, #5
|
|
10004c36: f7fc f835 bl 10000ca4 <irq_add_shared_handler>
|
|
10004c3a: 4814 ldr r0, [pc, #80] @ (10004c8c <dcd_init+0x6c>)
|
|
10004c3c: 2240 movs r2, #64 @ 0x40
|
|
10004c3e: 2100 movs r1, #0
|
|
10004c40: f7ff fa66 bl 10004110 <__wrap_memset>
|
|
10004c44: 2200 movs r2, #0
|
|
10004c46: 2140 movs r1, #64 @ 0x40
|
|
10004c48: 2000 movs r0, #0
|
|
10004c4a: f7ff ff51 bl 10004af0 <hw_endpoint_init>
|
|
10004c4e: 2200 movs r2, #0
|
|
10004c50: 2140 movs r1, #64 @ 0x40
|
|
10004c52: 2080 movs r0, #128 @ 0x80
|
|
10004c54: f7ff ff4c bl 10004af0 <hw_endpoint_init>
|
|
10004c58: f004 fa76 bl 10009148 <__reset_non_control_endpoints_veneer>
|
|
10004c5c: 2301 movs r3, #1
|
|
10004c5e: 642b str r3, [r5, #64] @ 0x40
|
|
10004c60: 2380 movs r3, #128 @ 0x80
|
|
10004c62: 059b lsls r3, r3, #22
|
|
10004c64: 64eb str r3, [r5, #76] @ 0x4c
|
|
10004c66: 2390 movs r3, #144 @ 0x90
|
|
10004c68: 4a09 ldr r2, [pc, #36] @ (10004c90 <dcd_init+0x70>)
|
|
10004c6a: 50ea str r2, [r5, r3]
|
|
10004c6c: 0020 movs r0, r4
|
|
10004c6e: f7ff ffcf bl 10004c10 <dcd_connect>
|
|
10004c72: bd70 pop {r4, r5, r6, pc}
|
|
10004c74: 4b07 ldr r3, [pc, #28] @ (10004c94 <dcd_init+0x74>)
|
|
10004c76: 4a08 ldr r2, [pc, #32] @ (10004c98 <dcd_init+0x78>)
|
|
10004c78: 2186 movs r1, #134 @ 0x86
|
|
10004c7a: 4808 ldr r0, [pc, #32] @ (10004c9c <dcd_init+0x7c>)
|
|
10004c7c: 31ff adds r1, #255 @ 0xff
|
|
10004c7e: f7fd fc01 bl 10002484 <__assert_func>
|
|
10004c82: 46c0 nop @ (mov r8, r8)
|
|
10004c84: 50110000 .word 0x50110000
|
|
10004c88: 20000421 .word 0x20000421
|
|
10004c8c: 20001300 .word 0x20001300
|
|
10004c90: 0001d010 .word 0x0001d010
|
|
10004c94: 1000a600 .word 0x1000a600
|
|
10004c98: 1000a660 .word 0x1000a660
|
|
10004c9c: 1000a564 .word 0x1000a564
|
|
|
|
10004ca0 <dcd_edpt0_status_complete>:
|
|
10004ca0: 780b ldrb r3, [r1, #0]
|
|
10004ca2: 065b lsls r3, r3, #25
|
|
10004ca4: d102 bne.n 10004cac <dcd_edpt0_status_complete+0xc>
|
|
10004ca6: 784b ldrb r3, [r1, #1]
|
|
10004ca8: 2b05 cmp r3, #5
|
|
10004caa: d000 beq.n 10004cae <dcd_edpt0_status_complete+0xe>
|
|
10004cac: 4770 bx lr
|
|
10004cae: 788a ldrb r2, [r1, #2]
|
|
10004cb0: 4b01 ldr r3, [pc, #4] @ (10004cb8 <dcd_edpt0_status_complete+0x18>)
|
|
10004cb2: 601a str r2, [r3, #0]
|
|
10004cb4: e7fa b.n 10004cac <dcd_edpt0_status_complete+0xc>
|
|
10004cb6: 46c0 nop @ (mov r8, r8)
|
|
10004cb8: 50110000 .word 0x50110000
|
|
|
|
10004cbc <dcd_edpt_open>:
|
|
10004cbc: b510 push {r4, lr}
|
|
10004cbe: 000a movs r2, r1
|
|
10004cc0: 2800 cmp r0, #0
|
|
10004cc2: d10d bne.n 10004ce0 <dcd_edpt_open+0x24>
|
|
10004cc4: 7888 ldrb r0, [r1, #2]
|
|
10004cc6: 7909 ldrb r1, [r1, #4]
|
|
10004cc8: 7953 ldrb r3, [r2, #5]
|
|
10004cca: 021b lsls r3, r3, #8
|
|
10004ccc: 430b orrs r3, r1
|
|
10004cce: 055b lsls r3, r3, #21
|
|
10004cd0: 0d59 lsrs r1, r3, #21
|
|
10004cd2: 78d2 ldrb r2, [r2, #3]
|
|
10004cd4: 0792 lsls r2, r2, #30
|
|
10004cd6: 0f92 lsrs r2, r2, #30
|
|
10004cd8: f7ff ff0a bl 10004af0 <hw_endpoint_init>
|
|
10004cdc: 2001 movs r0, #1
|
|
10004cde: bd10 pop {r4, pc}
|
|
10004ce0: 4b03 ldr r3, [pc, #12] @ (10004cf0 <dcd_edpt_open+0x34>)
|
|
10004ce2: 4a04 ldr r2, [pc, #16] @ (10004cf4 <dcd_edpt_open+0x38>)
|
|
10004ce4: 21fc movs r1, #252 @ 0xfc
|
|
10004ce6: 4804 ldr r0, [pc, #16] @ (10004cf8 <dcd_edpt_open+0x3c>)
|
|
10004ce8: 31ff adds r1, #255 @ 0xff
|
|
10004cea: f7fd fbcb bl 10002484 <__assert_func>
|
|
10004cee: 46c0 nop @ (mov r8, r8)
|
|
10004cf0: 1000a600 .word 0x1000a600
|
|
10004cf4: 1000a61c .word 0x1000a61c
|
|
10004cf8: 1000a564 .word 0x1000a564
|
|
|
|
10004cfc <dcd_edpt_close_all>:
|
|
10004cfc: b510 push {r4, lr}
|
|
10004cfe: f004 fa23 bl 10009148 <__reset_non_control_endpoints_veneer>
|
|
10004d02: bd10 pop {r4, pc}
|
|
|
|
10004d04 <dcd_edpt_xfer>:
|
|
10004d04: b510 push {r4, lr}
|
|
10004d06: 0004 movs r4, r0
|
|
10004d08: 0008 movs r0, r1
|
|
10004d0a: 0011 movs r1, r2
|
|
10004d0c: 001a movs r2, r3
|
|
10004d0e: 2c00 cmp r4, #0
|
|
10004d10: d103 bne.n 10004d1a <dcd_edpt_xfer+0x16>
|
|
10004d12: f7ff ff47 bl 10004ba4 <hw_endpoint_xfer>
|
|
10004d16: 2001 movs r0, #1
|
|
10004d18: bd10 pop {r4, pc}
|
|
10004d1a: 4b03 ldr r3, [pc, #12] @ (10004d28 <dcd_edpt_xfer+0x24>)
|
|
10004d1c: 4a03 ldr r2, [pc, #12] @ (10004d2c <dcd_edpt_xfer+0x28>)
|
|
10004d1e: 4804 ldr r0, [pc, #16] @ (10004d30 <dcd_edpt_xfer+0x2c>)
|
|
10004d20: 4904 ldr r1, [pc, #16] @ (10004d34 <dcd_edpt_xfer+0x30>)
|
|
10004d22: f7fd fbaf bl 10002484 <__assert_func>
|
|
10004d26: 46c0 nop @ (mov r8, r8)
|
|
10004d28: 1000a600 .word 0x1000a600
|
|
10004d2c: 1000a60c .word 0x1000a60c
|
|
10004d30: 1000a564 .word 0x1000a564
|
|
10004d34: 0000020a .word 0x0000020a
|
|
|
|
10004d38 <dcd_edpt_stall>:
|
|
10004d38: b510 push {r4, lr}
|
|
10004d3a: 0008 movs r0, r1
|
|
10004d3c: 064b lsls r3, r1, #25
|
|
10004d3e: d105 bne.n 10004d4c <dcd_edpt_stall+0x14>
|
|
10004d40: 09cb lsrs r3, r1, #7
|
|
10004d42: 2b01 cmp r3, #1
|
|
10004d44: d00a beq.n 10004d5c <dcd_edpt_stall+0x24>
|
|
10004d46: 2202 movs r2, #2
|
|
10004d48: 4b05 ldr r3, [pc, #20] @ (10004d60 <dcd_edpt_stall+0x28>)
|
|
10004d4a: 669a str r2, [r3, #104] @ 0x68
|
|
10004d4c: f7ff fe8c bl 10004a68 <hw_endpoint_get_by_addr>
|
|
10004d50: 2280 movs r2, #128 @ 0x80
|
|
10004d52: 0112 lsls r2, r2, #4
|
|
10004d54: 2100 movs r1, #0
|
|
10004d56: f004 fa47 bl 100091e8 <___hw_endpoint_buffer_control_update32_veneer>
|
|
10004d5a: bd10 pop {r4, pc}
|
|
10004d5c: 2201 movs r2, #1
|
|
10004d5e: e7f3 b.n 10004d48 <dcd_edpt_stall+0x10>
|
|
10004d60: 50112000 .word 0x50112000
|
|
|
|
10004d64 <dcd_edpt_clear_stall>:
|
|
10004d64: b510 push {r4, lr}
|
|
10004d66: 0008 movs r0, r1
|
|
10004d68: 064b lsls r3, r1, #25
|
|
10004d6a: d100 bne.n 10004d6e <dcd_edpt_clear_stall+0xa>
|
|
10004d6c: bd10 pop {r4, pc}
|
|
10004d6e: f7ff fe7b bl 10004a68 <hw_endpoint_get_by_addr>
|
|
10004d72: 2300 movs r3, #0
|
|
10004d74: 70c3 strb r3, [r0, #3]
|
|
10004d76: 2200 movs r2, #0
|
|
10004d78: 4901 ldr r1, [pc, #4] @ (10004d80 <dcd_edpt_clear_stall+0x1c>)
|
|
10004d7a: f004 fa35 bl 100091e8 <___hw_endpoint_buffer_control_update32_veneer>
|
|
10004d7e: e7f5 b.n 10004d6c <dcd_edpt_clear_stall+0x8>
|
|
10004d80: fffff7ff .word 0xfffff7ff
|
|
|
|
10004d84 <rp2040_usb_init>:
|
|
10004d84: b510 push {r4, lr}
|
|
10004d86: 2380 movs r3, #128 @ 0x80
|
|
10004d88: 045b lsls r3, r3, #17
|
|
10004d8a: 4a0c ldr r2, [pc, #48] @ (10004dbc <rp2040_usb_init+0x38>)
|
|
10004d8c: 6013 str r3, [r2, #0]
|
|
10004d8e: 4a0c ldr r2, [pc, #48] @ (10004dc0 <rp2040_usb_init+0x3c>)
|
|
10004d90: 6013 str r3, [r2, #0]
|
|
10004d92: 4b0c ldr r3, [pc, #48] @ (10004dc4 <rp2040_usb_init+0x40>)
|
|
10004d94: 689a ldr r2, [r3, #8]
|
|
10004d96: 2380 movs r3, #128 @ 0x80
|
|
10004d98: 045b lsls r3, r3, #17
|
|
10004d9a: 4393 bics r3, r2
|
|
10004d9c: d1f9 bne.n 10004d92 <rp2040_usb_init+0xe>
|
|
10004d9e: 4c0a ldr r4, [pc, #40] @ (10004dc8 <rp2040_usb_init+0x44>)
|
|
10004da0: 229c movs r2, #156 @ 0x9c
|
|
10004da2: 2100 movs r1, #0
|
|
10004da4: 0020 movs r0, r4
|
|
10004da6: f7ff f9b3 bl 10004110 <__wrap_memset>
|
|
10004daa: 2280 movs r2, #128 @ 0x80
|
|
10004dac: 0152 lsls r2, r2, #5
|
|
10004dae: 2100 movs r1, #0
|
|
10004db0: 4806 ldr r0, [pc, #24] @ (10004dcc <rp2040_usb_init+0x48>)
|
|
10004db2: f7ff f9ad bl 10004110 <__wrap_memset>
|
|
10004db6: 2309 movs r3, #9
|
|
10004db8: 6763 str r3, [r4, #116] @ 0x74
|
|
10004dba: bd10 pop {r4, pc}
|
|
10004dbc: 4000e000 .word 0x4000e000
|
|
10004dc0: 4000f000 .word 0x4000f000
|
|
10004dc4: 4000c000 .word 0x4000c000
|
|
10004dc8: 50110000 .word 0x50110000
|
|
10004dcc: 50100000 .word 0x50100000
|
|
|
|
10004dd0 <hw_endpoint_xfer_start>:
|
|
10004dd0: b570 push {r4, r5, r6, lr}
|
|
10004dd2: 0004 movs r4, r0
|
|
10004dd4: 000d movs r5, r1
|
|
10004dd6: 0016 movs r6, r2
|
|
10004dd8: 7e83 ldrb r3, [r0, #26]
|
|
10004dda: 2b00 cmp r3, #0
|
|
10004ddc: d117 bne.n 10004e0e <hw_endpoint_xfer_start+0x3e>
|
|
10004dde: 82a6 strh r6, [r4, #20]
|
|
10004de0: 2300 movs r3, #0
|
|
10004de2: 82e3 strh r3, [r4, #22]
|
|
10004de4: 3301 adds r3, #1
|
|
10004de6: 76a3 strb r3, [r4, #26]
|
|
10004de8: 6125 str r5, [r4, #16]
|
|
10004dea: 0020 movs r0, r4
|
|
10004dec: f004 f9dc bl 100091a8 <__e15_is_bulkin_ep_veneer>
|
|
10004df0: 2800 cmp r0, #0
|
|
10004df2: d004 beq.n 10004dfe <hw_endpoint_xfer_start+0x2e>
|
|
10004df4: 4a09 ldr r2, [pc, #36] @ (10004e1c <hw_endpoint_xfer_start+0x4c>)
|
|
10004df6: 2390 movs r3, #144 @ 0x90
|
|
10004df8: 2180 movs r1, #128 @ 0x80
|
|
10004dfa: 0289 lsls r1, r1, #10
|
|
10004dfc: 50d1 str r1, [r2, r3]
|
|
10004dfe: 0020 movs r0, r4
|
|
10004e00: f004 f9aa bl 10009158 <__e15_is_critical_frame_period_veneer>
|
|
10004e04: 2800 cmp r0, #0
|
|
10004e06: d005 beq.n 10004e14 <hw_endpoint_xfer_start+0x44>
|
|
10004e08: 2301 movs r3, #1
|
|
10004e0a: 7723 strb r3, [r4, #28]
|
|
10004e0c: bd70 pop {r4, r5, r6, pc}
|
|
10004e0e: f004 f9e3 bl 100091d8 <__hw_endpoint_reset_transfer_veneer>
|
|
10004e12: e7e4 b.n 10004dde <hw_endpoint_xfer_start+0xe>
|
|
10004e14: 0020 movs r0, r4
|
|
10004e16: f004 f9d7 bl 100091c8 <__hw_endpoint_start_next_buffer_veneer>
|
|
10004e1a: e7f7 b.n 10004e0c <hw_endpoint_xfer_start+0x3c>
|
|
10004e1c: 50112000 .word 0x50112000
|
|
|
|
10004e20 <configuration_reset>:
|
|
10004e20: b570 push {r4, r5, r6, lr}
|
|
10004e22: 0005 movs r5, r0
|
|
10004e24: 2400 movs r4, #0
|
|
10004e26: e00c b.n 10004e42 <configuration_reset+0x22>
|
|
10004e28: 0062 lsls r2, r4, #1
|
|
10004e2a: 1912 adds r2, r2, r4
|
|
10004e2c: 00d2 lsls r2, r2, #3
|
|
10004e2e: 4b18 ldr r3, [pc, #96] @ (10004e90 <configuration_reset+0x70>)
|
|
10004e30: 681b ldr r3, [r3, #0]
|
|
10004e32: 189b adds r3, r3, r2
|
|
10004e34: 2b00 cmp r3, #0
|
|
10004e36: d02a beq.n 10004e8e <configuration_reset+0x6e>
|
|
10004e38: 685b ldr r3, [r3, #4]
|
|
10004e3a: 0028 movs r0, r5
|
|
10004e3c: 4798 blx r3
|
|
10004e3e: 3401 adds r4, #1
|
|
10004e40: b2e4 uxtb r4, r4
|
|
10004e42: 4b14 ldr r3, [pc, #80] @ (10004e94 <configuration_reset+0x74>)
|
|
10004e44: 781b ldrb r3, [r3, #0]
|
|
10004e46: 42a3 cmp r3, r4
|
|
10004e48: d310 bcc.n 10004e6c <configuration_reset+0x4c>
|
|
10004e4a: 4a13 ldr r2, [pc, #76] @ (10004e98 <configuration_reset+0x78>)
|
|
10004e4c: 2a00 cmp r2, #0
|
|
10004e4e: d00b beq.n 10004e68 <configuration_reset+0x48>
|
|
10004e50: 42a3 cmp r3, r4
|
|
10004e52: d8e9 bhi.n 10004e28 <configuration_reset+0x8>
|
|
10004e54: 1ae3 subs r3, r4, r3
|
|
10004e56: b2db uxtb r3, r3
|
|
10004e58: 2b00 cmp r3, #0
|
|
10004e5a: d118 bne.n 10004e8e <configuration_reset+0x6e>
|
|
10004e5c: 005a lsls r2, r3, #1
|
|
10004e5e: 18d3 adds r3, r2, r3
|
|
10004e60: 00db lsls r3, r3, #3
|
|
10004e62: 4a0e ldr r2, [pc, #56] @ (10004e9c <configuration_reset+0x7c>)
|
|
10004e64: 189b adds r3, r3, r2
|
|
10004e66: e7e7 b.n 10004e38 <configuration_reset+0x18>
|
|
10004e68: 0023 movs r3, r4
|
|
10004e6a: e7f5 b.n 10004e58 <configuration_reset+0x38>
|
|
10004e6c: 4c0c ldr r4, [pc, #48] @ (10004ea0 <configuration_reset+0x80>)
|
|
10004e6e: 2253 movs r2, #83 @ 0x53
|
|
10004e70: 2100 movs r1, #0
|
|
10004e72: 0020 movs r0, r4
|
|
10004e74: f7ff f94c bl 10004110 <__wrap_memset>
|
|
10004e78: 1ce0 adds r0, r4, #3
|
|
10004e7a: 2210 movs r2, #16
|
|
10004e7c: 21ff movs r1, #255 @ 0xff
|
|
10004e7e: f7ff f947 bl 10004110 <__wrap_memset>
|
|
10004e82: 0020 movs r0, r4
|
|
10004e84: 3013 adds r0, #19
|
|
10004e86: 2220 movs r2, #32
|
|
10004e88: 21ff movs r1, #255 @ 0xff
|
|
10004e8a: f7ff f941 bl 10004110 <__wrap_memset>
|
|
10004e8e: bd70 pop {r4, r5, r6, pc}
|
|
10004e90: 20000cf8 .word 0x20000cf8
|
|
10004e94: 20021d3c .word 0x20021d3c
|
|
10004e98: 10004511 .word 0x10004511
|
|
10004e9c: 1000a7f0 .word 0x1000a7f0
|
|
10004ea0: 20001020 .word 0x20001020
|
|
|
|
10004ea4 <critical_section_enter_blocking>:
|
|
10004ea4: 6802 ldr r2, [r0, #0]
|
|
10004ea6: f3ef 8110 mrs r1, PRIMASK
|
|
10004eaa: b672 cpsid i
|
|
10004eac: 6813 ldr r3, [r2, #0]
|
|
10004eae: 2b00 cmp r3, #0
|
|
10004eb0: d0fc beq.n 10004eac <critical_section_enter_blocking+0x8>
|
|
10004eb2: f3bf 8f5f dmb sy
|
|
10004eb6: 6041 str r1, [r0, #4]
|
|
10004eb8: 4770 bx lr
|
|
|
|
10004eba <usbd_reset>:
|
|
10004eba: b510 push {r4, lr}
|
|
10004ebc: f7ff ffb0 bl 10004e20 <configuration_reset>
|
|
10004ec0: f000 fde4 bl 10005a8c <usbd_control_reset>
|
|
10004ec4: bd10 pop {r4, pc}
|
|
|
|
10004ec6 <invoke_class_control>:
|
|
10004ec6: b570 push {r4, r5, r6, lr}
|
|
10004ec8: 0005 movs r5, r0
|
|
10004eca: 000c movs r4, r1
|
|
10004ecc: 0016 movs r6, r2
|
|
10004ece: 68c8 ldr r0, [r1, #12]
|
|
10004ed0: f000 fde6 bl 10005aa0 <usbd_control_set_complete_callback>
|
|
10004ed4: 68e3 ldr r3, [r4, #12]
|
|
10004ed6: 0032 movs r2, r6
|
|
10004ed8: 2101 movs r1, #1
|
|
10004eda: 0028 movs r0, r5
|
|
10004edc: 4798 blx r3
|
|
10004ede: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10004ee0 <process_set_config>:
|
|
10004ee0: b5f0 push {r4, r5, r6, r7, lr}
|
|
10004ee2: 46de mov lr, fp
|
|
10004ee4: 4657 mov r7, sl
|
|
10004ee6: 464e mov r6, r9
|
|
10004ee8: b5c0 push {r6, r7, lr}
|
|
10004eea: b082 sub sp, #8
|
|
10004eec: 9000 str r0, [sp, #0]
|
|
10004eee: 3901 subs r1, #1
|
|
10004ef0: b2c8 uxtb r0, r1
|
|
10004ef2: f7ff fd7f bl 100049f4 <tud_descriptor_configuration_cb>
|
|
10004ef6: 2800 cmp r0, #0
|
|
10004ef8: d100 bne.n 10004efc <process_set_config+0x1c>
|
|
10004efa: e08e b.n 1000501a <process_set_config+0x13a>
|
|
10004efc: 7843 ldrb r3, [r0, #1]
|
|
10004efe: 469a mov sl, r3
|
|
10004f00: 2b02 cmp r3, #2
|
|
10004f02: d000 beq.n 10004f06 <process_set_config+0x26>
|
|
10004f04: e08b b.n 1000501e <process_set_config+0x13e>
|
|
10004f06: 79c5 ldrb r5, [r0, #7]
|
|
10004f08: 116c asrs r4, r5, #5
|
|
10004f0a: 2201 movs r2, #1
|
|
10004f0c: 4b4a ldr r3, [pc, #296] @ (10005038 <process_set_config+0x158>)
|
|
10004f0e: 4014 ands r4, r2
|
|
10004f10: 0124 lsls r4, r4, #4
|
|
10004f12: 7819 ldrb r1, [r3, #0]
|
|
10004f14: 2610 movs r6, #16
|
|
10004f16: 43b1 bics r1, r6
|
|
10004f18: 4321 orrs r1, r4
|
|
10004f1a: 7019 strb r1, [r3, #0]
|
|
10004f1c: 11ad asrs r5, r5, #6
|
|
10004f1e: 402a ands r2, r5
|
|
10004f20: 0152 lsls r2, r2, #5
|
|
10004f22: b2c9 uxtb r1, r1
|
|
10004f24: 2420 movs r4, #32
|
|
10004f26: 43a1 bics r1, r4
|
|
10004f28: 430a orrs r2, r1
|
|
10004f2a: 701a strb r2, [r3, #0]
|
|
10004f2c: 0007 movs r7, r0
|
|
10004f2e: 3709 adds r7, #9
|
|
10004f30: 7882 ldrb r2, [r0, #2]
|
|
10004f32: 78c3 ldrb r3, [r0, #3]
|
|
10004f34: 021b lsls r3, r3, #8
|
|
10004f36: 4313 orrs r3, r2
|
|
10004f38: 18c4 adds r4, r0, r3
|
|
10004f3a: 42a7 cmp r7, r4
|
|
10004f3c: d266 bcs.n 1000500c <process_set_config+0x12c>
|
|
10004f3e: 787b ldrb r3, [r7, #1]
|
|
10004f40: 2b0b cmp r3, #11
|
|
10004f42: d009 beq.n 10004f58 <process_set_config+0x78>
|
|
10004f44: 2301 movs r3, #1
|
|
10004f46: 469b mov fp, r3
|
|
10004f48: 787b ldrb r3, [r7, #1]
|
|
10004f4a: 2b04 cmp r3, #4
|
|
10004f4c: d16e bne.n 1000502c <process_set_config+0x14c>
|
|
10004f4e: 1be3 subs r3, r4, r7
|
|
10004f50: b29b uxth r3, r3
|
|
10004f52: 4699 mov r9, r3
|
|
10004f54: 2500 movs r5, #0
|
|
10004f56: e038 b.n 10004fca <process_set_config+0xea>
|
|
10004f58: 78fb ldrb r3, [r7, #3]
|
|
10004f5a: 469b mov fp, r3
|
|
10004f5c: 783b ldrb r3, [r7, #0]
|
|
10004f5e: 18ff adds r7, r7, r3
|
|
10004f60: e7f2 b.n 10004f48 <process_set_config+0x68>
|
|
10004f62: 006b lsls r3, r5, #1
|
|
10004f64: 195b adds r3, r3, r5
|
|
10004f66: 00db lsls r3, r3, #3
|
|
10004f68: 4a34 ldr r2, [pc, #208] @ (1000503c <process_set_config+0x15c>)
|
|
10004f6a: 6816 ldr r6, [r2, #0]
|
|
10004f6c: 18f6 adds r6, r6, r3
|
|
10004f6e: 2e00 cmp r6, #0
|
|
10004f70: d13d bne.n 10004fee <process_set_config+0x10e>
|
|
10004f72: 2000 movs r0, #0
|
|
10004f74: e054 b.n 10005020 <process_set_config+0x140>
|
|
10004f76: 002b movs r3, r5
|
|
10004f78: e032 b.n 10004fe0 <process_set_config+0x100>
|
|
10004f7a: 68b2 ldr r2, [r6, #8]
|
|
10004f7c: 4b30 ldr r3, [pc, #192] @ (10005040 <process_set_config+0x160>)
|
|
10004f7e: 429a cmp r2, r3
|
|
10004f80: d142 bne.n 10005008 <process_set_config+0x128>
|
|
10004f82: 46d3 mov fp, sl
|
|
10004f84: e040 b.n 10005008 <process_set_config+0x128>
|
|
10004f86: 492c ldr r1, [pc, #176] @ (10005038 <process_set_config+0x158>)
|
|
10004f88: 18cb adds r3, r1, r3
|
|
10004f8a: 70dd strb r5, [r3, #3]
|
|
10004f8c: 3201 adds r2, #1
|
|
10004f8e: b2d2 uxtb r2, r2
|
|
10004f90: 4593 cmp fp, r2
|
|
10004f92: d909 bls.n 10004fa8 <process_set_config+0xc8>
|
|
10004f94: 78bb ldrb r3, [r7, #2]
|
|
10004f96: 189b adds r3, r3, r2
|
|
10004f98: b2db uxtb r3, r3
|
|
10004f9a: 4927 ldr r1, [pc, #156] @ (10005038 <process_set_config+0x158>)
|
|
10004f9c: 18c9 adds r1, r1, r3
|
|
10004f9e: 78c9 ldrb r1, [r1, #3]
|
|
10004fa0: 29ff cmp r1, #255 @ 0xff
|
|
10004fa2: d0f0 beq.n 10004f86 <process_set_config+0xa6>
|
|
10004fa4: 2000 movs r0, #0
|
|
10004fa6: e03b b.n 10005020 <process_set_config+0x140>
|
|
10004fa8: 4826 ldr r0, [pc, #152] @ (10005044 <process_set_config+0x164>)
|
|
10004faa: 002b movs r3, r5
|
|
10004fac: 9e01 ldr r6, [sp, #4]
|
|
10004fae: 0032 movs r2, r6
|
|
10004fb0: 0039 movs r1, r7
|
|
10004fb2: f001 f96f bl 10006294 <tu_edpt_bind_driver>
|
|
10004fb6: 46b4 mov ip, r6
|
|
10004fb8: 4467 add r7, ip
|
|
10004fba: 4b23 ldr r3, [pc, #140] @ (10005048 <process_set_config+0x168>)
|
|
10004fbc: 781b ldrb r3, [r3, #0]
|
|
10004fbe: 42ab cmp r3, r5
|
|
10004fc0: d2bb bcs.n 10004f3a <process_set_config+0x5a>
|
|
10004fc2: 2000 movs r0, #0
|
|
10004fc4: e02c b.n 10005020 <process_set_config+0x140>
|
|
10004fc6: 3501 adds r5, #1
|
|
10004fc8: b2ed uxtb r5, r5
|
|
10004fca: 4b1f ldr r3, [pc, #124] @ (10005048 <process_set_config+0x168>)
|
|
10004fcc: 781b ldrb r3, [r3, #0]
|
|
10004fce: 42ab cmp r3, r5
|
|
10004fd0: d3f3 bcc.n 10004fba <process_set_config+0xda>
|
|
10004fd2: 4a1e ldr r2, [pc, #120] @ (1000504c <process_set_config+0x16c>)
|
|
10004fd4: 2a00 cmp r2, #0
|
|
10004fd6: d0ce beq.n 10004f76 <process_set_config+0x96>
|
|
10004fd8: 42ab cmp r3, r5
|
|
10004fda: d8c2 bhi.n 10004f62 <process_set_config+0x82>
|
|
10004fdc: 1aeb subs r3, r5, r3
|
|
10004fde: b2db uxtb r3, r3
|
|
10004fe0: 2b00 cmp r3, #0
|
|
10004fe2: d125 bne.n 10005030 <process_set_config+0x150>
|
|
10004fe4: 005e lsls r6, r3, #1
|
|
10004fe6: 18f6 adds r6, r6, r3
|
|
10004fe8: 00f6 lsls r6, r6, #3
|
|
10004fea: 4b19 ldr r3, [pc, #100] @ (10005050 <process_set_config+0x170>)
|
|
10004fec: 18f6 adds r6, r6, r3
|
|
10004fee: 68b3 ldr r3, [r6, #8]
|
|
10004ff0: 464a mov r2, r9
|
|
10004ff2: 0039 movs r1, r7
|
|
10004ff4: 9800 ldr r0, [sp, #0]
|
|
10004ff6: 4798 blx r3
|
|
10004ff8: 9001 str r0, [sp, #4]
|
|
10004ffa: 2808 cmp r0, #8
|
|
10004ffc: d9e3 bls.n 10004fc6 <process_set_config+0xe6>
|
|
10004ffe: 4581 cmp r9, r0
|
|
10005000: d3e1 bcc.n 10004fc6 <process_set_config+0xe6>
|
|
10005002: 465b mov r3, fp
|
|
10005004: 2b01 cmp r3, #1
|
|
10005006: d0b8 beq.n 10004f7a <process_set_config+0x9a>
|
|
10005008: 2200 movs r2, #0
|
|
1000500a: e7c1 b.n 10004f90 <process_set_config+0xb0>
|
|
1000500c: 4b11 ldr r3, [pc, #68] @ (10005054 <process_set_config+0x174>)
|
|
1000500e: 2b00 cmp r3, #0
|
|
10005010: d010 beq.n 10005034 <process_set_config+0x154>
|
|
10005012: e000 b.n 10005016 <process_set_config+0x136>
|
|
10005014: bf00 nop
|
|
10005016: 2001 movs r0, #1
|
|
10005018: e002 b.n 10005020 <process_set_config+0x140>
|
|
1000501a: 2000 movs r0, #0
|
|
1000501c: e000 b.n 10005020 <process_set_config+0x140>
|
|
1000501e: 2000 movs r0, #0
|
|
10005020: b002 add sp, #8
|
|
10005022: bce0 pop {r5, r6, r7}
|
|
10005024: 46bb mov fp, r7
|
|
10005026: 46b2 mov sl, r6
|
|
10005028: 46a9 mov r9, r5
|
|
1000502a: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000502c: 2000 movs r0, #0
|
|
1000502e: e7f7 b.n 10005020 <process_set_config+0x140>
|
|
10005030: 2000 movs r0, #0
|
|
10005032: e7f5 b.n 10005020 <process_set_config+0x140>
|
|
10005034: 2001 movs r0, #1
|
|
10005036: e7f3 b.n 10005020 <process_set_config+0x140>
|
|
10005038: 20001020 .word 0x20001020
|
|
1000503c: 20000cf8 .word 0x20000cf8
|
|
10005040: 10005e55 .word 0x10005e55
|
|
10005044: 20001033 .word 0x20001033
|
|
10005048: 20021d3c .word 0x20021d3c
|
|
1000504c: 10004511 .word 0x10004511
|
|
10005050: 1000a7f0 .word 0x1000a7f0
|
|
10005054: 00000000 .word 0x00000000
|
|
|
|
10005058 <process_get_descriptor>:
|
|
10005058: b570 push {r4, r5, r6, lr}
|
|
1000505a: 0005 movs r5, r0
|
|
1000505c: 000c movs r4, r1
|
|
1000505e: 78cb ldrb r3, [r1, #3]
|
|
10005060: 7888 ldrb r0, [r1, #2]
|
|
10005062: 2b0f cmp r3, #15
|
|
10005064: d850 bhi.n 10005108 <process_get_descriptor+0xb0>
|
|
10005066: 009a lsls r2, r3, #2
|
|
10005068: 492e ldr r1, [pc, #184] @ (10005124 <process_get_descriptor+0xcc>)
|
|
1000506a: 588a ldr r2, [r1, r2]
|
|
1000506c: 4697 mov pc, r2
|
|
1000506e: f7ff fcbd bl 100049ec <tud_descriptor_device_cb>
|
|
10005072: 0002 movs r2, r0
|
|
10005074: 2312 movs r3, #18
|
|
10005076: 0021 movs r1, r4
|
|
10005078: 0028 movs r0, r5
|
|
1000507a: f000 fcd3 bl 10005a24 <tud_control_xfer>
|
|
1000507e: e044 b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005080: 4b29 ldr r3, [pc, #164] @ (10005128 <process_get_descriptor+0xd0>)
|
|
10005082: 2b00 cmp r3, #0
|
|
10005084: d042 beq.n 1000510c <process_get_descriptor+0xb4>
|
|
10005086: e000 b.n 1000508a <process_get_descriptor+0x32>
|
|
10005088: bf00 nop
|
|
1000508a: 1e02 subs r2, r0, #0
|
|
1000508c: d040 beq.n 10005110 <process_get_descriptor+0xb8>
|
|
1000508e: 7881 ldrb r1, [r0, #2]
|
|
10005090: 78c3 ldrb r3, [r0, #3]
|
|
10005092: 021b lsls r3, r3, #8
|
|
10005094: 430b orrs r3, r1
|
|
10005096: 0021 movs r1, r4
|
|
10005098: 0028 movs r0, r5
|
|
1000509a: f000 fcc3 bl 10005a24 <tud_control_xfer>
|
|
1000509e: e034 b.n 1000510a <process_get_descriptor+0xb2>
|
|
100050a0: 2b02 cmp r3, #2
|
|
100050a2: d009 beq.n 100050b8 <process_get_descriptor+0x60>
|
|
100050a4: 4b21 ldr r3, [pc, #132] @ (1000512c <process_get_descriptor+0xd4>)
|
|
100050a6: 2b00 cmp r3, #0
|
|
100050a8: d034 beq.n 10005114 <process_get_descriptor+0xbc>
|
|
100050aa: e000 b.n 100050ae <process_get_descriptor+0x56>
|
|
100050ac: bf00 nop
|
|
100050ae: 0002 movs r2, r0
|
|
100050b0: 2a00 cmp r2, #0
|
|
100050b2: d105 bne.n 100050c0 <process_get_descriptor+0x68>
|
|
100050b4: 2000 movs r0, #0
|
|
100050b6: e028 b.n 1000510a <process_get_descriptor+0xb2>
|
|
100050b8: f7ff fc9c bl 100049f4 <tud_descriptor_configuration_cb>
|
|
100050bc: 0002 movs r2, r0
|
|
100050be: e7f7 b.n 100050b0 <process_get_descriptor+0x58>
|
|
100050c0: 7891 ldrb r1, [r2, #2]
|
|
100050c2: 78d3 ldrb r3, [r2, #3]
|
|
100050c4: 021b lsls r3, r3, #8
|
|
100050c6: 430b orrs r3, r1
|
|
100050c8: 0021 movs r1, r4
|
|
100050ca: 0028 movs r0, r5
|
|
100050cc: f000 fcaa bl 10005a24 <tud_control_xfer>
|
|
100050d0: e01b b.n 1000510a <process_get_descriptor+0xb2>
|
|
100050d2: 7923 ldrb r3, [r4, #4]
|
|
100050d4: 7961 ldrb r1, [r4, #5]
|
|
100050d6: 0209 lsls r1, r1, #8
|
|
100050d8: 4319 orrs r1, r3
|
|
100050da: f7ff fc8f bl 100049fc <tud_descriptor_string_cb>
|
|
100050de: 1e02 subs r2, r0, #0
|
|
100050e0: d01a beq.n 10005118 <process_get_descriptor+0xc0>
|
|
100050e2: 7803 ldrb r3, [r0, #0]
|
|
100050e4: 0021 movs r1, r4
|
|
100050e6: 0028 movs r0, r5
|
|
100050e8: f000 fc9c bl 10005a24 <tud_control_xfer>
|
|
100050ec: e00d b.n 1000510a <process_get_descriptor+0xb2>
|
|
100050ee: 4b10 ldr r3, [pc, #64] @ (10005130 <process_get_descriptor+0xd8>)
|
|
100050f0: 2b00 cmp r3, #0
|
|
100050f2: d013 beq.n 1000511c <process_get_descriptor+0xc4>
|
|
100050f4: e000 b.n 100050f8 <process_get_descriptor+0xa0>
|
|
100050f6: bf00 nop
|
|
100050f8: 1e02 subs r2, r0, #0
|
|
100050fa: d011 beq.n 10005120 <process_get_descriptor+0xc8>
|
|
100050fc: 7803 ldrb r3, [r0, #0]
|
|
100050fe: 0021 movs r1, r4
|
|
10005100: 0028 movs r0, r5
|
|
10005102: f000 fc8f bl 10005a24 <tud_control_xfer>
|
|
10005106: e000 b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005108: 2000 movs r0, #0
|
|
1000510a: bd70 pop {r4, r5, r6, pc}
|
|
1000510c: 2000 movs r0, #0
|
|
1000510e: e7fc b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005110: 2000 movs r0, #0
|
|
10005112: e7fa b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005114: 2000 movs r0, #0
|
|
10005116: e7f8 b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005118: 2000 movs r0, #0
|
|
1000511a: e7f6 b.n 1000510a <process_get_descriptor+0xb2>
|
|
1000511c: 2000 movs r0, #0
|
|
1000511e: e7f4 b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005120: 2000 movs r0, #0
|
|
10005122: e7f2 b.n 1000510a <process_get_descriptor+0xb2>
|
|
10005124: 1000a764 .word 0x1000a764
|
|
...
|
|
|
|
10005134 <tud_mounted>:
|
|
10005134: 4b02 ldr r3, [pc, #8] @ (10005140 <tud_mounted+0xc>)
|
|
10005136: 7858 ldrb r0, [r3, #1]
|
|
10005138: 1e43 subs r3, r0, #1
|
|
1000513a: 4198 sbcs r0, r3
|
|
1000513c: b2c0 uxtb r0, r0
|
|
1000513e: 4770 bx lr
|
|
10005140: 20001020 .word 0x20001020
|
|
|
|
10005144 <tud_suspended>:
|
|
10005144: 4b02 ldr r3, [pc, #8] @ (10005150 <tud_suspended+0xc>)
|
|
10005146: 7818 ldrb r0, [r3, #0]
|
|
10005148: 0740 lsls r0, r0, #29
|
|
1000514a: 0fc0 lsrs r0, r0, #31
|
|
1000514c: 4770 bx lr
|
|
1000514e: 46c0 nop @ (mov r8, r8)
|
|
10005150: 20001020 .word 0x20001020
|
|
|
|
10005154 <tud_inited>:
|
|
10005154: 4b03 ldr r3, [pc, #12] @ (10005164 <tud_inited+0x10>)
|
|
10005156: 7818 ldrb r0, [r3, #0]
|
|
10005158: 38ff subs r0, #255 @ 0xff
|
|
1000515a: 1e43 subs r3, r0, #1
|
|
1000515c: 4198 sbcs r0, r3
|
|
1000515e: b2c0 uxtb r0, r0
|
|
10005160: 4770 bx lr
|
|
10005162: 46c0 nop @ (mov r8, r8)
|
|
10005164: 20000bbc .word 0x20000bbc
|
|
|
|
10005168 <tud_init>:
|
|
10005168: b570 push {r4, r5, r6, lr}
|
|
1000516a: 0004 movs r4, r0
|
|
1000516c: f7ff fff2 bl 10005154 <tud_inited>
|
|
10005170: 1e06 subs r6, r0, #0
|
|
10005172: d001 beq.n 10005178 <tud_init+0x10>
|
|
10005174: 0030 movs r0, r6
|
|
10005176: bd70 pop {r4, r5, r6, pc}
|
|
10005178: 4824 ldr r0, [pc, #144] @ (1000520c <tud_init+0xa4>)
|
|
1000517a: 2253 movs r2, #83 @ 0x53
|
|
1000517c: 2100 movs r1, #0
|
|
1000517e: f7fe ffc7 bl 10004110 <__wrap_memset>
|
|
10005182: 4d23 ldr r5, [pc, #140] @ (10005210 <tud_init+0xa8>)
|
|
10005184: 0028 movs r0, r5
|
|
10005186: f7fc f852 bl 1000122e <mutex_init>
|
|
1000518a: 4b22 ldr r3, [pc, #136] @ (10005214 <tud_init+0xac>)
|
|
1000518c: 601d str r5, [r3, #0]
|
|
1000518e: 4d22 ldr r5, [pc, #136] @ (10005218 <tud_init+0xb0>)
|
|
10005190: 0028 movs r0, r5
|
|
10005192: f7fc f875 bl 10001280 <critical_section_init>
|
|
10005196: 3d14 subs r5, #20
|
|
10005198: 0028 movs r0, r5
|
|
1000519a: f001 fbcf bl 1000693c <tu_fifo_clear>
|
|
1000519e: 4b1f ldr r3, [pc, #124] @ (1000521c <tud_init+0xb4>)
|
|
100051a0: 601d str r5, [r3, #0]
|
|
100051a2: 4b1f ldr r3, [pc, #124] @ (10005220 <tud_init+0xb8>)
|
|
100051a4: 2b00 cmp r3, #0
|
|
100051a6: d004 beq.n 100051b2 <tud_init+0x4a>
|
|
100051a8: 481e ldr r0, [pc, #120] @ (10005224 <tud_init+0xbc>)
|
|
100051aa: f7ff f9b1 bl 10004510 <usbd_app_driver_get_cb>
|
|
100051ae: 4b1e ldr r3, [pc, #120] @ (10005228 <tud_init+0xc0>)
|
|
100051b0: 6018 str r0, [r3, #0]
|
|
100051b2: 2500 movs r5, #0
|
|
100051b4: e00b b.n 100051ce <tud_init+0x66>
|
|
100051b6: 006a lsls r2, r5, #1
|
|
100051b8: 1952 adds r2, r2, r5
|
|
100051ba: 00d2 lsls r2, r2, #3
|
|
100051bc: 4b1a ldr r3, [pc, #104] @ (10005228 <tud_init+0xc0>)
|
|
100051be: 681b ldr r3, [r3, #0]
|
|
100051c0: 189b adds r3, r3, r2
|
|
100051c2: 2b00 cmp r3, #0
|
|
100051c4: d0d6 beq.n 10005174 <tud_init+0xc>
|
|
100051c6: 681b ldr r3, [r3, #0]
|
|
100051c8: 4798 blx r3
|
|
100051ca: 3501 adds r5, #1
|
|
100051cc: b2ed uxtb r5, r5
|
|
100051ce: 4b15 ldr r3, [pc, #84] @ (10005224 <tud_init+0xbc>)
|
|
100051d0: 781b ldrb r3, [r3, #0]
|
|
100051d2: 42ab cmp r3, r5
|
|
100051d4: d310 bcc.n 100051f8 <tud_init+0x90>
|
|
100051d6: 4a12 ldr r2, [pc, #72] @ (10005220 <tud_init+0xb8>)
|
|
100051d8: 2a00 cmp r2, #0
|
|
100051da: d00b beq.n 100051f4 <tud_init+0x8c>
|
|
100051dc: 42ab cmp r3, r5
|
|
100051de: d8ea bhi.n 100051b6 <tud_init+0x4e>
|
|
100051e0: 1aeb subs r3, r5, r3
|
|
100051e2: b2db uxtb r3, r3
|
|
100051e4: 2b00 cmp r3, #0
|
|
100051e6: d1c5 bne.n 10005174 <tud_init+0xc>
|
|
100051e8: 005a lsls r2, r3, #1
|
|
100051ea: 18d3 adds r3, r2, r3
|
|
100051ec: 00db lsls r3, r3, #3
|
|
100051ee: 4a0f ldr r2, [pc, #60] @ (1000522c <tud_init+0xc4>)
|
|
100051f0: 189b adds r3, r3, r2
|
|
100051f2: e7e8 b.n 100051c6 <tud_init+0x5e>
|
|
100051f4: 002b movs r3, r5
|
|
100051f6: e7f5 b.n 100051e4 <tud_init+0x7c>
|
|
100051f8: 4b0d ldr r3, [pc, #52] @ (10005230 <tud_init+0xc8>)
|
|
100051fa: 701c strb r4, [r3, #0]
|
|
100051fc: 0020 movs r0, r4
|
|
100051fe: f7ff fd0f bl 10004c20 <dcd_init>
|
|
10005202: 0020 movs r0, r4
|
|
10005204: f7ff fcd8 bl 10004bb8 <dcd_int_enable>
|
|
10005208: 2601 movs r6, #1
|
|
1000520a: e7b3 b.n 10005174 <tud_init+0xc>
|
|
1000520c: 20001020 .word 0x20001020
|
|
10005210: 20000fd8 .word 0x20000fd8
|
|
10005214: 20001074 .word 0x20001074
|
|
10005218: 20000bb4 .word 0x20000bb4
|
|
1000521c: 20001078 .word 0x20001078
|
|
10005220: 10004511 .word 0x10004511
|
|
10005224: 20021d3c .word 0x20021d3c
|
|
10005228: 20000cf8 .word 0x20000cf8
|
|
1000522c: 1000a7f0 .word 0x1000a7f0
|
|
10005230: 20000bbc .word 0x20000bbc
|
|
|
|
10005234 <usbd_defer_func>:
|
|
10005234: b5f0 push {r4, r5, r6, r7, lr}
|
|
10005236: b085 sub sp, #20
|
|
10005238: 0007 movs r7, r0
|
|
1000523a: 000e movs r6, r1
|
|
1000523c: 0015 movs r5, r2
|
|
1000523e: ac01 add r4, sp, #4
|
|
10005240: 220c movs r2, #12
|
|
10005242: 2100 movs r1, #0
|
|
10005244: 0020 movs r0, r4
|
|
10005246: f7fe ff63 bl 10004110 <__wrap_memset>
|
|
1000524a: 2308 movs r3, #8
|
|
1000524c: 7063 strb r3, [r4, #1]
|
|
1000524e: 9702 str r7, [sp, #8]
|
|
10005250: 9603 str r6, [sp, #12]
|
|
10005252: 0029 movs r1, r5
|
|
10005254: 0020 movs r0, r4
|
|
10005256: f003 ff9f bl 10009198 <__dcd_event_handler_veneer>
|
|
1000525a: b005 add sp, #20
|
|
1000525c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
10005260 <usbd_edpt_open>:
|
|
10005260: b570 push {r4, r5, r6, lr}
|
|
10005262: 000c movs r4, r1
|
|
10005264: 4b09 ldr r3, [pc, #36] @ (1000528c <usbd_edpt_open+0x2c>)
|
|
10005266: 781d ldrb r5, [r3, #0]
|
|
10005268: 788b ldrb r3, [r1, #2]
|
|
1000526a: 2270 movs r2, #112 @ 0x70
|
|
1000526c: 421a tst r2, r3
|
|
1000526e: d001 beq.n 10005274 <usbd_edpt_open+0x14>
|
|
10005270: 2000 movs r0, #0
|
|
10005272: bd70 pop {r4, r5, r6, pc}
|
|
10005274: 4b06 ldr r3, [pc, #24] @ (10005290 <usbd_edpt_open+0x30>)
|
|
10005276: 7899 ldrb r1, [r3, #2]
|
|
10005278: 0020 movs r0, r4
|
|
1000527a: f000 ffcf bl 1000621c <tu_edpt_validate>
|
|
1000527e: 2800 cmp r0, #0
|
|
10005280: d0f7 beq.n 10005272 <usbd_edpt_open+0x12>
|
|
10005282: 0021 movs r1, r4
|
|
10005284: 0028 movs r0, r5
|
|
10005286: f7ff fd19 bl 10004cbc <dcd_edpt_open>
|
|
1000528a: e7f2 b.n 10005272 <usbd_edpt_open+0x12>
|
|
1000528c: 20000bbc .word 0x20000bbc
|
|
10005290: 20001020 .word 0x20001020
|
|
|
|
10005294 <usbd_open_edpt_pair>:
|
|
10005294: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10005296: 46ce mov lr, r9
|
|
10005298: 4647 mov r7, r8
|
|
1000529a: b580 push {r7, lr}
|
|
1000529c: 4681 mov r9, r0
|
|
1000529e: 000c movs r4, r1
|
|
100052a0: 0017 movs r7, r2
|
|
100052a2: 001e movs r6, r3
|
|
100052a4: 9b08 ldr r3, [sp, #32]
|
|
100052a6: 4698 mov r8, r3
|
|
100052a8: 2500 movs r5, #0
|
|
100052aa: e004 b.n 100052b6 <usbd_open_edpt_pair+0x22>
|
|
100052ac: 9a09 ldr r2, [sp, #36] @ 0x24
|
|
100052ae: 7013 strb r3, [r2, #0]
|
|
100052b0: 7823 ldrb r3, [r4, #0]
|
|
100052b2: 18e4 adds r4, r4, r3
|
|
100052b4: 3501 adds r5, #1
|
|
100052b6: 42af cmp r7, r5
|
|
100052b8: dd14 ble.n 100052e4 <usbd_open_edpt_pair+0x50>
|
|
100052ba: 7863 ldrb r3, [r4, #1]
|
|
100052bc: 2b05 cmp r3, #5
|
|
100052be: d116 bne.n 100052ee <usbd_open_edpt_pair+0x5a>
|
|
100052c0: 78e1 ldrb r1, [r4, #3]
|
|
100052c2: 0789 lsls r1, r1, #30
|
|
100052c4: 0f89 lsrs r1, r1, #30
|
|
100052c6: 42b1 cmp r1, r6
|
|
100052c8: d113 bne.n 100052f2 <usbd_open_edpt_pair+0x5e>
|
|
100052ca: 0021 movs r1, r4
|
|
100052cc: 4648 mov r0, r9
|
|
100052ce: f7ff ffc7 bl 10005260 <usbd_edpt_open>
|
|
100052d2: 2800 cmp r0, #0
|
|
100052d4: d007 beq.n 100052e6 <usbd_open_edpt_pair+0x52>
|
|
100052d6: 78a3 ldrb r3, [r4, #2]
|
|
100052d8: 09da lsrs r2, r3, #7
|
|
100052da: 2a01 cmp r2, #1
|
|
100052dc: d0e6 beq.n 100052ac <usbd_open_edpt_pair+0x18>
|
|
100052de: 4642 mov r2, r8
|
|
100052e0: 7013 strb r3, [r2, #0]
|
|
100052e2: e7e5 b.n 100052b0 <usbd_open_edpt_pair+0x1c>
|
|
100052e4: 2001 movs r0, #1
|
|
100052e6: bcc0 pop {r6, r7}
|
|
100052e8: 46b9 mov r9, r7
|
|
100052ea: 46b0 mov r8, r6
|
|
100052ec: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100052ee: 2000 movs r0, #0
|
|
100052f0: e7f9 b.n 100052e6 <usbd_open_edpt_pair+0x52>
|
|
100052f2: 2000 movs r0, #0
|
|
100052f4: e7f7 b.n 100052e6 <usbd_open_edpt_pair+0x52>
|
|
...
|
|
|
|
100052f8 <usbd_edpt_claim>:
|
|
100052f8: b510 push {r4, lr}
|
|
100052fa: 207f movs r0, #127 @ 0x7f
|
|
100052fc: 4008 ands r0, r1
|
|
100052fe: 09c9 lsrs r1, r1, #7
|
|
10005300: 0040 lsls r0, r0, #1
|
|
10005302: 1840 adds r0, r0, r1
|
|
10005304: 3030 adds r0, #48 @ 0x30
|
|
10005306: 4b04 ldr r3, [pc, #16] @ (10005318 <usbd_edpt_claim+0x20>)
|
|
10005308: 18c0 adds r0, r0, r3
|
|
1000530a: 3003 adds r0, #3
|
|
1000530c: 4b03 ldr r3, [pc, #12] @ (1000531c <usbd_edpt_claim+0x24>)
|
|
1000530e: 6819 ldr r1, [r3, #0]
|
|
10005310: f000 ff40 bl 10006194 <tu_edpt_claim>
|
|
10005314: bd10 pop {r4, pc}
|
|
10005316: 46c0 nop @ (mov r8, r8)
|
|
10005318: 20001020 .word 0x20001020
|
|
1000531c: 20001074 .word 0x20001074
|
|
|
|
10005320 <usbd_edpt_release>:
|
|
10005320: b510 push {r4, lr}
|
|
10005322: 207f movs r0, #127 @ 0x7f
|
|
10005324: 4008 ands r0, r1
|
|
10005326: 09c9 lsrs r1, r1, #7
|
|
10005328: 0040 lsls r0, r0, #1
|
|
1000532a: 1840 adds r0, r0, r1
|
|
1000532c: 3030 adds r0, #48 @ 0x30
|
|
1000532e: 4b04 ldr r3, [pc, #16] @ (10005340 <usbd_edpt_release+0x20>)
|
|
10005330: 18c0 adds r0, r0, r3
|
|
10005332: 3003 adds r0, #3
|
|
10005334: 4b03 ldr r3, [pc, #12] @ (10005344 <usbd_edpt_release+0x24>)
|
|
10005336: 6819 ldr r1, [r3, #0]
|
|
10005338: f000 ff54 bl 100061e4 <tu_edpt_release>
|
|
1000533c: bd10 pop {r4, pc}
|
|
1000533e: 46c0 nop @ (mov r8, r8)
|
|
10005340: 20001020 .word 0x20001020
|
|
10005344: 20001074 .word 0x20001074
|
|
|
|
10005348 <usbd_edpt_xfer>:
|
|
10005348: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000534a: 46ce mov lr, r9
|
|
1000534c: 4647 mov r7, r8
|
|
1000534e: b580 push {r7, lr}
|
|
10005350: 4819 ldr r0, [pc, #100] @ (100053b8 <usbd_edpt_xfer+0x70>)
|
|
10005352: 7800 ldrb r0, [r0, #0]
|
|
10005354: 257f movs r5, #127 @ 0x7f
|
|
10005356: 400d ands r5, r1
|
|
10005358: 09ce lsrs r6, r1, #7
|
|
1000535a: 4c18 ldr r4, [pc, #96] @ (100053bc <usbd_edpt_xfer+0x74>)
|
|
1000535c: 006f lsls r7, r5, #1
|
|
1000535e: 19e4 adds r4, r4, r7
|
|
10005360: 19a4 adds r4, r4, r6
|
|
10005362: 3430 adds r4, #48 @ 0x30
|
|
10005364: 78e4 ldrb r4, [r4, #3]
|
|
10005366: 07e4 lsls r4, r4, #31
|
|
10005368: d504 bpl.n 10005374 <usbd_edpt_xfer+0x2c>
|
|
1000536a: 2000 movs r0, #0
|
|
1000536c: bcc0 pop {r6, r7}
|
|
1000536e: 46b9 mov r9, r7
|
|
10005370: 46b0 mov r8, r6
|
|
10005372: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
10005374: 4c11 ldr r4, [pc, #68] @ (100053bc <usbd_edpt_xfer+0x74>)
|
|
10005376: 19e4 adds r4, r4, r7
|
|
10005378: 19a4 adds r4, r4, r6
|
|
1000537a: 2730 movs r7, #48 @ 0x30
|
|
1000537c: 46b9 mov r9, r7
|
|
1000537e: 44a1 add r9, r4
|
|
10005380: 464c mov r4, r9
|
|
10005382: 78e4 ldrb r4, [r4, #3]
|
|
10005384: 2701 movs r7, #1
|
|
10005386: 46bc mov ip, r7
|
|
10005388: 4667 mov r7, ip
|
|
1000538a: 433c orrs r4, r7
|
|
1000538c: 0027 movs r7, r4
|
|
1000538e: 464c mov r4, r9
|
|
10005390: 70e7 strb r7, [r4, #3]
|
|
10005392: f7ff fcb7 bl 10004d04 <dcd_edpt_xfer>
|
|
10005396: 2800 cmp r0, #0
|
|
10005398: d1e8 bne.n 1000536c <usbd_edpt_xfer+0x24>
|
|
1000539a: 4b08 ldr r3, [pc, #32] @ (100053bc <usbd_edpt_xfer+0x74>)
|
|
1000539c: 006d lsls r5, r5, #1
|
|
1000539e: 195b adds r3, r3, r5
|
|
100053a0: 199b adds r3, r3, r6
|
|
100053a2: 3330 adds r3, #48 @ 0x30
|
|
100053a4: 78da ldrb r2, [r3, #3]
|
|
100053a6: 2101 movs r1, #1
|
|
100053a8: 438a bics r2, r1
|
|
100053aa: 70da strb r2, [r3, #3]
|
|
100053ac: 78da ldrb r2, [r3, #3]
|
|
100053ae: 3103 adds r1, #3
|
|
100053b0: 438a bics r2, r1
|
|
100053b2: 70da strb r2, [r3, #3]
|
|
100053b4: e7da b.n 1000536c <usbd_edpt_xfer+0x24>
|
|
100053b6: 46c0 nop @ (mov r8, r8)
|
|
100053b8: 20000bbc .word 0x20000bbc
|
|
100053bc: 20001020 .word 0x20001020
|
|
|
|
100053c0 <usbd_edpt_stall>:
|
|
100053c0: b570 push {r4, r5, r6, lr}
|
|
100053c2: 4b0f ldr r3, [pc, #60] @ (10005400 <usbd_edpt_stall+0x40>)
|
|
100053c4: 7818 ldrb r0, [r3, #0]
|
|
100053c6: 247f movs r4, #127 @ 0x7f
|
|
100053c8: 400c ands r4, r1
|
|
100053ca: 09cd lsrs r5, r1, #7
|
|
100053cc: 4b0d ldr r3, [pc, #52] @ (10005404 <usbd_edpt_stall+0x44>)
|
|
100053ce: 0062 lsls r2, r4, #1
|
|
100053d0: 189b adds r3, r3, r2
|
|
100053d2: 195b adds r3, r3, r5
|
|
100053d4: 3330 adds r3, #48 @ 0x30
|
|
100053d6: 78db ldrb r3, [r3, #3]
|
|
100053d8: 079b lsls r3, r3, #30
|
|
100053da: d500 bpl.n 100053de <usbd_edpt_stall+0x1e>
|
|
100053dc: bd70 pop {r4, r5, r6, pc}
|
|
100053de: f7ff fcab bl 10004d38 <dcd_edpt_stall>
|
|
100053e2: 4b08 ldr r3, [pc, #32] @ (10005404 <usbd_edpt_stall+0x44>)
|
|
100053e4: 0064 lsls r4, r4, #1
|
|
100053e6: 191b adds r3, r3, r4
|
|
100053e8: 195b adds r3, r3, r5
|
|
100053ea: 3330 adds r3, #48 @ 0x30
|
|
100053ec: 78da ldrb r2, [r3, #3]
|
|
100053ee: 2102 movs r1, #2
|
|
100053f0: 430a orrs r2, r1
|
|
100053f2: 70da strb r2, [r3, #3]
|
|
100053f4: 78da ldrb r2, [r3, #3]
|
|
100053f6: 2101 movs r1, #1
|
|
100053f8: 430a orrs r2, r1
|
|
100053fa: 70da strb r2, [r3, #3]
|
|
100053fc: e7ee b.n 100053dc <usbd_edpt_stall+0x1c>
|
|
100053fe: 46c0 nop @ (mov r8, r8)
|
|
10005400: 20000bbc .word 0x20000bbc
|
|
10005404: 20001020 .word 0x20001020
|
|
|
|
10005408 <usbd_edpt_clear_stall>:
|
|
10005408: b570 push {r4, r5, r6, lr}
|
|
1000540a: 4b0f ldr r3, [pc, #60] @ (10005448 <usbd_edpt_clear_stall+0x40>)
|
|
1000540c: 7818 ldrb r0, [r3, #0]
|
|
1000540e: 247f movs r4, #127 @ 0x7f
|
|
10005410: 400c ands r4, r1
|
|
10005412: 09cd lsrs r5, r1, #7
|
|
10005414: 4b0d ldr r3, [pc, #52] @ (1000544c <usbd_edpt_clear_stall+0x44>)
|
|
10005416: 0062 lsls r2, r4, #1
|
|
10005418: 189b adds r3, r3, r2
|
|
1000541a: 195b adds r3, r3, r5
|
|
1000541c: 3330 adds r3, #48 @ 0x30
|
|
1000541e: 78db ldrb r3, [r3, #3]
|
|
10005420: 079b lsls r3, r3, #30
|
|
10005422: d400 bmi.n 10005426 <usbd_edpt_clear_stall+0x1e>
|
|
10005424: bd70 pop {r4, r5, r6, pc}
|
|
10005426: f7ff fc9d bl 10004d64 <dcd_edpt_clear_stall>
|
|
1000542a: 4b08 ldr r3, [pc, #32] @ (1000544c <usbd_edpt_clear_stall+0x44>)
|
|
1000542c: 0064 lsls r4, r4, #1
|
|
1000542e: 191b adds r3, r3, r4
|
|
10005430: 195b adds r3, r3, r5
|
|
10005432: 3330 adds r3, #48 @ 0x30
|
|
10005434: 78da ldrb r2, [r3, #3]
|
|
10005436: 2102 movs r1, #2
|
|
10005438: 438a bics r2, r1
|
|
1000543a: 70da strb r2, [r3, #3]
|
|
1000543c: 78da ldrb r2, [r3, #3]
|
|
1000543e: 3901 subs r1, #1
|
|
10005440: 438a bics r2, r1
|
|
10005442: 70da strb r2, [r3, #3]
|
|
10005444: e7ee b.n 10005424 <usbd_edpt_clear_stall+0x1c>
|
|
10005446: 46c0 nop @ (mov r8, r8)
|
|
10005448: 20000bbc .word 0x20000bbc
|
|
1000544c: 20001020 .word 0x20001020
|
|
|
|
10005450 <usbd_edpt_stalled>:
|
|
10005450: 227f movs r2, #127 @ 0x7f
|
|
10005452: 400a ands r2, r1
|
|
10005454: 09c9 lsrs r1, r1, #7
|
|
10005456: 4b04 ldr r3, [pc, #16] @ (10005468 <usbd_edpt_stalled+0x18>)
|
|
10005458: 0052 lsls r2, r2, #1
|
|
1000545a: 189b adds r3, r3, r2
|
|
1000545c: 185b adds r3, r3, r1
|
|
1000545e: 3330 adds r3, #48 @ 0x30
|
|
10005460: 78d8 ldrb r0, [r3, #3]
|
|
10005462: 0780 lsls r0, r0, #30
|
|
10005464: 0fc0 lsrs r0, r0, #31
|
|
10005466: 4770 bx lr
|
|
10005468: 20001020 .word 0x20001020
|
|
|
|
1000546c <process_control_request>:
|
|
1000546c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000546e: 46c6 mov lr, r8
|
|
10005470: b500 push {lr}
|
|
10005472: b082 sub sp, #8
|
|
10005474: 0005 movs r5, r0
|
|
10005476: 000c movs r4, r1
|
|
10005478: 2000 movs r0, #0
|
|
1000547a: f000 fb11 bl 10005aa0 <usbd_control_set_complete_callback>
|
|
1000547e: 7822 ldrb r2, [r4, #0]
|
|
10005480: 2360 movs r3, #96 @ 0x60
|
|
10005482: 4013 ands r3, r2
|
|
10005484: 2b60 cmp r3, #96 @ 0x60
|
|
10005486: d100 bne.n 1000548a <process_control_request+0x1e>
|
|
10005488: e185 b.n 10005796 <process_control_request+0x32a>
|
|
1000548a: 2b40 cmp r3, #64 @ 0x40
|
|
1000548c: d00f beq.n 100054ae <process_control_request+0x42>
|
|
1000548e: 7822 ldrb r2, [r4, #0]
|
|
10005490: 06d2 lsls r2, r2, #27
|
|
10005492: 0ed2 lsrs r2, r2, #27
|
|
10005494: 2a01 cmp r2, #1
|
|
10005496: d100 bne.n 1000549a <process_control_request+0x2e>
|
|
10005498: e0c9 b.n 1000562e <process_control_request+0x1c2>
|
|
1000549a: 2a02 cmp r2, #2
|
|
1000549c: d100 bne.n 100054a0 <process_control_request+0x34>
|
|
1000549e: e10f b.n 100056c0 <process_control_request+0x254>
|
|
100054a0: 2a00 cmp r2, #0
|
|
100054a2: d011 beq.n 100054c8 <process_control_request+0x5c>
|
|
100054a4: 2000 movs r0, #0
|
|
100054a6: b002 add sp, #8
|
|
100054a8: bc80 pop {r7}
|
|
100054aa: 46b8 mov r8, r7
|
|
100054ac: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100054ae: 4bc5 ldr r3, [pc, #788] @ (100057c4 <process_control_request+0x358>)
|
|
100054b0: 2b00 cmp r3, #0
|
|
100054b2: d100 bne.n 100054b6 <process_control_request+0x4a>
|
|
100054b4: e171 b.n 1000579a <process_control_request+0x32e>
|
|
100054b6: 0018 movs r0, r3
|
|
100054b8: f000 faf2 bl 10005aa0 <usbd_control_set_complete_callback>
|
|
100054bc: 0022 movs r2, r4
|
|
100054be: 2101 movs r1, #1
|
|
100054c0: 0028 movs r0, r5
|
|
100054c2: e000 b.n 100054c6 <process_control_request+0x5a>
|
|
100054c4: bf00 nop
|
|
100054c6: e7ee b.n 100054a6 <process_control_request+0x3a>
|
|
100054c8: 2b20 cmp r3, #32
|
|
100054ca: d00a beq.n 100054e2 <process_control_request+0x76>
|
|
100054cc: 2b00 cmp r3, #0
|
|
100054ce: d000 beq.n 100054d2 <process_control_request+0x66>
|
|
100054d0: e169 b.n 100057a6 <process_control_request+0x33a>
|
|
100054d2: 7863 ldrb r3, [r4, #1]
|
|
100054d4: 2b09 cmp r3, #9
|
|
100054d6: d900 bls.n 100054da <process_control_request+0x6e>
|
|
100054d8: e167 b.n 100057aa <process_control_request+0x33e>
|
|
100054da: 009b lsls r3, r3, #2
|
|
100054dc: 4aba ldr r2, [pc, #744] @ (100057c8 <process_control_request+0x35c>)
|
|
100054de: 58d3 ldr r3, [r2, r3]
|
|
100054e0: 469f mov pc, r3
|
|
100054e2: 7923 ldrb r3, [r4, #4]
|
|
100054e4: 2b0f cmp r3, #15
|
|
100054e6: d900 bls.n 100054ea <process_control_request+0x7e>
|
|
100054e8: e159 b.n 1000579e <process_control_request+0x332>
|
|
100054ea: 4ab8 ldr r2, [pc, #736] @ (100057cc <process_control_request+0x360>)
|
|
100054ec: 18d3 adds r3, r2, r3
|
|
100054ee: 78db ldrb r3, [r3, #3]
|
|
100054f0: 4ab7 ldr r2, [pc, #732] @ (100057d0 <process_control_request+0x364>)
|
|
100054f2: 2a00 cmp r2, #0
|
|
100054f4: d005 beq.n 10005502 <process_control_request+0x96>
|
|
100054f6: 4ab7 ldr r2, [pc, #732] @ (100057d4 <process_control_request+0x368>)
|
|
100054f8: 7812 ldrb r2, [r2, #0]
|
|
100054fa: 4293 cmp r3, r2
|
|
100054fc: d30e bcc.n 1000551c <process_control_request+0xb0>
|
|
100054fe: 1a9b subs r3, r3, r2
|
|
10005500: b2db uxtb r3, r3
|
|
10005502: 2b00 cmp r3, #0
|
|
10005504: d000 beq.n 10005508 <process_control_request+0x9c>
|
|
10005506: e14c b.n 100057a2 <process_control_request+0x336>
|
|
10005508: 0059 lsls r1, r3, #1
|
|
1000550a: 18c9 adds r1, r1, r3
|
|
1000550c: 00c9 lsls r1, r1, #3
|
|
1000550e: 4bb2 ldr r3, [pc, #712] @ (100057d8 <process_control_request+0x36c>)
|
|
10005510: 18c9 adds r1, r1, r3
|
|
10005512: 0022 movs r2, r4
|
|
10005514: 0028 movs r0, r5
|
|
10005516: f7ff fcd6 bl 10004ec6 <invoke_class_control>
|
|
1000551a: e7c4 b.n 100054a6 <process_control_request+0x3a>
|
|
1000551c: 005a lsls r2, r3, #1
|
|
1000551e: 18d3 adds r3, r2, r3
|
|
10005520: 00db lsls r3, r3, #3
|
|
10005522: 4aae ldr r2, [pc, #696] @ (100057dc <process_control_request+0x370>)
|
|
10005524: 6811 ldr r1, [r2, #0]
|
|
10005526: 18c9 adds r1, r1, r3
|
|
10005528: 2900 cmp r1, #0
|
|
1000552a: d1f2 bne.n 10005512 <process_control_request+0xa6>
|
|
1000552c: 2000 movs r0, #0
|
|
1000552e: e7ba b.n 100054a6 <process_control_request+0x3a>
|
|
10005530: 0020 movs r0, r4
|
|
10005532: f000 fabb bl 10005aac <usbd_control_set_request>
|
|
10005536: 78a1 ldrb r1, [r4, #2]
|
|
10005538: 0028 movs r0, r5
|
|
1000553a: f7ff fb53 bl 10004be4 <dcd_set_address>
|
|
1000553e: 4aa3 ldr r2, [pc, #652] @ (100057cc <process_control_request+0x360>)
|
|
10005540: 7813 ldrb r3, [r2, #0]
|
|
10005542: 2102 movs r1, #2
|
|
10005544: 430b orrs r3, r1
|
|
10005546: 7013 strb r3, [r2, #0]
|
|
10005548: 2001 movs r0, #1
|
|
1000554a: e7ac b.n 100054a6 <process_control_request+0x3a>
|
|
1000554c: 4b9f ldr r3, [pc, #636] @ (100057cc <process_control_request+0x360>)
|
|
1000554e: 785b ldrb r3, [r3, #1]
|
|
10005550: 466a mov r2, sp
|
|
10005552: 3206 adds r2, #6
|
|
10005554: 7013 strb r3, [r2, #0]
|
|
10005556: 2301 movs r3, #1
|
|
10005558: 0021 movs r1, r4
|
|
1000555a: 0028 movs r0, r5
|
|
1000555c: f000 fa62 bl 10005a24 <tud_control_xfer>
|
|
10005560: 2001 movs r0, #1
|
|
10005562: e7a0 b.n 100054a6 <process_control_request+0x3a>
|
|
10005564: 78a6 ldrb r6, [r4, #2]
|
|
10005566: 4b99 ldr r3, [pc, #612] @ (100057cc <process_control_request+0x360>)
|
|
10005568: 785b ldrb r3, [r3, #1]
|
|
1000556a: b2db uxtb r3, r3
|
|
1000556c: 42b3 cmp r3, r6
|
|
1000556e: d005 beq.n 1000557c <process_control_request+0x110>
|
|
10005570: 4b96 ldr r3, [pc, #600] @ (100057cc <process_control_request+0x360>)
|
|
10005572: 785b ldrb r3, [r3, #1]
|
|
10005574: 2b00 cmp r3, #0
|
|
10005576: d109 bne.n 1000558c <process_control_request+0x120>
|
|
10005578: 2e00 cmp r6, #0
|
|
1000557a: d113 bne.n 100055a4 <process_control_request+0x138>
|
|
1000557c: 4b93 ldr r3, [pc, #588] @ (100057cc <process_control_request+0x360>)
|
|
1000557e: 705e strb r6, [r3, #1]
|
|
10005580: 0021 movs r1, r4
|
|
10005582: 0028 movs r0, r5
|
|
10005584: f000 fa3a bl 100059fc <tud_control_status>
|
|
10005588: 2001 movs r0, #1
|
|
1000558a: e78c b.n 100054a6 <process_control_request+0x3a>
|
|
1000558c: 0028 movs r0, r5
|
|
1000558e: f7ff fbb5 bl 10004cfc <dcd_edpt_close_all>
|
|
10005592: 4f8e ldr r7, [pc, #568] @ (100057cc <process_control_request+0x360>)
|
|
10005594: 78bb ldrb r3, [r7, #2]
|
|
10005596: 4698 mov r8, r3
|
|
10005598: 0028 movs r0, r5
|
|
1000559a: f7ff fc41 bl 10004e20 <configuration_reset>
|
|
1000559e: 4643 mov r3, r8
|
|
100055a0: 70bb strb r3, [r7, #2]
|
|
100055a2: e7e9 b.n 10005578 <process_control_request+0x10c>
|
|
100055a4: 0031 movs r1, r6
|
|
100055a6: 0028 movs r0, r5
|
|
100055a8: f7ff fc9a bl 10004ee0 <process_set_config>
|
|
100055ac: 2800 cmp r0, #0
|
|
100055ae: d1e5 bne.n 1000557c <process_control_request+0x110>
|
|
100055b0: e779 b.n 100054a6 <process_control_request+0x3a>
|
|
100055b2: 0021 movs r1, r4
|
|
100055b4: 0028 movs r0, r5
|
|
100055b6: f7ff fd4f bl 10005058 <process_get_descriptor>
|
|
100055ba: e774 b.n 100054a6 <process_control_request+0x3a>
|
|
100055bc: 78a2 ldrb r2, [r4, #2]
|
|
100055be: 78e3 ldrb r3, [r4, #3]
|
|
100055c0: 021b lsls r3, r3, #8
|
|
100055c2: 4313 orrs r3, r2
|
|
100055c4: 2b01 cmp r3, #1
|
|
100055c6: d001 beq.n 100055cc <process_control_request+0x160>
|
|
100055c8: 2000 movs r0, #0
|
|
100055ca: e76c b.n 100054a6 <process_control_request+0x3a>
|
|
100055cc: 4a7f ldr r2, [pc, #508] @ (100057cc <process_control_request+0x360>)
|
|
100055ce: 7813 ldrb r3, [r2, #0]
|
|
100055d0: 2108 movs r1, #8
|
|
100055d2: 430b orrs r3, r1
|
|
100055d4: 7013 strb r3, [r2, #0]
|
|
100055d6: 0021 movs r1, r4
|
|
100055d8: 0028 movs r0, r5
|
|
100055da: f000 fa0f bl 100059fc <tud_control_status>
|
|
100055de: 2001 movs r0, #1
|
|
100055e0: e761 b.n 100054a6 <process_control_request+0x3a>
|
|
100055e2: 78a2 ldrb r2, [r4, #2]
|
|
100055e4: 78e3 ldrb r3, [r4, #3]
|
|
100055e6: 021b lsls r3, r3, #8
|
|
100055e8: 4313 orrs r3, r2
|
|
100055ea: 2b01 cmp r3, #1
|
|
100055ec: d001 beq.n 100055f2 <process_control_request+0x186>
|
|
100055ee: 2000 movs r0, #0
|
|
100055f0: e759 b.n 100054a6 <process_control_request+0x3a>
|
|
100055f2: 4a76 ldr r2, [pc, #472] @ (100057cc <process_control_request+0x360>)
|
|
100055f4: 7813 ldrb r3, [r2, #0]
|
|
100055f6: 2108 movs r1, #8
|
|
100055f8: 438b bics r3, r1
|
|
100055fa: 7013 strb r3, [r2, #0]
|
|
100055fc: 0021 movs r1, r4
|
|
100055fe: 0028 movs r0, r5
|
|
10005600: f000 f9fc bl 100059fc <tud_control_status>
|
|
10005604: 2001 movs r0, #1
|
|
10005606: e74e b.n 100054a6 <process_control_request+0x3a>
|
|
10005608: 4b70 ldr r3, [pc, #448] @ (100057cc <process_control_request+0x360>)
|
|
1000560a: 781a ldrb r2, [r3, #0]
|
|
1000560c: 0951 lsrs r1, r2, #5
|
|
1000560e: 0892 lsrs r2, r2, #2
|
|
10005610: 2301 movs r3, #1
|
|
10005612: 400b ands r3, r1
|
|
10005614: 2102 movs r1, #2
|
|
10005616: 400a ands r2, r1
|
|
10005618: 4313 orrs r3, r2
|
|
1000561a: 466a mov r2, sp
|
|
1000561c: 3206 adds r2, #6
|
|
1000561e: 8013 strh r3, [r2, #0]
|
|
10005620: 2302 movs r3, #2
|
|
10005622: 0021 movs r1, r4
|
|
10005624: 0028 movs r0, r5
|
|
10005626: f000 f9fd bl 10005a24 <tud_control_xfer>
|
|
1000562a: 2001 movs r0, #1
|
|
1000562c: e73b b.n 100054a6 <process_control_request+0x3a>
|
|
1000562e: 7923 ldrb r3, [r4, #4]
|
|
10005630: 2b0f cmp r3, #15
|
|
10005632: d900 bls.n 10005636 <process_control_request+0x1ca>
|
|
10005634: e0bb b.n 100057ae <process_control_request+0x342>
|
|
10005636: 4a65 ldr r2, [pc, #404] @ (100057cc <process_control_request+0x360>)
|
|
10005638: 18d3 adds r3, r2, r3
|
|
1000563a: 78db ldrb r3, [r3, #3]
|
|
1000563c: 4a64 ldr r2, [pc, #400] @ (100057d0 <process_control_request+0x364>)
|
|
1000563e: 2a00 cmp r2, #0
|
|
10005640: d005 beq.n 1000564e <process_control_request+0x1e2>
|
|
10005642: 4a64 ldr r2, [pc, #400] @ (100057d4 <process_control_request+0x368>)
|
|
10005644: 7812 ldrb r2, [r2, #0]
|
|
10005646: 4293 cmp r3, r2
|
|
10005648: d325 bcc.n 10005696 <process_control_request+0x22a>
|
|
1000564a: 1a9b subs r3, r3, r2
|
|
1000564c: b2db uxtb r3, r3
|
|
1000564e: 2b00 cmp r3, #0
|
|
10005650: d000 beq.n 10005654 <process_control_request+0x1e8>
|
|
10005652: e0ae b.n 100057b2 <process_control_request+0x346>
|
|
10005654: 0059 lsls r1, r3, #1
|
|
10005656: 18c9 adds r1, r1, r3
|
|
10005658: 00c9 lsls r1, r1, #3
|
|
1000565a: 4b5f ldr r3, [pc, #380] @ (100057d8 <process_control_request+0x36c>)
|
|
1000565c: 18c9 adds r1, r1, r3
|
|
1000565e: 0022 movs r2, r4
|
|
10005660: 0028 movs r0, r5
|
|
10005662: f7ff fc30 bl 10004ec6 <invoke_class_control>
|
|
10005666: 2800 cmp r0, #0
|
|
10005668: d000 beq.n 1000566c <process_control_request+0x200>
|
|
1000566a: e71c b.n 100054a6 <process_control_request+0x3a>
|
|
1000566c: 7823 ldrb r3, [r4, #0]
|
|
1000566e: 2260 movs r2, #96 @ 0x60
|
|
10005670: 421a tst r2, r3
|
|
10005672: d000 beq.n 10005676 <process_control_request+0x20a>
|
|
10005674: e717 b.n 100054a6 <process_control_request+0x3a>
|
|
10005676: 7863 ldrb r3, [r4, #1]
|
|
10005678: 3b0a subs r3, #10
|
|
1000567a: 2b01 cmp r3, #1
|
|
1000567c: d900 bls.n 10005680 <process_control_request+0x214>
|
|
1000567e: e712 b.n 100054a6 <process_control_request+0x3a>
|
|
10005680: f000 fa0e bl 10005aa0 <usbd_control_set_complete_callback>
|
|
10005684: 7863 ldrb r3, [r4, #1]
|
|
10005686: 2b0a cmp r3, #10
|
|
10005688: d00f beq.n 100056aa <process_control_request+0x23e>
|
|
1000568a: 0021 movs r1, r4
|
|
1000568c: 0028 movs r0, r5
|
|
1000568e: f000 f9b5 bl 100059fc <tud_control_status>
|
|
10005692: 2001 movs r0, #1
|
|
10005694: e707 b.n 100054a6 <process_control_request+0x3a>
|
|
10005696: 005a lsls r2, r3, #1
|
|
10005698: 18d3 adds r3, r2, r3
|
|
1000569a: 00db lsls r3, r3, #3
|
|
1000569c: 4a4f ldr r2, [pc, #316] @ (100057dc <process_control_request+0x370>)
|
|
1000569e: 6811 ldr r1, [r2, #0]
|
|
100056a0: 18c9 adds r1, r1, r3
|
|
100056a2: 2900 cmp r1, #0
|
|
100056a4: d1db bne.n 1000565e <process_control_request+0x1f2>
|
|
100056a6: 2000 movs r0, #0
|
|
100056a8: e6fd b.n 100054a6 <process_control_request+0x3a>
|
|
100056aa: 466b mov r3, sp
|
|
100056ac: 1d9a adds r2, r3, #6
|
|
100056ae: 2300 movs r3, #0
|
|
100056b0: 7013 strb r3, [r2, #0]
|
|
100056b2: 3301 adds r3, #1
|
|
100056b4: 0021 movs r1, r4
|
|
100056b6: 0028 movs r0, r5
|
|
100056b8: f000 f9b4 bl 10005a24 <tud_control_xfer>
|
|
100056bc: 2001 movs r0, #1
|
|
100056be: e6f2 b.n 100054a6 <process_control_request+0x3a>
|
|
100056c0: 7921 ldrb r1, [r4, #4]
|
|
100056c2: 207f movs r0, #127 @ 0x7f
|
|
100056c4: 4008 ands r0, r1
|
|
100056c6: 09ce lsrs r6, r1, #7
|
|
100056c8: 2270 movs r2, #112 @ 0x70
|
|
100056ca: 420a tst r2, r1
|
|
100056cc: d173 bne.n 100057b6 <process_control_request+0x34a>
|
|
100056ce: 4a3f ldr r2, [pc, #252] @ (100057cc <process_control_request+0x360>)
|
|
100056d0: 0040 lsls r0, r0, #1
|
|
100056d2: 1812 adds r2, r2, r0
|
|
100056d4: 1992 adds r2, r2, r6
|
|
100056d6: 7cd2 ldrb r2, [r2, #19]
|
|
100056d8: 483d ldr r0, [pc, #244] @ (100057d0 <process_control_request+0x364>)
|
|
100056da: 2800 cmp r0, #0
|
|
100056dc: d005 beq.n 100056ea <process_control_request+0x27e>
|
|
100056de: 483d ldr r0, [pc, #244] @ (100057d4 <process_control_request+0x368>)
|
|
100056e0: 7800 ldrb r0, [r0, #0]
|
|
100056e2: 4282 cmp r2, r0
|
|
100056e4: d312 bcc.n 1000570c <process_control_request+0x2a0>
|
|
100056e6: 1a12 subs r2, r2, r0
|
|
100056e8: b2d2 uxtb r2, r2
|
|
100056ea: 2a00 cmp r2, #0
|
|
100056ec: d115 bne.n 1000571a <process_control_request+0x2ae>
|
|
100056ee: 0056 lsls r6, r2, #1
|
|
100056f0: 18b6 adds r6, r6, r2
|
|
100056f2: 00f6 lsls r6, r6, #3
|
|
100056f4: 4a38 ldr r2, [pc, #224] @ (100057d8 <process_control_request+0x36c>)
|
|
100056f6: 18b6 adds r6, r6, r2
|
|
100056f8: 2b00 cmp r3, #0
|
|
100056fa: d010 beq.n 1000571e <process_control_request+0x2b2>
|
|
100056fc: 2e00 cmp r6, #0
|
|
100056fe: d05c beq.n 100057ba <process_control_request+0x34e>
|
|
10005700: 0022 movs r2, r4
|
|
10005702: 0031 movs r1, r6
|
|
10005704: 0028 movs r0, r5
|
|
10005706: f7ff fbde bl 10004ec6 <invoke_class_control>
|
|
1000570a: e6cc b.n 100054a6 <process_control_request+0x3a>
|
|
1000570c: 0050 lsls r0, r2, #1
|
|
1000570e: 1882 adds r2, r0, r2
|
|
10005710: 00d2 lsls r2, r2, #3
|
|
10005712: 4832 ldr r0, [pc, #200] @ (100057dc <process_control_request+0x370>)
|
|
10005714: 6806 ldr r6, [r0, #0]
|
|
10005716: 18b6 adds r6, r6, r2
|
|
10005718: e7ee b.n 100056f8 <process_control_request+0x28c>
|
|
1000571a: 2600 movs r6, #0
|
|
1000571c: e7ec b.n 100056f8 <process_control_request+0x28c>
|
|
1000571e: 7863 ldrb r3, [r4, #1]
|
|
10005720: 2b01 cmp r3, #1
|
|
10005722: d012 beq.n 1000574a <process_control_request+0x2de>
|
|
10005724: 2b03 cmp r3, #3
|
|
10005726: d010 beq.n 1000574a <process_control_request+0x2de>
|
|
10005728: 2b00 cmp r3, #0
|
|
1000572a: d001 beq.n 10005730 <process_control_request+0x2c4>
|
|
1000572c: 2000 movs r0, #0
|
|
1000572e: e6ba b.n 100054a6 <process_control_request+0x3a>
|
|
10005730: 0028 movs r0, r5
|
|
10005732: f7ff fe8d bl 10005450 <usbd_edpt_stalled>
|
|
10005736: 466b mov r3, sp
|
|
10005738: 1d9a adds r2, r3, #6
|
|
1000573a: 8010 strh r0, [r2, #0]
|
|
1000573c: 2302 movs r3, #2
|
|
1000573e: 0021 movs r1, r4
|
|
10005740: 0028 movs r0, r5
|
|
10005742: f000 f96f bl 10005a24 <tud_control_xfer>
|
|
10005746: 2001 movs r0, #1
|
|
10005748: e6ad b.n 100054a6 <process_control_request+0x3a>
|
|
1000574a: 78a0 ldrb r0, [r4, #2]
|
|
1000574c: 78e2 ldrb r2, [r4, #3]
|
|
1000574e: 0212 lsls r2, r2, #8
|
|
10005750: 4302 orrs r2, r0
|
|
10005752: d104 bne.n 1000575e <process_control_request+0x2f2>
|
|
10005754: 2b01 cmp r3, #1
|
|
10005756: d01a beq.n 1000578e <process_control_request+0x322>
|
|
10005758: 0028 movs r0, r5
|
|
1000575a: f7ff fe31 bl 100053c0 <usbd_edpt_stall>
|
|
1000575e: 2e00 cmp r6, #0
|
|
10005760: d02d beq.n 100057be <process_control_request+0x352>
|
|
10005762: 0022 movs r2, r4
|
|
10005764: 0031 movs r1, r6
|
|
10005766: 0028 movs r0, r5
|
|
10005768: f7ff fbad bl 10004ec6 <invoke_class_control>
|
|
1000576c: 2000 movs r0, #0
|
|
1000576e: f000 f997 bl 10005aa0 <usbd_control_set_complete_callback>
|
|
10005772: 4b16 ldr r3, [pc, #88] @ (100057cc <process_control_request+0x360>)
|
|
10005774: 2234 movs r2, #52 @ 0x34
|
|
10005776: 5c9b ldrb r3, [r3, r2]
|
|
10005778: 07db lsls r3, r3, #31
|
|
1000577a: 0fd8 lsrs r0, r3, #31
|
|
1000577c: 2b00 cmp r3, #0
|
|
1000577e: d000 beq.n 10005782 <process_control_request+0x316>
|
|
10005780: e691 b.n 100054a6 <process_control_request+0x3a>
|
|
10005782: 0021 movs r1, r4
|
|
10005784: 0028 movs r0, r5
|
|
10005786: f000 f939 bl 100059fc <tud_control_status>
|
|
1000578a: 2001 movs r0, #1
|
|
1000578c: e68b b.n 100054a6 <process_control_request+0x3a>
|
|
1000578e: 0028 movs r0, r5
|
|
10005790: f7ff fe3a bl 10005408 <usbd_edpt_clear_stall>
|
|
10005794: e7e3 b.n 1000575e <process_control_request+0x2f2>
|
|
10005796: 2000 movs r0, #0
|
|
10005798: e685 b.n 100054a6 <process_control_request+0x3a>
|
|
1000579a: 2000 movs r0, #0
|
|
1000579c: e683 b.n 100054a6 <process_control_request+0x3a>
|
|
1000579e: 2000 movs r0, #0
|
|
100057a0: e681 b.n 100054a6 <process_control_request+0x3a>
|
|
100057a2: 2000 movs r0, #0
|
|
100057a4: e67f b.n 100054a6 <process_control_request+0x3a>
|
|
100057a6: 2000 movs r0, #0
|
|
100057a8: e67d b.n 100054a6 <process_control_request+0x3a>
|
|
100057aa: 2000 movs r0, #0
|
|
100057ac: e67b b.n 100054a6 <process_control_request+0x3a>
|
|
100057ae: 2000 movs r0, #0
|
|
100057b0: e679 b.n 100054a6 <process_control_request+0x3a>
|
|
100057b2: 2000 movs r0, #0
|
|
100057b4: e677 b.n 100054a6 <process_control_request+0x3a>
|
|
100057b6: 2000 movs r0, #0
|
|
100057b8: e675 b.n 100054a6 <process_control_request+0x3a>
|
|
100057ba: 2000 movs r0, #0
|
|
100057bc: e673 b.n 100054a6 <process_control_request+0x3a>
|
|
100057be: 2001 movs r0, #1
|
|
100057c0: e671 b.n 100054a6 <process_control_request+0x3a>
|
|
100057c2: 46c0 nop @ (mov r8, r8)
|
|
100057c4: 00000000 .word 0x00000000
|
|
100057c8: 1000a7a4 .word 0x1000a7a4
|
|
100057cc: 20001020 .word 0x20001020
|
|
100057d0: 10004511 .word 0x10004511
|
|
100057d4: 20021d3c .word 0x20021d3c
|
|
100057d8: 1000a7f0 .word 0x1000a7f0
|
|
100057dc: 20000cf8 .word 0x20000cf8
|
|
|
|
100057e0 <tud_task_ext>:
|
|
100057e0: b530 push {r4, r5, lr}
|
|
100057e2: b085 sub sp, #20
|
|
100057e4: f000 fccf bl 10006186 <tusb_inited>
|
|
100057e8: 2800 cmp r0, #0
|
|
100057ea: d108 bne.n 100057fe <tud_task_ext+0x1e>
|
|
100057ec: b005 add sp, #20
|
|
100057ee: bd30 pop {r4, r5, pc}
|
|
100057f0: ac01 add r4, sp, #4
|
|
100057f2: 7820 ldrb r0, [r4, #0]
|
|
100057f4: f7ff fb61 bl 10004eba <usbd_reset>
|
|
100057f8: 7922 ldrb r2, [r4, #4]
|
|
100057fa: 4b59 ldr r3, [pc, #356] @ (10005960 <tud_task_ext+0x180>)
|
|
100057fc: 709a strb r2, [r3, #2]
|
|
100057fe: 4b59 ldr r3, [pc, #356] @ (10005964 <tud_task_ext+0x184>)
|
|
10005800: 681c ldr r4, [r3, #0]
|
|
10005802: 0020 movs r0, r4
|
|
10005804: 3014 adds r0, #20
|
|
10005806: f7ff fb4d bl 10004ea4 <critical_section_enter_blocking>
|
|
1000580a: a901 add r1, sp, #4
|
|
1000580c: 0020 movs r0, r4
|
|
1000580e: f001 f838 bl 10006882 <tu_fifo_read>
|
|
10005812: 6962 ldr r2, [r4, #20]
|
|
10005814: 69a3 ldr r3, [r4, #24]
|
|
10005816: f3bf 8f5f dmb sy
|
|
1000581a: 2100 movs r1, #0
|
|
1000581c: 6011 str r1, [r2, #0]
|
|
1000581e: f383 8810 msr PRIMASK, r3
|
|
10005822: 2800 cmp r0, #0
|
|
10005824: d0e2 beq.n 100057ec <tud_task_ext+0xc>
|
|
10005826: ab01 add r3, sp, #4
|
|
10005828: 785b ldrb r3, [r3, #1]
|
|
1000582a: 2b08 cmp r3, #8
|
|
1000582c: d8e7 bhi.n 100057fe <tud_task_ext+0x1e>
|
|
1000582e: 009b lsls r3, r3, #2
|
|
10005830: 4a4d ldr r2, [pc, #308] @ (10005968 <tud_task_ext+0x188>)
|
|
10005832: 58d3 ldr r3, [r2, r3]
|
|
10005834: 469f mov pc, r3
|
|
10005836: ab01 add r3, sp, #4
|
|
10005838: 7818 ldrb r0, [r3, #0]
|
|
1000583a: f7ff fb3e bl 10004eba <usbd_reset>
|
|
1000583e: 4b4b ldr r3, [pc, #300] @ (1000596c <tud_task_ext+0x18c>)
|
|
10005840: 2b00 cmp r3, #0
|
|
10005842: d0dc beq.n 100057fe <tud_task_ext+0x1e>
|
|
10005844: e000 b.n 10005848 <tud_task_ext+0x68>
|
|
10005846: bf00 nop
|
|
10005848: e7d9 b.n 100057fe <tud_task_ext+0x1e>
|
|
1000584a: 4b45 ldr r3, [pc, #276] @ (10005960 <tud_task_ext+0x180>)
|
|
1000584c: 781a ldrb r2, [r3, #0]
|
|
1000584e: 2401 movs r4, #1
|
|
10005850: 2101 movs r1, #1
|
|
10005852: 430a orrs r2, r1
|
|
10005854: 701a strb r2, [r3, #0]
|
|
10005856: 2233 movs r2, #51 @ 0x33
|
|
10005858: 5c99 ldrb r1, [r3, r2]
|
|
1000585a: 43a1 bics r1, r4
|
|
1000585c: 5499 strb r1, [r3, r2]
|
|
1000585e: 5c99 ldrb r1, [r3, r2]
|
|
10005860: 2004 movs r0, #4
|
|
10005862: 4381 bics r1, r0
|
|
10005864: 5499 strb r1, [r3, r2]
|
|
10005866: 3201 adds r2, #1
|
|
10005868: 5c99 ldrb r1, [r3, r2]
|
|
1000586a: 43a1 bics r1, r4
|
|
1000586c: 5499 strb r1, [r3, r2]
|
|
1000586e: 5c99 ldrb r1, [r3, r2]
|
|
10005870: 4381 bics r1, r0
|
|
10005872: 5499 strb r1, [r3, r2]
|
|
10005874: ab01 add r3, sp, #4
|
|
10005876: 7818 ldrb r0, [r3, #0]
|
|
10005878: a902 add r1, sp, #8
|
|
1000587a: f7ff fdf7 bl 1000546c <process_control_request>
|
|
1000587e: 2800 cmp r0, #0
|
|
10005880: d1bd bne.n 100057fe <tud_task_ext+0x1e>
|
|
10005882: ac01 add r4, sp, #4
|
|
10005884: 7820 ldrb r0, [r4, #0]
|
|
10005886: 2100 movs r1, #0
|
|
10005888: f7ff fa56 bl 10004d38 <dcd_edpt_stall>
|
|
1000588c: 7820 ldrb r0, [r4, #0]
|
|
1000588e: 2180 movs r1, #128 @ 0x80
|
|
10005890: f7ff fa52 bl 10004d38 <dcd_edpt_stall>
|
|
10005894: e7b3 b.n 100057fe <tud_task_ext+0x1e>
|
|
10005896: ab01 add r3, sp, #4
|
|
10005898: 7919 ldrb r1, [r3, #4]
|
|
1000589a: 227f movs r2, #127 @ 0x7f
|
|
1000589c: 400a ands r2, r1
|
|
1000589e: 09cc lsrs r4, r1, #7
|
|
100058a0: 4b2f ldr r3, [pc, #188] @ (10005960 <tud_task_ext+0x180>)
|
|
100058a2: 0050 lsls r0, r2, #1
|
|
100058a4: 181b adds r3, r3, r0
|
|
100058a6: 191b adds r3, r3, r4
|
|
100058a8: 3330 adds r3, #48 @ 0x30
|
|
100058aa: 78d8 ldrb r0, [r3, #3]
|
|
100058ac: 2501 movs r5, #1
|
|
100058ae: 43a8 bics r0, r5
|
|
100058b0: 70d8 strb r0, [r3, #3]
|
|
100058b2: 78d8 ldrb r0, [r3, #3]
|
|
100058b4: 3503 adds r5, #3
|
|
100058b6: 43a8 bics r0, r5
|
|
100058b8: 70d8 strb r0, [r3, #3]
|
|
100058ba: 2a00 cmp r2, #0
|
|
100058bc: d01c beq.n 100058f8 <tud_task_ext+0x118>
|
|
100058be: 4b28 ldr r3, [pc, #160] @ (10005960 <tud_task_ext+0x180>)
|
|
100058c0: 0052 lsls r2, r2, #1
|
|
100058c2: 189b adds r3, r3, r2
|
|
100058c4: 191b adds r3, r3, r4
|
|
100058c6: 7cdb ldrb r3, [r3, #19]
|
|
100058c8: 4a29 ldr r2, [pc, #164] @ (10005970 <tud_task_ext+0x190>)
|
|
100058ca: 2a00 cmp r2, #0
|
|
100058cc: d005 beq.n 100058da <tud_task_ext+0xfa>
|
|
100058ce: 4a29 ldr r2, [pc, #164] @ (10005974 <tud_task_ext+0x194>)
|
|
100058d0: 7812 ldrb r2, [r2, #0]
|
|
100058d2: 4293 cmp r3, r2
|
|
100058d4: d317 bcc.n 10005906 <tud_task_ext+0x126>
|
|
100058d6: 1a9b subs r3, r3, r2
|
|
100058d8: b2db uxtb r3, r3
|
|
100058da: 2b00 cmp r3, #0
|
|
100058dc: d000 beq.n 100058e0 <tud_task_ext+0x100>
|
|
100058de: e785 b.n 100057ec <tud_task_ext+0xc>
|
|
100058e0: 005a lsls r2, r3, #1
|
|
100058e2: 18d3 adds r3, r2, r3
|
|
100058e4: 00db lsls r3, r3, #3
|
|
100058e6: 4a24 ldr r2, [pc, #144] @ (10005978 <tud_task_ext+0x198>)
|
|
100058e8: 189b adds r3, r3, r2
|
|
100058ea: 691c ldr r4, [r3, #16]
|
|
100058ec: a801 add r0, sp, #4
|
|
100058ee: 7942 ldrb r2, [r0, #5]
|
|
100058f0: 9b03 ldr r3, [sp, #12]
|
|
100058f2: 7800 ldrb r0, [r0, #0]
|
|
100058f4: 47a0 blx r4
|
|
100058f6: e782 b.n 100057fe <tud_task_ext+0x1e>
|
|
100058f8: a801 add r0, sp, #4
|
|
100058fa: 7942 ldrb r2, [r0, #5]
|
|
100058fc: 9b03 ldr r3, [sp, #12]
|
|
100058fe: 7800 ldrb r0, [r0, #0]
|
|
10005900: f000 f8e2 bl 10005ac8 <usbd_control_xfer_cb>
|
|
10005904: e77b b.n 100057fe <tud_task_ext+0x1e>
|
|
10005906: 005a lsls r2, r3, #1
|
|
10005908: 18d2 adds r2, r2, r3
|
|
1000590a: 00d2 lsls r2, r2, #3
|
|
1000590c: 4b1b ldr r3, [pc, #108] @ (1000597c <tud_task_ext+0x19c>)
|
|
1000590e: 681b ldr r3, [r3, #0]
|
|
10005910: 189b adds r3, r3, r2
|
|
10005912: 2b00 cmp r3, #0
|
|
10005914: d1e9 bne.n 100058ea <tud_task_ext+0x10a>
|
|
10005916: e769 b.n 100057ec <tud_task_ext+0xc>
|
|
10005918: 4b11 ldr r3, [pc, #68] @ (10005960 <tud_task_ext+0x180>)
|
|
1000591a: 781b ldrb r3, [r3, #0]
|
|
1000591c: 07db lsls r3, r3, #31
|
|
1000591e: d400 bmi.n 10005922 <tud_task_ext+0x142>
|
|
10005920: e76d b.n 100057fe <tud_task_ext+0x1e>
|
|
10005922: 4b17 ldr r3, [pc, #92] @ (10005980 <tud_task_ext+0x1a0>)
|
|
10005924: 2b00 cmp r3, #0
|
|
10005926: d100 bne.n 1000592a <tud_task_ext+0x14a>
|
|
10005928: e769 b.n 100057fe <tud_task_ext+0x1e>
|
|
1000592a: 4b0d ldr r3, [pc, #52] @ (10005960 <tud_task_ext+0x180>)
|
|
1000592c: 7818 ldrb r0, [r3, #0]
|
|
1000592e: 0700 lsls r0, r0, #28
|
|
10005930: 0fc0 lsrs r0, r0, #31
|
|
10005932: e000 b.n 10005936 <tud_task_ext+0x156>
|
|
10005934: bf00 nop
|
|
10005936: e762 b.n 100057fe <tud_task_ext+0x1e>
|
|
10005938: 4b09 ldr r3, [pc, #36] @ (10005960 <tud_task_ext+0x180>)
|
|
1000593a: 781b ldrb r3, [r3, #0]
|
|
1000593c: 07db lsls r3, r3, #31
|
|
1000593e: d400 bmi.n 10005942 <tud_task_ext+0x162>
|
|
10005940: e75d b.n 100057fe <tud_task_ext+0x1e>
|
|
10005942: 4b10 ldr r3, [pc, #64] @ (10005984 <tud_task_ext+0x1a4>)
|
|
10005944: 2b00 cmp r3, #0
|
|
10005946: d100 bne.n 1000594a <tud_task_ext+0x16a>
|
|
10005948: e759 b.n 100057fe <tud_task_ext+0x1e>
|
|
1000594a: e000 b.n 1000594e <tud_task_ext+0x16e>
|
|
1000594c: bf00 nop
|
|
1000594e: e756 b.n 100057fe <tud_task_ext+0x1e>
|
|
10005950: 9b02 ldr r3, [sp, #8]
|
|
10005952: 2b00 cmp r3, #0
|
|
10005954: d100 bne.n 10005958 <tud_task_ext+0x178>
|
|
10005956: e752 b.n 100057fe <tud_task_ext+0x1e>
|
|
10005958: 9803 ldr r0, [sp, #12]
|
|
1000595a: 4798 blx r3
|
|
1000595c: e74f b.n 100057fe <tud_task_ext+0x1e>
|
|
1000595e: 46c0 nop @ (mov r8, r8)
|
|
10005960: 20001020 .word 0x20001020
|
|
10005964: 20001078 .word 0x20001078
|
|
10005968: 1000a7cc .word 0x1000a7cc
|
|
1000596c: 00000000 .word 0x00000000
|
|
10005970: 10004511 .word 0x10004511
|
|
10005974: 20021d3c .word 0x20021d3c
|
|
10005978: 1000a7f0 .word 0x1000a7f0
|
|
1000597c: 20000cf8 .word 0x20000cf8
|
|
...
|
|
|
|
10005988 <_status_stage_xact>:
|
|
10005988: b510 push {r4, lr}
|
|
1000598a: 2300 movs r3, #0
|
|
1000598c: 56cb ldrsb r3, [r1, r3]
|
|
1000598e: 2b00 cmp r3, #0
|
|
10005990: db05 blt.n 1000599e <_status_stage_xact+0x16>
|
|
10005992: 2180 movs r1, #128 @ 0x80
|
|
10005994: 2300 movs r3, #0
|
|
10005996: 2200 movs r2, #0
|
|
10005998: f7ff fcd6 bl 10005348 <usbd_edpt_xfer>
|
|
1000599c: bd10 pop {r4, pc}
|
|
1000599e: 2100 movs r1, #0
|
|
100059a0: e7f8 b.n 10005994 <_status_stage_xact+0xc>
|
|
...
|
|
|
|
100059a4 <_data_stage_xact>:
|
|
100059a4: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100059a6: 0005 movs r5, r0
|
|
100059a8: 4b12 ldr r3, [pc, #72] @ (100059f4 <_data_stage_xact+0x50>)
|
|
100059aa: 899f ldrh r7, [r3, #12]
|
|
100059ac: 89de ldrh r6, [r3, #14]
|
|
100059ae: 1bb9 subs r1, r7, r6
|
|
100059b0: b289 uxth r1, r1
|
|
100059b2: 1c0b adds r3, r1, #0
|
|
100059b4: 2940 cmp r1, #64 @ 0x40
|
|
100059b6: d900 bls.n 100059ba <_data_stage_xact+0x16>
|
|
100059b8: 2340 movs r3, #64 @ 0x40
|
|
100059ba: b29c uxth r4, r3
|
|
100059bc: 4b0d ldr r3, [pc, #52] @ (100059f4 <_data_stage_xact+0x50>)
|
|
100059be: 781b ldrb r3, [r3, #0]
|
|
100059c0: b25b sxtb r3, r3
|
|
100059c2: 2b00 cmp r3, #0
|
|
100059c4: db08 blt.n 100059d8 <_data_stage_xact+0x34>
|
|
100059c6: 2100 movs r1, #0
|
|
100059c8: 42b7 cmp r7, r6
|
|
100059ca: d011 beq.n 100059f0 <_data_stage_xact+0x4c>
|
|
100059cc: 4a0a ldr r2, [pc, #40] @ (100059f8 <_data_stage_xact+0x54>)
|
|
100059ce: 0023 movs r3, r4
|
|
100059d0: 0028 movs r0, r5
|
|
100059d2: f7ff fcb9 bl 10005348 <usbd_edpt_xfer>
|
|
100059d6: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100059d8: 42b7 cmp r7, r6
|
|
100059da: d101 bne.n 100059e0 <_data_stage_xact+0x3c>
|
|
100059dc: 2180 movs r1, #128 @ 0x80
|
|
100059de: e7f3 b.n 100059c8 <_data_stage_xact+0x24>
|
|
100059e0: 4b04 ldr r3, [pc, #16] @ (100059f4 <_data_stage_xact+0x50>)
|
|
100059e2: 6899 ldr r1, [r3, #8]
|
|
100059e4: 4804 ldr r0, [pc, #16] @ (100059f8 <_data_stage_xact+0x54>)
|
|
100059e6: 0022 movs r2, r4
|
|
100059e8: f7fe fb98 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100059ec: 2180 movs r1, #128 @ 0x80
|
|
100059ee: e7eb b.n 100059c8 <_data_stage_xact+0x24>
|
|
100059f0: 2200 movs r2, #0
|
|
100059f2: e7ec b.n 100059ce <_data_stage_xact+0x2a>
|
|
100059f4: 20000fc4 .word 0x20000fc4
|
|
100059f8: 20000fe0 .word 0x20000fe0
|
|
|
|
100059fc <tud_control_status>:
|
|
100059fc: b570 push {r4, r5, r6, lr}
|
|
100059fe: 0006 movs r6, r0
|
|
10005a00: 000d movs r5, r1
|
|
10005a02: 4c07 ldr r4, [pc, #28] @ (10005a20 <tud_control_status+0x24>)
|
|
10005a04: 2208 movs r2, #8
|
|
10005a06: 0020 movs r0, r4
|
|
10005a08: f7fe fb88 bl 1000411c <__wrap___aeabi_memcpy>
|
|
10005a0c: 2300 movs r3, #0
|
|
10005a0e: 60a3 str r3, [r4, #8]
|
|
10005a10: 81e3 strh r3, [r4, #14]
|
|
10005a12: 81a3 strh r3, [r4, #12]
|
|
10005a14: 0029 movs r1, r5
|
|
10005a16: 0030 movs r0, r6
|
|
10005a18: f7ff ffb6 bl 10005988 <_status_stage_xact>
|
|
10005a1c: bd70 pop {r4, r5, r6, pc}
|
|
10005a1e: 46c0 nop @ (mov r8, r8)
|
|
10005a20: 20000fc4 .word 0x20000fc4
|
|
|
|
10005a24 <tud_control_xfer>:
|
|
10005a24: b5f0 push {r4, r5, r6, r7, lr}
|
|
10005a26: 46c6 mov lr, r8
|
|
10005a28: b500 push {lr}
|
|
10005a2a: 4680 mov r8, r0
|
|
10005a2c: 000c movs r4, r1
|
|
10005a2e: 0016 movs r6, r2
|
|
10005a30: 001d movs r5, r3
|
|
10005a32: 4b15 ldr r3, [pc, #84] @ (10005a88 <tud_control_xfer+0x64>)
|
|
10005a34: 2208 movs r2, #8
|
|
10005a36: 001f movs r7, r3
|
|
10005a38: 0018 movs r0, r3
|
|
10005a3a: f7fe fb6f bl 1000411c <__wrap___aeabi_memcpy>
|
|
10005a3e: 60be str r6, [r7, #8]
|
|
10005a40: 2300 movs r3, #0
|
|
10005a42: 81fb strh r3, [r7, #14]
|
|
10005a44: 79a3 ldrb r3, [r4, #6]
|
|
10005a46: 79e1 ldrb r1, [r4, #7]
|
|
10005a48: 0209 lsls r1, r1, #8
|
|
10005a4a: 4319 orrs r1, r3
|
|
10005a4c: 1c0b adds r3, r1, #0
|
|
10005a4e: 42a9 cmp r1, r5
|
|
10005a50: d900 bls.n 10005a54 <tud_control_xfer+0x30>
|
|
10005a52: 1c2b adds r3, r5, #0
|
|
10005a54: b299 uxth r1, r3
|
|
10005a56: 4a0c ldr r2, [pc, #48] @ (10005a88 <tud_control_xfer+0x64>)
|
|
10005a58: 8193 strh r3, [r2, #12]
|
|
10005a5a: 79a2 ldrb r2, [r4, #6]
|
|
10005a5c: 79e3 ldrb r3, [r4, #7]
|
|
10005a5e: 021b lsls r3, r3, #8
|
|
10005a60: 4313 orrs r3, r2
|
|
10005a62: d009 beq.n 10005a78 <tud_control_xfer+0x54>
|
|
10005a64: 2900 cmp r1, #0
|
|
10005a66: d001 beq.n 10005a6c <tud_control_xfer+0x48>
|
|
10005a68: 2e00 cmp r6, #0
|
|
10005a6a: d00a beq.n 10005a82 <tud_control_xfer+0x5e>
|
|
10005a6c: 4640 mov r0, r8
|
|
10005a6e: f7ff ff99 bl 100059a4 <_data_stage_xact>
|
|
10005a72: bc80 pop {r7}
|
|
10005a74: 46b8 mov r8, r7
|
|
10005a76: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10005a78: 0021 movs r1, r4
|
|
10005a7a: 4640 mov r0, r8
|
|
10005a7c: f7ff ff84 bl 10005988 <_status_stage_xact>
|
|
10005a80: e7f7 b.n 10005a72 <tud_control_xfer+0x4e>
|
|
10005a82: 2000 movs r0, #0
|
|
10005a84: e7f5 b.n 10005a72 <tud_control_xfer+0x4e>
|
|
10005a86: 46c0 nop @ (mov r8, r8)
|
|
10005a88: 20000fc4 .word 0x20000fc4
|
|
|
|
10005a8c <usbd_control_reset>:
|
|
10005a8c: b510 push {r4, lr}
|
|
10005a8e: 4803 ldr r0, [pc, #12] @ (10005a9c <usbd_control_reset+0x10>)
|
|
10005a90: 2214 movs r2, #20
|
|
10005a92: 2100 movs r1, #0
|
|
10005a94: f7fe fb3c bl 10004110 <__wrap_memset>
|
|
10005a98: bd10 pop {r4, pc}
|
|
10005a9a: 46c0 nop @ (mov r8, r8)
|
|
10005a9c: 20000fc4 .word 0x20000fc4
|
|
|
|
10005aa0 <usbd_control_set_complete_callback>:
|
|
10005aa0: 4b01 ldr r3, [pc, #4] @ (10005aa8 <usbd_control_set_complete_callback+0x8>)
|
|
10005aa2: 6118 str r0, [r3, #16]
|
|
10005aa4: 4770 bx lr
|
|
10005aa6: 46c0 nop @ (mov r8, r8)
|
|
10005aa8: 20000fc4 .word 0x20000fc4
|
|
|
|
10005aac <usbd_control_set_request>:
|
|
10005aac: b510 push {r4, lr}
|
|
10005aae: 0001 movs r1, r0
|
|
10005ab0: 4c04 ldr r4, [pc, #16] @ (10005ac4 <usbd_control_set_request+0x18>)
|
|
10005ab2: 2208 movs r2, #8
|
|
10005ab4: 0020 movs r0, r4
|
|
10005ab6: f7fe fb31 bl 1000411c <__wrap___aeabi_memcpy>
|
|
10005aba: 2300 movs r3, #0
|
|
10005abc: 60a3 str r3, [r4, #8]
|
|
10005abe: 81e3 strh r3, [r4, #14]
|
|
10005ac0: 81a3 strh r3, [r4, #12]
|
|
10005ac2: bd10 pop {r4, pc}
|
|
10005ac4: 20000fc4 .word 0x20000fc4
|
|
|
|
10005ac8 <usbd_control_xfer_cb>:
|
|
10005ac8: b570 push {r4, r5, r6, lr}
|
|
10005aca: 0005 movs r5, r0
|
|
10005acc: 001c movs r4, r3
|
|
10005ace: 09c9 lsrs r1, r1, #7
|
|
10005ad0: 4b29 ldr r3, [pc, #164] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005ad2: 781b ldrb r3, [r3, #0]
|
|
10005ad4: 09db lsrs r3, r3, #7
|
|
10005ad6: 428b cmp r3, r1
|
|
10005ad8: d011 beq.n 10005afe <usbd_control_xfer_cb+0x36>
|
|
10005ada: 2c00 cmp r4, #0
|
|
10005adc: d147 bne.n 10005b6e <usbd_control_xfer_cb+0xa6>
|
|
10005ade: 4b27 ldr r3, [pc, #156] @ (10005b7c <usbd_control_xfer_cb+0xb4>)
|
|
10005ae0: 2b00 cmp r3, #0
|
|
10005ae2: d002 beq.n 10005aea <usbd_control_xfer_cb+0x22>
|
|
10005ae4: 4924 ldr r1, [pc, #144] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005ae6: f7ff f8db bl 10004ca0 <dcd_edpt0_status_complete>
|
|
10005aea: 4b23 ldr r3, [pc, #140] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005aec: 691b ldr r3, [r3, #16]
|
|
10005aee: 2b00 cmp r3, #0
|
|
10005af0: d003 beq.n 10005afa <usbd_control_xfer_cb+0x32>
|
|
10005af2: 4a21 ldr r2, [pc, #132] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005af4: 2103 movs r1, #3
|
|
10005af6: 0028 movs r0, r5
|
|
10005af8: 4798 blx r3
|
|
10005afa: 2001 movs r0, #1
|
|
10005afc: bd70 pop {r4, r5, r6, pc}
|
|
10005afe: 4b1e ldr r3, [pc, #120] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b00: 781b ldrb r3, [r3, #0]
|
|
10005b02: b25b sxtb r3, r3
|
|
10005b04: 2b00 cmp r3, #0
|
|
10005b06: db07 blt.n 10005b18 <usbd_control_xfer_cb+0x50>
|
|
10005b08: 4b1b ldr r3, [pc, #108] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b0a: 6898 ldr r0, [r3, #8]
|
|
10005b0c: 2800 cmp r0, #0
|
|
10005b0e: d030 beq.n 10005b72 <usbd_control_xfer_cb+0xaa>
|
|
10005b10: 491b ldr r1, [pc, #108] @ (10005b80 <usbd_control_xfer_cb+0xb8>)
|
|
10005b12: 0022 movs r2, r4
|
|
10005b14: f7fe fb02 bl 1000411c <__wrap___aeabi_memcpy>
|
|
10005b18: 4a17 ldr r2, [pc, #92] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b1a: 89d3 ldrh r3, [r2, #14]
|
|
10005b1c: b2a1 uxth r1, r4
|
|
10005b1e: 185b adds r3, r3, r1
|
|
10005b20: b29b uxth r3, r3
|
|
10005b22: 81d3 strh r3, [r2, #14]
|
|
10005b24: 6891 ldr r1, [r2, #8]
|
|
10005b26: 1909 adds r1, r1, r4
|
|
10005b28: 6091 str r1, [r2, #8]
|
|
10005b2a: 88d2 ldrh r2, [r2, #6]
|
|
10005b2c: 4293 cmp r3, r2
|
|
10005b2e: d001 beq.n 10005b34 <usbd_control_xfer_cb+0x6c>
|
|
10005b30: 2c3f cmp r4, #63 @ 0x3f
|
|
10005b32: d818 bhi.n 10005b66 <usbd_control_xfer_cb+0x9e>
|
|
10005b34: 4b10 ldr r3, [pc, #64] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b36: 691b ldr r3, [r3, #16]
|
|
10005b38: 2b00 cmp r3, #0
|
|
10005b3a: d005 beq.n 10005b48 <usbd_control_xfer_cb+0x80>
|
|
10005b3c: 4a0e ldr r2, [pc, #56] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b3e: 2102 movs r1, #2
|
|
10005b40: 0028 movs r0, r5
|
|
10005b42: 4798 blx r3
|
|
10005b44: 2800 cmp r0, #0
|
|
10005b46: d004 beq.n 10005b52 <usbd_control_xfer_cb+0x8a>
|
|
10005b48: 490b ldr r1, [pc, #44] @ (10005b78 <usbd_control_xfer_cb+0xb0>)
|
|
10005b4a: 0028 movs r0, r5
|
|
10005b4c: f7ff ff1c bl 10005988 <_status_stage_xact>
|
|
10005b50: e7d4 b.n 10005afc <usbd_control_xfer_cb+0x34>
|
|
10005b52: 2100 movs r1, #0
|
|
10005b54: 0028 movs r0, r5
|
|
10005b56: f7ff f8ef bl 10004d38 <dcd_edpt_stall>
|
|
10005b5a: 2180 movs r1, #128 @ 0x80
|
|
10005b5c: 0028 movs r0, r5
|
|
10005b5e: f7ff f8eb bl 10004d38 <dcd_edpt_stall>
|
|
10005b62: 2001 movs r0, #1
|
|
10005b64: e7ca b.n 10005afc <usbd_control_xfer_cb+0x34>
|
|
10005b66: 0028 movs r0, r5
|
|
10005b68: f7ff ff1c bl 100059a4 <_data_stage_xact>
|
|
10005b6c: e7c6 b.n 10005afc <usbd_control_xfer_cb+0x34>
|
|
10005b6e: 2000 movs r0, #0
|
|
10005b70: e7c4 b.n 10005afc <usbd_control_xfer_cb+0x34>
|
|
10005b72: 2000 movs r0, #0
|
|
10005b74: e7c2 b.n 10005afc <usbd_control_xfer_cb+0x34>
|
|
10005b76: 46c0 nop @ (mov r8, r8)
|
|
10005b78: 20000fc4 .word 0x20000fc4
|
|
10005b7c: 10004ca1 .word 0x10004ca1
|
|
10005b80: 20000fe0 .word 0x20000fe0
|
|
|
|
10005b84 <_prep_out_transaction>:
|
|
10005b84: b570 push {r4, r5, r6, lr}
|
|
10005b86: 0004 movs r4, r0
|
|
10005b88: 0005 movs r5, r0
|
|
10005b8a: 3510 adds r5, #16
|
|
10005b8c: 0028 movs r0, r5
|
|
10005b8e: f000 fe62 bl 10006856 <tu_fifo_remaining>
|
|
10005b92: 283f cmp r0, #63 @ 0x3f
|
|
10005b94: d801 bhi.n 10005b9a <_prep_out_transaction+0x16>
|
|
10005b96: 2000 movs r0, #0
|
|
10005b98: bd70 pop {r4, r5, r6, pc}
|
|
10005b9a: 78e1 ldrb r1, [r4, #3]
|
|
10005b9c: 2000 movs r0, #0
|
|
10005b9e: f7ff fbab bl 100052f8 <usbd_edpt_claim>
|
|
10005ba2: 2800 cmp r0, #0
|
|
10005ba4: d0f8 beq.n 10005b98 <_prep_out_transaction+0x14>
|
|
10005ba6: 0028 movs r0, r5
|
|
10005ba8: f000 fe55 bl 10006856 <tu_fifo_remaining>
|
|
10005bac: 283f cmp r0, #63 @ 0x3f
|
|
10005bae: d908 bls.n 10005bc2 <_prep_out_transaction+0x3e>
|
|
10005bb0: 2392 movs r3, #146 @ 0x92
|
|
10005bb2: 009b lsls r3, r3, #2
|
|
10005bb4: 18e2 adds r2, r4, r3
|
|
10005bb6: 78e1 ldrb r1, [r4, #3]
|
|
10005bb8: 2340 movs r3, #64 @ 0x40
|
|
10005bba: 2000 movs r0, #0
|
|
10005bbc: f7ff fbc4 bl 10005348 <usbd_edpt_xfer>
|
|
10005bc0: e7ea b.n 10005b98 <_prep_out_transaction+0x14>
|
|
10005bc2: 78e1 ldrb r1, [r4, #3]
|
|
10005bc4: 2000 movs r0, #0
|
|
10005bc6: f7ff fbab bl 10005320 <usbd_edpt_release>
|
|
10005bca: 2000 movs r0, #0
|
|
10005bcc: e7e4 b.n 10005b98 <_prep_out_transaction+0x14>
|
|
...
|
|
|
|
10005bd0 <tud_cdc_n_connected>:
|
|
10005bd0: b510 push {r4, lr}
|
|
10005bd2: 0004 movs r4, r0
|
|
10005bd4: f7ff faae bl 10005134 <tud_mounted>
|
|
10005bd8: 2800 cmp r0, #0
|
|
10005bda: d101 bne.n 10005be0 <tud_cdc_n_connected+0x10>
|
|
10005bdc: 2000 movs r0, #0
|
|
10005bde: bd10 pop {r4, pc}
|
|
10005be0: f7ff fab0 bl 10005144 <tud_suspended>
|
|
10005be4: 2800 cmp r0, #0
|
|
10005be6: d109 bne.n 10005bfc <tud_cdc_n_connected+0x2c>
|
|
10005be8: 4b06 ldr r3, [pc, #24] @ (10005c04 <tud_cdc_n_connected+0x34>)
|
|
10005bea: 22b2 movs r2, #178 @ 0xb2
|
|
10005bec: 0092 lsls r2, r2, #2
|
|
10005bee: 4362 muls r2, r4
|
|
10005bf0: 189b adds r3, r3, r2
|
|
10005bf2: 791b ldrb r3, [r3, #4]
|
|
10005bf4: 07db lsls r3, r3, #31
|
|
10005bf6: d503 bpl.n 10005c00 <tud_cdc_n_connected+0x30>
|
|
10005bf8: 3001 adds r0, #1
|
|
10005bfa: e7f0 b.n 10005bde <tud_cdc_n_connected+0xe>
|
|
10005bfc: 2000 movs r0, #0
|
|
10005bfe: e7ee b.n 10005bde <tud_cdc_n_connected+0xe>
|
|
10005c00: 2000 movs r0, #0
|
|
10005c02: e7ec b.n 10005bde <tud_cdc_n_connected+0xe>
|
|
10005c04: 20000cfc .word 0x20000cfc
|
|
|
|
10005c08 <tud_cdc_n_available>:
|
|
10005c08: b510 push {r4, lr}
|
|
10005c0a: 23b2 movs r3, #178 @ 0xb2
|
|
10005c0c: 009b lsls r3, r3, #2
|
|
10005c0e: 4343 muls r3, r0
|
|
10005c10: 3310 adds r3, #16
|
|
10005c12: 4802 ldr r0, [pc, #8] @ (10005c1c <tud_cdc_n_available+0x14>)
|
|
10005c14: 1818 adds r0, r3, r0
|
|
10005c16: f000 fdee bl 100067f6 <tu_fifo_count>
|
|
10005c1a: bd10 pop {r4, pc}
|
|
10005c1c: 20000cfc .word 0x20000cfc
|
|
|
|
10005c20 <tud_cdc_n_read>:
|
|
10005c20: b570 push {r4, r5, r6, lr}
|
|
10005c22: 23b2 movs r3, #178 @ 0xb2
|
|
10005c24: 009b lsls r3, r3, #2
|
|
10005c26: 4358 muls r0, r3
|
|
10005c28: 4b06 ldr r3, [pc, #24] @ (10005c44 <tud_cdc_n_read+0x24>)
|
|
10005c2a: 18c5 adds r5, r0, r3
|
|
10005c2c: b292 uxth r2, r2
|
|
10005c2e: 3010 adds r0, #16
|
|
10005c30: 18c0 adds r0, r0, r3
|
|
10005c32: f000 fe47 bl 100068c4 <tu_fifo_read_n>
|
|
10005c36: 0004 movs r4, r0
|
|
10005c38: 0028 movs r0, r5
|
|
10005c3a: f7ff ffa3 bl 10005b84 <_prep_out_transaction>
|
|
10005c3e: 0020 movs r0, r4
|
|
10005c40: bd70 pop {r4, r5, r6, pc}
|
|
10005c42: 46c0 nop @ (mov r8, r8)
|
|
10005c44: 20000cfc .word 0x20000cfc
|
|
|
|
10005c48 <tud_cdc_n_write_flush>:
|
|
10005c48: b570 push {r4, r5, r6, lr}
|
|
10005c4a: 0005 movs r5, r0
|
|
10005c4c: f7ff fa72 bl 10005134 <tud_mounted>
|
|
10005c50: 2800 cmp r0, #0
|
|
10005c52: d104 bne.n 10005c5e <tud_cdc_n_write_flush+0x16>
|
|
10005c54: 2300 movs r3, #0
|
|
10005c56: 2b00 cmp r3, #0
|
|
10005c58: d109 bne.n 10005c6e <tud_cdc_n_write_flush+0x26>
|
|
10005c5a: 2000 movs r0, #0
|
|
10005c5c: bd70 pop {r4, r5, r6, pc}
|
|
10005c5e: f7ff fa71 bl 10005144 <tud_suspended>
|
|
10005c62: 2800 cmp r0, #0
|
|
10005c64: d101 bne.n 10005c6a <tud_cdc_n_write_flush+0x22>
|
|
10005c66: 2301 movs r3, #1
|
|
10005c68: e7f5 b.n 10005c56 <tud_cdc_n_write_flush+0xe>
|
|
10005c6a: 2300 movs r3, #0
|
|
10005c6c: e7f3 b.n 10005c56 <tud_cdc_n_write_flush+0xe>
|
|
10005c6e: 24b2 movs r4, #178 @ 0xb2
|
|
10005c70: 00a4 lsls r4, r4, #2
|
|
10005c72: 436c muls r4, r5
|
|
10005c74: 3420 adds r4, #32
|
|
10005c76: 4b21 ldr r3, [pc, #132] @ (10005cfc <tud_cdc_n_write_flush+0xb4>)
|
|
10005c78: 18e4 adds r4, r4, r3
|
|
10005c7a: 3404 adds r4, #4
|
|
10005c7c: 0020 movs r0, r4
|
|
10005c7e: f000 fdba bl 100067f6 <tu_fifo_count>
|
|
10005c82: 2800 cmp r0, #0
|
|
10005c84: d101 bne.n 10005c8a <tud_cdc_n_write_flush+0x42>
|
|
10005c86: 2000 movs r0, #0
|
|
10005c88: e7e8 b.n 10005c5c <tud_cdc_n_write_flush+0x14>
|
|
10005c8a: 4b1c ldr r3, [pc, #112] @ (10005cfc <tud_cdc_n_write_flush+0xb4>)
|
|
10005c8c: 22b2 movs r2, #178 @ 0xb2
|
|
10005c8e: 0092 lsls r2, r2, #2
|
|
10005c90: 436a muls r2, r5
|
|
10005c92: 189b adds r3, r3, r2
|
|
10005c94: 7899 ldrb r1, [r3, #2]
|
|
10005c96: 2000 movs r0, #0
|
|
10005c98: f7ff fb2e bl 100052f8 <usbd_edpt_claim>
|
|
10005c9c: 2800 cmp r0, #0
|
|
10005c9e: d101 bne.n 10005ca4 <tud_cdc_n_write_flush+0x5c>
|
|
10005ca0: 2000 movs r0, #0
|
|
10005ca2: e7db b.n 10005c5c <tud_cdc_n_write_flush+0x14>
|
|
10005ca4: 26b2 movs r6, #178 @ 0xb2
|
|
10005ca6: 00b6 lsls r6, r6, #2
|
|
10005ca8: 436e muls r6, r5
|
|
10005caa: 23a2 movs r3, #162 @ 0xa2
|
|
10005cac: 009b lsls r3, r3, #2
|
|
10005cae: 469c mov ip, r3
|
|
10005cb0: 4466 add r6, ip
|
|
10005cb2: 4b12 ldr r3, [pc, #72] @ (10005cfc <tud_cdc_n_write_flush+0xb4>)
|
|
10005cb4: 18f6 adds r6, r6, r3
|
|
10005cb6: 2240 movs r2, #64 @ 0x40
|
|
10005cb8: 0031 movs r1, r6
|
|
10005cba: 0020 movs r0, r4
|
|
10005cbc: f000 fe02 bl 100068c4 <tu_fifo_read_n>
|
|
10005cc0: 1e04 subs r4, r0, #0
|
|
10005cc2: d00e beq.n 10005ce2 <tud_cdc_n_write_flush+0x9a>
|
|
10005cc4: 4b0d ldr r3, [pc, #52] @ (10005cfc <tud_cdc_n_write_flush+0xb4>)
|
|
10005cc6: 22b2 movs r2, #178 @ 0xb2
|
|
10005cc8: 0092 lsls r2, r2, #2
|
|
10005cca: 436a muls r2, r5
|
|
10005ccc: 189b adds r3, r3, r2
|
|
10005cce: 7899 ldrb r1, [r3, #2]
|
|
10005cd0: 0003 movs r3, r0
|
|
10005cd2: 0032 movs r2, r6
|
|
10005cd4: 2000 movs r0, #0
|
|
10005cd6: f7ff fb37 bl 10005348 <usbd_edpt_xfer>
|
|
10005cda: 2800 cmp r0, #0
|
|
10005cdc: d00c beq.n 10005cf8 <tud_cdc_n_write_flush+0xb0>
|
|
10005cde: 0020 movs r0, r4
|
|
10005ce0: e7bc b.n 10005c5c <tud_cdc_n_write_flush+0x14>
|
|
10005ce2: 4b06 ldr r3, [pc, #24] @ (10005cfc <tud_cdc_n_write_flush+0xb4>)
|
|
10005ce4: 22b2 movs r2, #178 @ 0xb2
|
|
10005ce6: 0092 lsls r2, r2, #2
|
|
10005ce8: 436a muls r2, r5
|
|
10005cea: 189b adds r3, r3, r2
|
|
10005cec: 7899 ldrb r1, [r3, #2]
|
|
10005cee: 2000 movs r0, #0
|
|
10005cf0: f7ff fb16 bl 10005320 <usbd_edpt_release>
|
|
10005cf4: 2000 movs r0, #0
|
|
10005cf6: e7b1 b.n 10005c5c <tud_cdc_n_write_flush+0x14>
|
|
10005cf8: 2000 movs r0, #0
|
|
10005cfa: e7af b.n 10005c5c <tud_cdc_n_write_flush+0x14>
|
|
10005cfc: 20000cfc .word 0x20000cfc
|
|
|
|
10005d00 <tud_cdc_n_write>:
|
|
10005d00: b570 push {r4, r5, r6, lr}
|
|
10005d02: 0005 movs r5, r0
|
|
10005d04: 24b2 movs r4, #178 @ 0xb2
|
|
10005d06: 00a4 lsls r4, r4, #2
|
|
10005d08: 4344 muls r4, r0
|
|
10005d0a: 3420 adds r4, #32
|
|
10005d0c: 4b09 ldr r3, [pc, #36] @ (10005d34 <tud_cdc_n_write+0x34>)
|
|
10005d0e: 18e4 adds r4, r4, r3
|
|
10005d10: 3404 adds r4, #4
|
|
10005d12: b292 uxth r2, r2
|
|
10005d14: 0020 movs r0, r4
|
|
10005d16: f000 fe0c bl 10006932 <tu_fifo_write_n>
|
|
10005d1a: 0006 movs r6, r0
|
|
10005d1c: 0020 movs r0, r4
|
|
10005d1e: f000 fd6a bl 100067f6 <tu_fifo_count>
|
|
10005d22: 283f cmp r0, #63 @ 0x3f
|
|
10005d24: d801 bhi.n 10005d2a <tud_cdc_n_write+0x2a>
|
|
10005d26: 0030 movs r0, r6
|
|
10005d28: bd70 pop {r4, r5, r6, pc}
|
|
10005d2a: 0028 movs r0, r5
|
|
10005d2c: f7ff ff8c bl 10005c48 <tud_cdc_n_write_flush>
|
|
10005d30: e7f9 b.n 10005d26 <tud_cdc_n_write+0x26>
|
|
10005d32: 46c0 nop @ (mov r8, r8)
|
|
10005d34: 20000cfc .word 0x20000cfc
|
|
|
|
10005d38 <tud_cdc_n_write_available>:
|
|
10005d38: b510 push {r4, lr}
|
|
10005d3a: 23b2 movs r3, #178 @ 0xb2
|
|
10005d3c: 009b lsls r3, r3, #2
|
|
10005d3e: 4358 muls r0, r3
|
|
10005d40: 3020 adds r0, #32
|
|
10005d42: 4b03 ldr r3, [pc, #12] @ (10005d50 <tud_cdc_n_write_available+0x18>)
|
|
10005d44: 18c0 adds r0, r0, r3
|
|
10005d46: 3004 adds r0, #4
|
|
10005d48: f000 fd85 bl 10006856 <tu_fifo_remaining>
|
|
10005d4c: bd10 pop {r4, pc}
|
|
10005d4e: 46c0 nop @ (mov r8, r8)
|
|
10005d50: 20000cfc .word 0x20000cfc
|
|
|
|
10005d54 <cdcd_init>:
|
|
10005d54: b5f0 push {r4, r5, r6, r7, lr}
|
|
10005d56: 46ce mov lr, r9
|
|
10005d58: 4647 mov r7, r8
|
|
10005d5a: b580 push {r7, lr}
|
|
10005d5c: b083 sub sp, #12
|
|
10005d5e: 482a ldr r0, [pc, #168] @ (10005e08 <cdcd_init+0xb4>)
|
|
10005d60: 22b2 movs r2, #178 @ 0xb2
|
|
10005d62: 0092 lsls r2, r2, #2
|
|
10005d64: 2100 movs r1, #0
|
|
10005d66: f7fe f9d3 bl 10004110 <__wrap_memset>
|
|
10005d6a: 2700 movs r7, #0
|
|
10005d6c: 2f00 cmp r7, #0
|
|
10005d6e: d004 beq.n 10005d7a <cdcd_init+0x26>
|
|
10005d70: b003 add sp, #12
|
|
10005d72: bcc0 pop {r6, r7}
|
|
10005d74: 46b9 mov r9, r7
|
|
10005d76: 46b0 mov r8, r6
|
|
10005d78: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10005d7a: 4e23 ldr r6, [pc, #140] @ (10005e08 <cdcd_init+0xb4>)
|
|
10005d7c: 24b2 movs r4, #178 @ 0xb2
|
|
10005d7e: 00a4 lsls r4, r4, #2
|
|
10005d80: 437c muls r4, r7
|
|
10005d82: 1935 adds r5, r6, r4
|
|
10005d84: 23ff movs r3, #255 @ 0xff
|
|
10005d86: 716b strb r3, [r5, #5]
|
|
10005d88: 2300 movs r3, #0
|
|
10005d8a: 4698 mov r8, r3
|
|
10005d8c: 4a1f ldr r2, [pc, #124] @ (10005e0c <cdcd_init+0xb8>)
|
|
10005d8e: 80ea strh r2, [r5, #6]
|
|
10005d90: 2201 movs r2, #1
|
|
10005d92: 812a strh r2, [r5, #8]
|
|
10005d94: 72ab strb r3, [r5, #10]
|
|
10005d96: 72eb strb r3, [r5, #11]
|
|
10005d98: 2308 movs r3, #8
|
|
10005d9a: 732b strb r3, [r5, #12]
|
|
10005d9c: 0021 movs r1, r4
|
|
10005d9e: 3138 adds r1, #56 @ 0x38
|
|
10005da0: 1989 adds r1, r1, r6
|
|
10005da2: 33f8 adds r3, #248 @ 0xf8
|
|
10005da4: 4699 mov r9, r3
|
|
10005da6: 0020 movs r0, r4
|
|
10005da8: 3010 adds r0, #16
|
|
10005daa: 1980 adds r0, r0, r6
|
|
10005dac: 4643 mov r3, r8
|
|
10005dae: 9300 str r3, [sp, #0]
|
|
10005db0: 3301 adds r3, #1
|
|
10005db2: 464a mov r2, r9
|
|
10005db4: f000 fce1 bl 1000677a <tu_fifo_config>
|
|
10005db8: 0021 movs r1, r4
|
|
10005dba: 3139 adds r1, #57 @ 0x39
|
|
10005dbc: 31ff adds r1, #255 @ 0xff
|
|
10005dbe: 1989 adds r1, r1, r6
|
|
10005dc0: 0020 movs r0, r4
|
|
10005dc2: 3020 adds r0, #32
|
|
10005dc4: 1980 adds r0, r0, r6
|
|
10005dc6: 3004 adds r0, #4
|
|
10005dc8: 2301 movs r3, #1
|
|
10005dca: 9300 str r3, [sp, #0]
|
|
10005dcc: 464a mov r2, r9
|
|
10005dce: f000 fcd4 bl 1000677a <tu_fifo_config>
|
|
10005dd2: 238e movs r3, #142 @ 0x8e
|
|
10005dd4: 009b lsls r3, r3, #2
|
|
10005dd6: 18e3 adds r3, r4, r3
|
|
10005dd8: 4699 mov r9, r3
|
|
10005dda: 44b1 add r9, r6
|
|
10005ddc: 4648 mov r0, r9
|
|
10005dde: f7fb fa26 bl 1000122e <mutex_init>
|
|
10005de2: 4643 mov r3, r8
|
|
10005de4: 61eb str r3, [r5, #28]
|
|
10005de6: 464b mov r3, r9
|
|
10005de8: 622b str r3, [r5, #32]
|
|
10005dea: 2390 movs r3, #144 @ 0x90
|
|
10005dec: 009b lsls r3, r3, #2
|
|
10005dee: 469c mov ip, r3
|
|
10005df0: 4464 add r4, ip
|
|
10005df2: 19a4 adds r4, r4, r6
|
|
10005df4: 0020 movs r0, r4
|
|
10005df6: f7fb fa1a bl 1000122e <mutex_init>
|
|
10005dfa: 632c str r4, [r5, #48] @ 0x30
|
|
10005dfc: 4643 mov r3, r8
|
|
10005dfe: 636b str r3, [r5, #52] @ 0x34
|
|
10005e00: 3701 adds r7, #1
|
|
10005e02: b2ff uxtb r7, r7
|
|
10005e04: e7b2 b.n 10005d6c <cdcd_init+0x18>
|
|
10005e06: 46c0 nop @ (mov r8, r8)
|
|
10005e08: 20000cfc .word 0x20000cfc
|
|
10005e0c: ffffc200 .word 0xffffc200
|
|
|
|
10005e10 <cdcd_reset>:
|
|
10005e10: b570 push {r4, r5, r6, lr}
|
|
10005e12: 2500 movs r5, #0
|
|
10005e14: 2d00 cmp r5, #0
|
|
10005e16: d000 beq.n 10005e1a <cdcd_reset+0xa>
|
|
10005e18: bd70 pop {r4, r5, r6, pc}
|
|
10005e1a: 24b2 movs r4, #178 @ 0xb2
|
|
10005e1c: 00a4 lsls r4, r4, #2
|
|
10005e1e: 436c muls r4, r5
|
|
10005e20: 4e0b ldr r6, [pc, #44] @ (10005e50 <cdcd_reset+0x40>)
|
|
10005e22: 19a0 adds r0, r4, r6
|
|
10005e24: 2205 movs r2, #5
|
|
10005e26: 2100 movs r1, #0
|
|
10005e28: f7fe f972 bl 10004110 <__wrap_memset>
|
|
10005e2c: 0020 movs r0, r4
|
|
10005e2e: 3010 adds r0, #16
|
|
10005e30: 1980 adds r0, r0, r6
|
|
10005e32: f000 fd83 bl 1000693c <tu_fifo_clear>
|
|
10005e36: 3420 adds r4, #32
|
|
10005e38: 19a4 adds r4, r4, r6
|
|
10005e3a: 3404 adds r4, #4
|
|
10005e3c: 0020 movs r0, r4
|
|
10005e3e: f000 fd7d bl 1000693c <tu_fifo_clear>
|
|
10005e42: 2101 movs r1, #1
|
|
10005e44: 0020 movs r0, r4
|
|
10005e46: f000 fd98 bl 1000697a <tu_fifo_set_overwritable>
|
|
10005e4a: 3501 adds r5, #1
|
|
10005e4c: b2ed uxtb r5, r5
|
|
10005e4e: e7e1 b.n 10005e14 <cdcd_reset+0x4>
|
|
10005e50: 20000cfc .word 0x20000cfc
|
|
|
|
10005e54 <cdcd_open>:
|
|
10005e54: b5f0 push {r4, r5, r6, r7, lr}
|
|
10005e56: b083 sub sp, #12
|
|
10005e58: 0004 movs r4, r0
|
|
10005e5a: 794b ldrb r3, [r1, #5]
|
|
10005e5c: 2b02 cmp r3, #2
|
|
10005e5e: d14e bne.n 10005efe <cdcd_open+0xaa>
|
|
10005e60: 798b ldrb r3, [r1, #6]
|
|
10005e62: 2b02 cmp r3, #2
|
|
10005e64: d14f bne.n 10005f06 <cdcd_open+0xb2>
|
|
10005e66: 2300 movs r3, #0
|
|
10005e68: 2b00 cmp r3, #0
|
|
10005e6a: d001 beq.n 10005e70 <cdcd_open+0x1c>
|
|
10005e6c: 2500 movs r5, #0
|
|
10005e6e: e047 b.n 10005f00 <cdcd_open+0xac>
|
|
10005e70: 4828 ldr r0, [pc, #160] @ (10005f14 <cdcd_open+0xc0>)
|
|
10005e72: 25b2 movs r5, #178 @ 0xb2
|
|
10005e74: 00ad lsls r5, r5, #2
|
|
10005e76: 435d muls r5, r3
|
|
10005e78: 1940 adds r0, r0, r5
|
|
10005e7a: 7880 ldrb r0, [r0, #2]
|
|
10005e7c: 2800 cmp r0, #0
|
|
10005e7e: d002 beq.n 10005e86 <cdcd_open+0x32>
|
|
10005e80: 3301 adds r3, #1
|
|
10005e82: b2db uxtb r3, r3
|
|
10005e84: e7f0 b.n 10005e68 <cdcd_open+0x14>
|
|
10005e86: 4b23 ldr r3, [pc, #140] @ (10005f14 <cdcd_open+0xc0>)
|
|
10005e88: 18ee adds r6, r5, r3
|
|
10005e8a: 788b ldrb r3, [r1, #2]
|
|
10005e8c: 7033 strb r3, [r6, #0]
|
|
10005e8e: 780f ldrb r7, [r1, #0]
|
|
10005e90: 19cf adds r7, r1, r7
|
|
10005e92: 2509 movs r5, #9
|
|
10005e94: e003 b.n 10005e9e <cdcd_open+0x4a>
|
|
10005e96: 783b ldrb r3, [r7, #0]
|
|
10005e98: 195d adds r5, r3, r5
|
|
10005e9a: b2ad uxth r5, r5
|
|
10005e9c: 18ff adds r7, r7, r3
|
|
10005e9e: 787b ldrb r3, [r7, #1]
|
|
10005ea0: 2b24 cmp r3, #36 @ 0x24
|
|
10005ea2: d101 bne.n 10005ea8 <cdcd_open+0x54>
|
|
10005ea4: 4295 cmp r5, r2
|
|
10005ea6: d9f6 bls.n 10005e96 <cdcd_open+0x42>
|
|
10005ea8: 2b05 cmp r3, #5
|
|
10005eaa: d009 beq.n 10005ec0 <cdcd_open+0x6c>
|
|
10005eac: 787b ldrb r3, [r7, #1]
|
|
10005eae: 2b04 cmp r3, #4
|
|
10005eb0: d102 bne.n 10005eb8 <cdcd_open+0x64>
|
|
10005eb2: 797b ldrb r3, [r7, #5]
|
|
10005eb4: 2b0a cmp r3, #10
|
|
10005eb6: d010 beq.n 10005eda <cdcd_open+0x86>
|
|
10005eb8: 0030 movs r0, r6
|
|
10005eba: f7ff fe63 bl 10005b84 <_prep_out_transaction>
|
|
10005ebe: e01f b.n 10005f00 <cdcd_open+0xac>
|
|
10005ec0: 0039 movs r1, r7
|
|
10005ec2: 0020 movs r0, r4
|
|
10005ec4: f7ff f9cc bl 10005260 <usbd_edpt_open>
|
|
10005ec8: 2800 cmp r0, #0
|
|
10005eca: d01e beq.n 10005f0a <cdcd_open+0xb6>
|
|
10005ecc: 78bb ldrb r3, [r7, #2]
|
|
10005ece: 7073 strb r3, [r6, #1]
|
|
10005ed0: 783b ldrb r3, [r7, #0]
|
|
10005ed2: 195d adds r5, r3, r5
|
|
10005ed4: b2ad uxth r5, r5
|
|
10005ed6: 18ff adds r7, r7, r3
|
|
10005ed8: e7e8 b.n 10005eac <cdcd_open+0x58>
|
|
10005eda: 7839 ldrb r1, [r7, #0]
|
|
10005edc: 194d adds r5, r1, r5
|
|
10005ede: b2ad uxth r5, r5
|
|
10005ee0: 1879 adds r1, r7, r1
|
|
10005ee2: 1cb3 adds r3, r6, #2
|
|
10005ee4: 9301 str r3, [sp, #4]
|
|
10005ee6: 1cf3 adds r3, r6, #3
|
|
10005ee8: 9300 str r3, [sp, #0]
|
|
10005eea: 2302 movs r3, #2
|
|
10005eec: 2202 movs r2, #2
|
|
10005eee: 0020 movs r0, r4
|
|
10005ef0: f7ff f9d0 bl 10005294 <usbd_open_edpt_pair>
|
|
10005ef4: 2800 cmp r0, #0
|
|
10005ef6: d00a beq.n 10005f0e <cdcd_open+0xba>
|
|
10005ef8: 350e adds r5, #14
|
|
10005efa: b2ad uxth r5, r5
|
|
10005efc: e7dc b.n 10005eb8 <cdcd_open+0x64>
|
|
10005efe: 2500 movs r5, #0
|
|
10005f00: 0028 movs r0, r5
|
|
10005f02: b003 add sp, #12
|
|
10005f04: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10005f06: 2500 movs r5, #0
|
|
10005f08: e7fa b.n 10005f00 <cdcd_open+0xac>
|
|
10005f0a: 2500 movs r5, #0
|
|
10005f0c: e7f8 b.n 10005f00 <cdcd_open+0xac>
|
|
10005f0e: 2500 movs r5, #0
|
|
10005f10: e7f6 b.n 10005f00 <cdcd_open+0xac>
|
|
10005f12: 46c0 nop @ (mov r8, r8)
|
|
10005f14: 20000cfc .word 0x20000cfc
|
|
|
|
10005f18 <cdcd_control_xfer_cb>:
|
|
10005f18: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10005f1a: 0014 movs r4, r2
|
|
10005f1c: 7812 ldrb r2, [r2, #0]
|
|
10005f1e: 2360 movs r3, #96 @ 0x60
|
|
10005f20: 4013 ands r3, r2
|
|
10005f22: 2b20 cmp r3, #32
|
|
10005f24: d000 beq.n 10005f28 <cdcd_control_xfer_cb+0x10>
|
|
10005f26: e07f b.n 10006028 <cdcd_control_xfer_cb+0x110>
|
|
10005f28: 4a44 ldr r2, [pc, #272] @ (1000603c <cdcd_control_xfer_cb+0x124>)
|
|
10005f2a: 2500 movs r5, #0
|
|
10005f2c: 2d00 cmp r5, #0
|
|
10005f2e: d000 beq.n 10005f32 <cdcd_control_xfer_cb+0x1a>
|
|
10005f30: e07c b.n 1000602c <cdcd_control_xfer_cb+0x114>
|
|
10005f32: 7816 ldrb r6, [r2, #0]
|
|
10005f34: 7927 ldrb r7, [r4, #4]
|
|
10005f36: 7963 ldrb r3, [r4, #5]
|
|
10005f38: 021b lsls r3, r3, #8
|
|
10005f3a: 433b orrs r3, r7
|
|
10005f3c: 429e cmp r6, r3
|
|
10005f3e: d006 beq.n 10005f4e <cdcd_control_xfer_cb+0x36>
|
|
10005f40: 3501 adds r5, #1
|
|
10005f42: b2ed uxtb r5, r5
|
|
10005f44: 23b2 movs r3, #178 @ 0xb2
|
|
10005f46: 009b lsls r3, r3, #2
|
|
10005f48: 469c mov ip, r3
|
|
10005f4a: 4462 add r2, ip
|
|
10005f4c: e7ee b.n 10005f2c <cdcd_control_xfer_cb+0x14>
|
|
10005f4e: 7863 ldrb r3, [r4, #1]
|
|
10005f50: 2b22 cmp r3, #34 @ 0x22
|
|
10005f52: d031 beq.n 10005fb8 <cdcd_control_xfer_cb+0xa0>
|
|
10005f54: d809 bhi.n 10005f6a <cdcd_control_xfer_cb+0x52>
|
|
10005f56: 2b20 cmp r3, #32
|
|
10005f58: d011 beq.n 10005f7e <cdcd_control_xfer_cb+0x66>
|
|
10005f5a: 2b21 cmp r3, #33 @ 0x21
|
|
10005f5c: d103 bne.n 10005f66 <cdcd_control_xfer_cb+0x4e>
|
|
10005f5e: 2901 cmp r1, #1
|
|
10005f60: d023 beq.n 10005faa <cdcd_control_xfer_cb+0x92>
|
|
10005f62: 2001 movs r0, #1
|
|
10005f64: e061 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f66: 2000 movs r0, #0
|
|
10005f68: e05f b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f6a: 2b23 cmp r3, #35 @ 0x23
|
|
10005f6c: d105 bne.n 10005f7a <cdcd_control_xfer_cb+0x62>
|
|
10005f6e: 2901 cmp r1, #1
|
|
10005f70: d049 beq.n 10006006 <cdcd_control_xfer_cb+0xee>
|
|
10005f72: 2903 cmp r1, #3
|
|
10005f74: d04c beq.n 10006010 <cdcd_control_xfer_cb+0xf8>
|
|
10005f76: 2001 movs r0, #1
|
|
10005f78: e057 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f7a: 2000 movs r0, #0
|
|
10005f7c: e055 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f7e: 2901 cmp r1, #1
|
|
10005f80: d003 beq.n 10005f8a <cdcd_control_xfer_cb+0x72>
|
|
10005f82: 2903 cmp r1, #3
|
|
10005f84: d008 beq.n 10005f98 <cdcd_control_xfer_cb+0x80>
|
|
10005f86: 2001 movs r0, #1
|
|
10005f88: e04f b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f8a: 3206 adds r2, #6
|
|
10005f8c: 2307 movs r3, #7
|
|
10005f8e: 0021 movs r1, r4
|
|
10005f90: f7ff fd48 bl 10005a24 <tud_control_xfer>
|
|
10005f94: 2001 movs r0, #1
|
|
10005f96: e048 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005f98: 4b29 ldr r3, [pc, #164] @ (10006040 <cdcd_control_xfer_cb+0x128>)
|
|
10005f9a: 2b00 cmp r3, #0
|
|
10005f9c: d048 beq.n 10006030 <cdcd_control_xfer_cb+0x118>
|
|
10005f9e: 1d91 adds r1, r2, #6
|
|
10005fa0: 0028 movs r0, r5
|
|
10005fa2: f7fe fabb bl 1000451c <tud_cdc_line_coding_cb>
|
|
10005fa6: 2001 movs r0, #1
|
|
10005fa8: e03f b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005faa: 3206 adds r2, #6
|
|
10005fac: 2307 movs r3, #7
|
|
10005fae: 0021 movs r1, r4
|
|
10005fb0: f7ff fd38 bl 10005a24 <tud_control_xfer>
|
|
10005fb4: 2001 movs r0, #1
|
|
10005fb6: e038 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005fb8: 2901 cmp r1, #1
|
|
10005fba: d003 beq.n 10005fc4 <cdcd_control_xfer_cb+0xac>
|
|
10005fbc: 2903 cmp r1, #3
|
|
10005fbe: d006 beq.n 10005fce <cdcd_control_xfer_cb+0xb6>
|
|
10005fc0: 2001 movs r0, #1
|
|
10005fc2: e032 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005fc4: 0021 movs r1, r4
|
|
10005fc6: f7ff fd19 bl 100059fc <tud_control_status>
|
|
10005fca: 2001 movs r0, #1
|
|
10005fcc: e02d b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10005fce: 78a1 ldrb r1, [r4, #2]
|
|
10005fd0: 78e3 ldrb r3, [r4, #3]
|
|
10005fd2: 021b lsls r3, r3, #8
|
|
10005fd4: 430b orrs r3, r1
|
|
10005fd6: 2001 movs r0, #1
|
|
10005fd8: 0019 movs r1, r3
|
|
10005fda: 4001 ands r1, r0
|
|
10005fdc: 000e movs r6, r1
|
|
10005fde: 085c lsrs r4, r3, #1
|
|
10005fe0: 4004 ands r4, r0
|
|
10005fe2: 7113 strb r3, [r2, #4]
|
|
10005fe4: 424b negs r3, r1
|
|
10005fe6: 4159 adcs r1, r3
|
|
10005fe8: b2c9 uxtb r1, r1
|
|
10005fea: 3224 adds r2, #36 @ 0x24
|
|
10005fec: 0010 movs r0, r2
|
|
10005fee: f000 fcc4 bl 1000697a <tu_fifo_set_overwritable>
|
|
10005ff2: 4b14 ldr r3, [pc, #80] @ (10006044 <cdcd_control_xfer_cb+0x12c>)
|
|
10005ff4: 2b00 cmp r3, #0
|
|
10005ff6: d01d beq.n 10006034 <cdcd_control_xfer_cb+0x11c>
|
|
10005ff8: 0022 movs r2, r4
|
|
10005ffa: 0031 movs r1, r6
|
|
10005ffc: 0028 movs r0, r5
|
|
10005ffe: e000 b.n 10006002 <cdcd_control_xfer_cb+0xea>
|
|
10006000: bf00 nop
|
|
10006002: 2001 movs r0, #1
|
|
10006004: e011 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006006: 0021 movs r1, r4
|
|
10006008: f7ff fcf8 bl 100059fc <tud_control_status>
|
|
1000600c: 2001 movs r0, #1
|
|
1000600e: e00c b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006010: 4b0d ldr r3, [pc, #52] @ (10006048 <cdcd_control_xfer_cb+0x130>)
|
|
10006012: 2b00 cmp r3, #0
|
|
10006014: d010 beq.n 10006038 <cdcd_control_xfer_cb+0x120>
|
|
10006016: 78a3 ldrb r3, [r4, #2]
|
|
10006018: 78e1 ldrb r1, [r4, #3]
|
|
1000601a: 0209 lsls r1, r1, #8
|
|
1000601c: 4319 orrs r1, r3
|
|
1000601e: 0028 movs r0, r5
|
|
10006020: e000 b.n 10006024 <cdcd_control_xfer_cb+0x10c>
|
|
10006022: bf00 nop
|
|
10006024: 2001 movs r0, #1
|
|
10006026: e000 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006028: 2000 movs r0, #0
|
|
1000602a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
1000602c: 2000 movs r0, #0
|
|
1000602e: e7fc b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006030: 2001 movs r0, #1
|
|
10006032: e7fa b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006034: 2001 movs r0, #1
|
|
10006036: e7f8 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
10006038: 2001 movs r0, #1
|
|
1000603a: e7f6 b.n 1000602a <cdcd_control_xfer_cb+0x112>
|
|
1000603c: 20000cfc .word 0x20000cfc
|
|
10006040: 1000451d .word 0x1000451d
|
|
...
|
|
|
|
1000604c <cdcd_xfer_cb>:
|
|
1000604c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000604e: 46d6 mov lr, sl
|
|
10006050: b500 push {lr}
|
|
10006052: b082 sub sp, #8
|
|
10006054: 9001 str r0, [sp, #4]
|
|
10006056: 000f movs r7, r1
|
|
10006058: 9300 str r3, [sp, #0]
|
|
1000605a: 2400 movs r4, #0
|
|
1000605c: 2c00 cmp r4, #0
|
|
1000605e: d00e beq.n 1000607e <cdcd_xfer_cb+0x32>
|
|
10006060: 2c00 cmp r4, #0
|
|
10006062: d000 beq.n 10006066 <cdcd_xfer_cb+0x1a>
|
|
10006064: e07c b.n 10006160 <cdcd_xfer_cb+0x114>
|
|
10006066: 78eb ldrb r3, [r5, #3]
|
|
10006068: 42bb cmp r3, r7
|
|
1000606a: d016 beq.n 1000609a <cdcd_xfer_cb+0x4e>
|
|
1000606c: 78ab ldrb r3, [r5, #2]
|
|
1000606e: 42bb cmp r3, r7
|
|
10006070: d04d beq.n 1000610e <cdcd_xfer_cb+0xc2>
|
|
10006072: 2401 movs r4, #1
|
|
10006074: 0020 movs r0, r4
|
|
10006076: b002 add sp, #8
|
|
10006078: bc80 pop {r7}
|
|
1000607a: 46ba mov sl, r7
|
|
1000607c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000607e: 25b2 movs r5, #178 @ 0xb2
|
|
10006080: 00ad lsls r5, r5, #2
|
|
10006082: 4365 muls r5, r4
|
|
10006084: 4b39 ldr r3, [pc, #228] @ (1000616c <cdcd_xfer_cb+0x120>)
|
|
10006086: 18ed adds r5, r5, r3
|
|
10006088: 78eb ldrb r3, [r5, #3]
|
|
1000608a: 42bb cmp r3, r7
|
|
1000608c: d0e8 beq.n 10006060 <cdcd_xfer_cb+0x14>
|
|
1000608e: 78ab ldrb r3, [r5, #2]
|
|
10006090: 42bb cmp r3, r7
|
|
10006092: d0e5 beq.n 10006060 <cdcd_xfer_cb+0x14>
|
|
10006094: 3401 adds r4, #1
|
|
10006096: b2e4 uxtb r4, r4
|
|
10006098: e7e0 b.n 1000605c <cdcd_xfer_cb+0x10>
|
|
1000609a: 2310 movs r3, #16
|
|
1000609c: 469a mov sl, r3
|
|
1000609e: 44aa add sl, r5
|
|
100060a0: 2392 movs r3, #146 @ 0x92
|
|
100060a2: 009b lsls r3, r3, #2
|
|
100060a4: 18e9 adds r1, r5, r3
|
|
100060a6: 466b mov r3, sp
|
|
100060a8: 881a ldrh r2, [r3, #0]
|
|
100060aa: 4650 mov r0, sl
|
|
100060ac: f000 fc41 bl 10006932 <tu_fifo_write_n>
|
|
100060b0: 4b2f ldr r3, [pc, #188] @ (10006170 <cdcd_xfer_cb+0x124>)
|
|
100060b2: 2b00 cmp r3, #0
|
|
100060b4: d01b beq.n 100060ee <cdcd_xfer_cb+0xa2>
|
|
100060b6: 796b ldrb r3, [r5, #5]
|
|
100060b8: 2bff cmp r3, #255 @ 0xff
|
|
100060ba: d018 beq.n 100060ee <cdcd_xfer_cb+0xa2>
|
|
100060bc: 2600 movs r6, #0
|
|
100060be: e000 b.n 100060c2 <cdcd_xfer_cb+0x76>
|
|
100060c0: 3601 adds r6, #1
|
|
100060c2: 9b00 ldr r3, [sp, #0]
|
|
100060c4: 429e cmp r6, r3
|
|
100060c6: d212 bcs.n 100060ee <cdcd_xfer_cb+0xa2>
|
|
100060c8: 796a ldrb r2, [r5, #5]
|
|
100060ca: 19ab adds r3, r5, r6
|
|
100060cc: 2192 movs r1, #146 @ 0x92
|
|
100060ce: 0089 lsls r1, r1, #2
|
|
100060d0: 468c mov ip, r1
|
|
100060d2: 4463 add r3, ip
|
|
100060d4: 781b ldrb r3, [r3, #0]
|
|
100060d6: 429a cmp r2, r3
|
|
100060d8: d1f2 bne.n 100060c0 <cdcd_xfer_cb+0x74>
|
|
100060da: 4650 mov r0, sl
|
|
100060dc: f000 fba0 bl 10006820 <tu_fifo_empty>
|
|
100060e0: 2800 cmp r0, #0
|
|
100060e2: d1ed bne.n 100060c0 <cdcd_xfer_cb+0x74>
|
|
100060e4: 7969 ldrb r1, [r5, #5]
|
|
100060e6: 0020 movs r0, r4
|
|
100060e8: e000 b.n 100060ec <cdcd_xfer_cb+0xa0>
|
|
100060ea: bf00 nop
|
|
100060ec: e7e8 b.n 100060c0 <cdcd_xfer_cb+0x74>
|
|
100060ee: 4b21 ldr r3, [pc, #132] @ (10006174 <cdcd_xfer_cb+0x128>)
|
|
100060f0: 2b00 cmp r3, #0
|
|
100060f2: d004 beq.n 100060fe <cdcd_xfer_cb+0xb2>
|
|
100060f4: 4650 mov r0, sl
|
|
100060f6: f000 fb93 bl 10006820 <tu_fifo_empty>
|
|
100060fa: 2800 cmp r0, #0
|
|
100060fc: d003 beq.n 10006106 <cdcd_xfer_cb+0xba>
|
|
100060fe: 0028 movs r0, r5
|
|
10006100: f7ff fd40 bl 10005b84 <_prep_out_transaction>
|
|
10006104: e7b2 b.n 1000606c <cdcd_xfer_cb+0x20>
|
|
10006106: 0020 movs r0, r4
|
|
10006108: f7fe fb42 bl 10004790 <tud_cdc_rx_cb>
|
|
1000610c: e7f7 b.n 100060fe <cdcd_xfer_cb+0xb2>
|
|
1000610e: 4b1a ldr r3, [pc, #104] @ (10006178 <cdcd_xfer_cb+0x12c>)
|
|
10006110: 2b00 cmp r3, #0
|
|
10006112: d002 beq.n 1000611a <cdcd_xfer_cb+0xce>
|
|
10006114: 0020 movs r0, r4
|
|
10006116: e000 b.n 1000611a <cdcd_xfer_cb+0xce>
|
|
10006118: bf00 nop
|
|
1000611a: 0020 movs r0, r4
|
|
1000611c: f7ff fd94 bl 10005c48 <tud_cdc_n_write_flush>
|
|
10006120: 2800 cmp r0, #0
|
|
10006122: d001 beq.n 10006128 <cdcd_xfer_cb+0xdc>
|
|
10006124: 2401 movs r4, #1
|
|
10006126: e7a5 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006128: 0028 movs r0, r5
|
|
1000612a: 3024 adds r0, #36 @ 0x24
|
|
1000612c: f000 fb63 bl 100067f6 <tu_fifo_count>
|
|
10006130: 2800 cmp r0, #0
|
|
10006132: d117 bne.n 10006164 <cdcd_xfer_cb+0x118>
|
|
10006134: 9b00 ldr r3, [sp, #0]
|
|
10006136: 2b00 cmp r3, #0
|
|
10006138: d016 beq.n 10006168 <cdcd_xfer_cb+0x11c>
|
|
1000613a: 069e lsls r6, r3, #26
|
|
1000613c: d001 beq.n 10006142 <cdcd_xfer_cb+0xf6>
|
|
1000613e: 2401 movs r4, #1
|
|
10006140: e798 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006142: 78a9 ldrb r1, [r5, #2]
|
|
10006144: 9801 ldr r0, [sp, #4]
|
|
10006146: f7ff f8d7 bl 100052f8 <usbd_edpt_claim>
|
|
1000614a: 1e04 subs r4, r0, #0
|
|
1000614c: d101 bne.n 10006152 <cdcd_xfer_cb+0x106>
|
|
1000614e: 2401 movs r4, #1
|
|
10006150: e790 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006152: 78a9 ldrb r1, [r5, #2]
|
|
10006154: 2300 movs r3, #0
|
|
10006156: 2200 movs r2, #0
|
|
10006158: 9801 ldr r0, [sp, #4]
|
|
1000615a: f7ff f8f5 bl 10005348 <usbd_edpt_xfer>
|
|
1000615e: e789 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006160: 2400 movs r4, #0
|
|
10006162: e787 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006164: 2401 movs r4, #1
|
|
10006166: e785 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
10006168: 2401 movs r4, #1
|
|
1000616a: e783 b.n 10006074 <cdcd_xfer_cb+0x28>
|
|
1000616c: 20000cfc .word 0x20000cfc
|
|
10006170: 00000000 .word 0x00000000
|
|
10006174: 10004791 .word 0x10004791
|
|
10006178: 00000000 .word 0x00000000
|
|
|
|
1000617c <tusb_init>:
|
|
1000617c: b510 push {r4, lr}
|
|
1000617e: 2000 movs r0, #0
|
|
10006180: f7fe fff2 bl 10005168 <tud_init>
|
|
10006184: bd10 pop {r4, pc}
|
|
|
|
10006186 <tusb_inited>:
|
|
10006186: b510 push {r4, lr}
|
|
10006188: f7fe ffe4 bl 10005154 <tud_inited>
|
|
1000618c: 2800 cmp r0, #0
|
|
1000618e: d000 beq.n 10006192 <tusb_inited+0xc>
|
|
10006190: 2001 movs r0, #1
|
|
10006192: bd10 pop {r4, pc}
|
|
|
|
10006194 <tu_edpt_claim>:
|
|
10006194: b570 push {r4, r5, r6, lr}
|
|
10006196: 0004 movs r4, r0
|
|
10006198: 000d movs r5, r1
|
|
1000619a: 7803 ldrb r3, [r0, #0]
|
|
1000619c: 07db lsls r3, r3, #31
|
|
1000619e: 0fd8 lsrs r0, r3, #31
|
|
100061a0: 2b00 cmp r3, #0
|
|
100061a2: d11d bne.n 100061e0 <tu_edpt_claim+0x4c>
|
|
100061a4: 7823 ldrb r3, [r4, #0]
|
|
100061a6: 075b lsls r3, r3, #29
|
|
100061a8: 0fde lsrs r6, r3, #31
|
|
100061aa: 2b00 cmp r3, #0
|
|
100061ac: db19 blt.n 100061e2 <tu_edpt_claim+0x4e>
|
|
100061ae: 2101 movs r1, #1
|
|
100061b0: 4249 negs r1, r1
|
|
100061b2: 0028 movs r0, r5
|
|
100061b4: f002 ffe8 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100061b8: 7823 ldrb r3, [r4, #0]
|
|
100061ba: 07db lsls r3, r3, #31
|
|
100061bc: 0fda lsrs r2, r3, #31
|
|
100061be: 2b00 cmp r3, #0
|
|
100061c0: d107 bne.n 100061d2 <tu_edpt_claim+0x3e>
|
|
100061c2: 7823 ldrb r3, [r4, #0]
|
|
100061c4: 075b lsls r3, r3, #29
|
|
100061c6: d409 bmi.n 100061dc <tu_edpt_claim+0x48>
|
|
100061c8: 7823 ldrb r3, [r4, #0]
|
|
100061ca: 2204 movs r2, #4
|
|
100061cc: 4313 orrs r3, r2
|
|
100061ce: 7023 strb r3, [r4, #0]
|
|
100061d0: 2601 movs r6, #1
|
|
100061d2: 0028 movs r0, r5
|
|
100061d4: f002 ffa8 bl 10009128 <__mutex_exit_veneer>
|
|
100061d8: 0030 movs r0, r6
|
|
100061da: e002 b.n 100061e2 <tu_edpt_claim+0x4e>
|
|
100061dc: 0016 movs r6, r2
|
|
100061de: e7f8 b.n 100061d2 <tu_edpt_claim+0x3e>
|
|
100061e0: 2000 movs r0, #0
|
|
100061e2: bd70 pop {r4, r5, r6, pc}
|
|
|
|
100061e4 <tu_edpt_release>:
|
|
100061e4: b570 push {r4, r5, r6, lr}
|
|
100061e6: 0006 movs r6, r0
|
|
100061e8: 000c movs r4, r1
|
|
100061ea: 2101 movs r1, #1
|
|
100061ec: 4249 negs r1, r1
|
|
100061ee: 0020 movs r0, r4
|
|
100061f0: f002 ffca bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100061f4: 7833 ldrb r3, [r6, #0]
|
|
100061f6: 075b lsls r3, r3, #29
|
|
100061f8: 0fdd lsrs r5, r3, #31
|
|
100061fa: 2b00 cmp r3, #0
|
|
100061fc: db04 blt.n 10006208 <tu_edpt_release+0x24>
|
|
100061fe: 0020 movs r0, r4
|
|
10006200: f002 ff92 bl 10009128 <__mutex_exit_veneer>
|
|
10006204: 0028 movs r0, r5
|
|
10006206: bd70 pop {r4, r5, r6, pc}
|
|
10006208: 7833 ldrb r3, [r6, #0]
|
|
1000620a: 07db lsls r3, r3, #31
|
|
1000620c: d404 bmi.n 10006218 <tu_edpt_release+0x34>
|
|
1000620e: 7833 ldrb r3, [r6, #0]
|
|
10006210: 2204 movs r2, #4
|
|
10006212: 4393 bics r3, r2
|
|
10006214: 7033 strb r3, [r6, #0]
|
|
10006216: e7f2 b.n 100061fe <tu_edpt_release+0x1a>
|
|
10006218: 2500 movs r5, #0
|
|
1000621a: e7f0 b.n 100061fe <tu_edpt_release+0x1a>
|
|
|
|
1000621c <tu_edpt_validate>:
|
|
1000621c: 7902 ldrb r2, [r0, #4]
|
|
1000621e: 7943 ldrb r3, [r0, #5]
|
|
10006220: 021b lsls r3, r3, #8
|
|
10006222: 4313 orrs r3, r2
|
|
10006224: 055b lsls r3, r3, #21
|
|
10006226: 0d5b lsrs r3, r3, #21
|
|
10006228: 78c2 ldrb r2, [r0, #3]
|
|
1000622a: 0792 lsls r2, r2, #30
|
|
1000622c: 0f92 lsrs r2, r2, #30
|
|
1000622e: 2a02 cmp r2, #2
|
|
10006230: d00f beq.n 10006252 <tu_edpt_validate+0x36>
|
|
10006232: 2a03 cmp r2, #3
|
|
10006234: d019 beq.n 1000626a <tu_edpt_validate+0x4e>
|
|
10006236: 2a01 cmp r2, #1
|
|
10006238: d001 beq.n 1000623e <tu_edpt_validate+0x22>
|
|
1000623a: 2000 movs r0, #0
|
|
1000623c: 4770 bx lr
|
|
1000623e: 2902 cmp r1, #2
|
|
10006240: d004 beq.n 1000624c <tu_edpt_validate+0x30>
|
|
10006242: 4a13 ldr r2, [pc, #76] @ (10006290 <tu_edpt_validate+0x74>)
|
|
10006244: 429a cmp r2, r3
|
|
10006246: d31a bcc.n 1000627e <tu_edpt_validate+0x62>
|
|
10006248: 2001 movs r0, #1
|
|
1000624a: e7f7 b.n 1000623c <tu_edpt_validate+0x20>
|
|
1000624c: 2280 movs r2, #128 @ 0x80
|
|
1000624e: 00d2 lsls r2, r2, #3
|
|
10006250: e7f8 b.n 10006244 <tu_edpt_validate+0x28>
|
|
10006252: 2902 cmp r1, #2
|
|
10006254: d003 beq.n 1000625e <tu_edpt_validate+0x42>
|
|
10006256: 2b40 cmp r3, #64 @ 0x40
|
|
10006258: d815 bhi.n 10006286 <tu_edpt_validate+0x6a>
|
|
1000625a: 2001 movs r0, #1
|
|
1000625c: e7ee b.n 1000623c <tu_edpt_validate+0x20>
|
|
1000625e: 2280 movs r2, #128 @ 0x80
|
|
10006260: 0092 lsls r2, r2, #2
|
|
10006262: 4293 cmp r3, r2
|
|
10006264: d10d bne.n 10006282 <tu_edpt_validate+0x66>
|
|
10006266: 2001 movs r0, #1
|
|
10006268: e7e8 b.n 1000623c <tu_edpt_validate+0x20>
|
|
1000626a: 2902 cmp r1, #2
|
|
1000626c: d004 beq.n 10006278 <tu_edpt_validate+0x5c>
|
|
1000626e: 2240 movs r2, #64 @ 0x40
|
|
10006270: 429a cmp r2, r3
|
|
10006272: d30a bcc.n 1000628a <tu_edpt_validate+0x6e>
|
|
10006274: 2001 movs r0, #1
|
|
10006276: e7e1 b.n 1000623c <tu_edpt_validate+0x20>
|
|
10006278: 2280 movs r2, #128 @ 0x80
|
|
1000627a: 00d2 lsls r2, r2, #3
|
|
1000627c: e7f8 b.n 10006270 <tu_edpt_validate+0x54>
|
|
1000627e: 2000 movs r0, #0
|
|
10006280: e7dc b.n 1000623c <tu_edpt_validate+0x20>
|
|
10006282: 2000 movs r0, #0
|
|
10006284: e7da b.n 1000623c <tu_edpt_validate+0x20>
|
|
10006286: 2000 movs r0, #0
|
|
10006288: e7d8 b.n 1000623c <tu_edpt_validate+0x20>
|
|
1000628a: 2000 movs r0, #0
|
|
1000628c: e7d6 b.n 1000623c <tu_edpt_validate+0x20>
|
|
1000628e: 46c0 nop @ (mov r8, r8)
|
|
10006290: 000003ff .word 0x000003ff
|
|
|
|
10006294 <tu_edpt_bind_driver>:
|
|
10006294: b530 push {r4, r5, lr}
|
|
10006296: 188a adds r2, r1, r2
|
|
10006298: e001 b.n 1000629e <tu_edpt_bind_driver+0xa>
|
|
1000629a: 780c ldrb r4, [r1, #0]
|
|
1000629c: 1909 adds r1, r1, r4
|
|
1000629e: 4291 cmp r1, r2
|
|
100062a0: d20a bcs.n 100062b8 <tu_edpt_bind_driver+0x24>
|
|
100062a2: 784c ldrb r4, [r1, #1]
|
|
100062a4: 2c05 cmp r4, #5
|
|
100062a6: d1f8 bne.n 1000629a <tu_edpt_bind_driver+0x6>
|
|
100062a8: 788d ldrb r5, [r1, #2]
|
|
100062aa: 347a adds r4, #122 @ 0x7a
|
|
100062ac: 402c ands r4, r5
|
|
100062ae: 0064 lsls r4, r4, #1
|
|
100062b0: 1904 adds r4, r0, r4
|
|
100062b2: 09ed lsrs r5, r5, #7
|
|
100062b4: 5563 strb r3, [r4, r5]
|
|
100062b6: e7f0 b.n 1000629a <tu_edpt_bind_driver+0x6>
|
|
100062b8: bd30 pop {r4, r5, pc}
|
|
|
|
100062ba <advance_index>:
|
|
100062ba: 0003 movs r3, r0
|
|
100062bc: 188a adds r2, r1, r2
|
|
100062be: b290 uxth r0, r2
|
|
100062c0: 4281 cmp r1, r0
|
|
100062c2: d802 bhi.n 100062ca <advance_index+0x10>
|
|
100062c4: 005a lsls r2, r3, #1
|
|
100062c6: 4290 cmp r0, r2
|
|
100062c8: db03 blt.n 100062d2 <advance_index+0x18>
|
|
100062ca: 005b lsls r3, r3, #1
|
|
100062cc: b29b uxth r3, r3
|
|
100062ce: 1ac0 subs r0, r0, r3
|
|
100062d0: b280 uxth r0, r0
|
|
100062d2: 4770 bx lr
|
|
|
|
100062d4 <_tu_fifo_peek>:
|
|
100062d4: b570 push {r4, r5, r6, lr}
|
|
100062d6: 0005 movs r5, r0
|
|
100062d8: 0008 movs r0, r1
|
|
100062da: 88ac ldrh r4, [r5, #4]
|
|
100062dc: 429a cmp r2, r3
|
|
100062de: d30b bcc.n 100062f8 <_tu_fifo_peek+0x24>
|
|
100062e0: 1ad1 subs r1, r2, r3
|
|
100062e2: b289 uxth r1, r1
|
|
100062e4: 2900 cmp r1, #0
|
|
100062e6: d01e beq.n 10006326 <_tu_fifo_peek+0x52>
|
|
100062e8: 428c cmp r4, r1
|
|
100062ea: d210 bcs.n 1000630e <_tu_fifo_peek+0x3a>
|
|
100062ec: 4294 cmp r4, r2
|
|
100062ee: d809 bhi.n 10006304 <_tu_fifo_peek+0x30>
|
|
100062f0: 1b12 subs r2, r2, r4
|
|
100062f2: b293 uxth r3, r2
|
|
100062f4: 816b strh r3, [r5, #10]
|
|
100062f6: e00a b.n 1000630e <_tu_fifo_peek+0x3a>
|
|
100062f8: 1ad1 subs r1, r2, r3
|
|
100062fa: b289 uxth r1, r1
|
|
100062fc: 0066 lsls r6, r4, #1
|
|
100062fe: 1989 adds r1, r1, r6
|
|
10006300: b289 uxth r1, r1
|
|
10006302: e7ef b.n 100062e4 <_tu_fifo_peek+0x10>
|
|
10006304: 18a2 adds r2, r4, r2
|
|
10006306: b293 uxth r3, r2
|
|
10006308: e7f4 b.n 100062f4 <_tu_fifo_peek+0x20>
|
|
1000630a: 1b1b subs r3, r3, r4
|
|
1000630c: b29b uxth r3, r3
|
|
1000630e: 429c cmp r4, r3
|
|
10006310: d9fb bls.n 1000630a <_tu_fifo_peek+0x36>
|
|
10006312: 6829 ldr r1, [r5, #0]
|
|
10006314: 88ea ldrh r2, [r5, #6]
|
|
10006316: 0452 lsls r2, r2, #17
|
|
10006318: 0c52 lsrs r2, r2, #17
|
|
1000631a: 4353 muls r3, r2
|
|
1000631c: 18c9 adds r1, r1, r3
|
|
1000631e: f7fd fefd bl 1000411c <__wrap___aeabi_memcpy>
|
|
10006322: 2001 movs r0, #1
|
|
10006324: bd70 pop {r4, r5, r6, pc}
|
|
10006326: 2000 movs r0, #0
|
|
10006328: e7fc b.n 10006324 <_tu_fifo_peek+0x50>
|
|
|
|
1000632a <_ff_pull_const_addr>:
|
|
1000632a: b570 push {r4, r5, r6, lr}
|
|
1000632c: b082 sub sp, #8
|
|
1000632e: 0005 movs r5, r0
|
|
10006330: 0016 movs r6, r2
|
|
10006332: 0893 lsrs r3, r2, #2
|
|
10006334: e00c b.n 10006350 <_ff_pull_const_addr+0x26>
|
|
10006336: 780a ldrb r2, [r1, #0]
|
|
10006338: 784b ldrb r3, [r1, #1]
|
|
1000633a: 021b lsls r3, r3, #8
|
|
1000633c: 4313 orrs r3, r2
|
|
1000633e: 788c ldrb r4, [r1, #2]
|
|
10006340: 0424 lsls r4, r4, #16
|
|
10006342: 431c orrs r4, r3
|
|
10006344: 78cb ldrb r3, [r1, #3]
|
|
10006346: 061b lsls r3, r3, #24
|
|
10006348: 4323 orrs r3, r4
|
|
1000634a: 602b str r3, [r5, #0]
|
|
1000634c: 3104 adds r1, #4
|
|
1000634e: 0003 movs r3, r0
|
|
10006350: 1e58 subs r0, r3, #1
|
|
10006352: b280 uxth r0, r0
|
|
10006354: 2b00 cmp r3, #0
|
|
10006356: d1ee bne.n 10006336 <_ff_pull_const_addr+0xc>
|
|
10006358: 3303 adds r3, #3
|
|
1000635a: 0032 movs r2, r6
|
|
1000635c: 401a ands r2, r3
|
|
1000635e: 421e tst r6, r3
|
|
10006360: d101 bne.n 10006366 <_ff_pull_const_addr+0x3c>
|
|
10006362: b002 add sp, #8
|
|
10006364: bd70 pop {r4, r5, r6, pc}
|
|
10006366: 2300 movs r3, #0
|
|
10006368: 9301 str r3, [sp, #4]
|
|
1000636a: a801 add r0, sp, #4
|
|
1000636c: f7fd fed6 bl 1000411c <__wrap___aeabi_memcpy>
|
|
10006370: 9b01 ldr r3, [sp, #4]
|
|
10006372: 602b str r3, [r5, #0]
|
|
10006374: e7f5 b.n 10006362 <_ff_pull_const_addr+0x38>
|
|
|
|
10006376 <_ff_pull_n>:
|
|
10006376: b5f0 push {r4, r5, r6, r7, lr}
|
|
10006378: 46de mov lr, fp
|
|
1000637a: 4657 mov r7, sl
|
|
1000637c: 464e mov r6, r9
|
|
1000637e: 4645 mov r5, r8
|
|
10006380: b5e0 push {r5, r6, r7, lr}
|
|
10006382: b083 sub sp, #12
|
|
10006384: 0005 movs r5, r0
|
|
10006386: 468a mov sl, r1
|
|
10006388: a90c add r1, sp, #48 @ 0x30
|
|
1000638a: 7809 ldrb r1, [r1, #0]
|
|
1000638c: 8884 ldrh r4, [r0, #4]
|
|
1000638e: 1ae0 subs r0, r4, r3
|
|
10006390: b280 uxth r0, r0
|
|
10006392: 1b1c subs r4, r3, r4
|
|
10006394: 1914 adds r4, r2, r4
|
|
10006396: b2a4 uxth r4, r4
|
|
10006398: 88ef ldrh r7, [r5, #6]
|
|
1000639a: 047f lsls r7, r7, #17
|
|
1000639c: 0c7e lsrs r6, r7, #17
|
|
1000639e: 0007 movs r7, r0
|
|
100063a0: 4377 muls r7, r6
|
|
100063a2: b2bf uxth r7, r7
|
|
100063a4: 4374 muls r4, r6
|
|
100063a6: b2a4 uxth r4, r4
|
|
100063a8: 46a3 mov fp, r4
|
|
100063aa: 682c ldr r4, [r5, #0]
|
|
100063ac: 46a0 mov r8, r4
|
|
100063ae: 4373 muls r3, r6
|
|
100063b0: 4498 add r8, r3
|
|
100063b2: 2900 cmp r1, #0
|
|
100063b4: d008 beq.n 100063c8 <_ff_pull_n+0x52>
|
|
100063b6: 2901 cmp r1, #1
|
|
100063b8: d01a beq.n 100063f0 <_ff_pull_n+0x7a>
|
|
100063ba: b003 add sp, #12
|
|
100063bc: bcf0 pop {r4, r5, r6, r7}
|
|
100063be: 46bb mov fp, r7
|
|
100063c0: 46b2 mov sl, r6
|
|
100063c2: 46a9 mov r9, r5
|
|
100063c4: 46a0 mov r8, r4
|
|
100063c6: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100063c8: 4290 cmp r0, r2
|
|
100063ca: d305 bcc.n 100063d8 <_ff_pull_n+0x62>
|
|
100063cc: 4372 muls r2, r6
|
|
100063ce: 4641 mov r1, r8
|
|
100063d0: 4650 mov r0, sl
|
|
100063d2: f7fd fea3 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100063d6: e7f0 b.n 100063ba <_ff_pull_n+0x44>
|
|
100063d8: 003a movs r2, r7
|
|
100063da: 4641 mov r1, r8
|
|
100063dc: 4650 mov r0, sl
|
|
100063de: f7fd fe9d bl 1000411c <__wrap___aeabi_memcpy>
|
|
100063e2: 6829 ldr r1, [r5, #0]
|
|
100063e4: 0038 movs r0, r7
|
|
100063e6: 4450 add r0, sl
|
|
100063e8: 465a mov r2, fp
|
|
100063ea: f7fd fe97 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100063ee: e7e4 b.n 100063ba <_ff_pull_n+0x44>
|
|
100063f0: 4290 cmp r0, r2
|
|
100063f2: d306 bcc.n 10006402 <_ff_pull_n+0x8c>
|
|
100063f4: 4372 muls r2, r6
|
|
100063f6: b292 uxth r2, r2
|
|
100063f8: 4641 mov r1, r8
|
|
100063fa: 4650 mov r0, sl
|
|
100063fc: f7ff ff95 bl 1000632a <_ff_pull_const_addr>
|
|
10006400: e7db b.n 100063ba <_ff_pull_n+0x44>
|
|
10006402: 2303 movs r3, #3
|
|
10006404: 003a movs r2, r7
|
|
10006406: 439a bics r2, r3
|
|
10006408: 4691 mov r9, r2
|
|
1000640a: 4641 mov r1, r8
|
|
1000640c: 4650 mov r0, sl
|
|
1000640e: f7ff ff8c bl 1000632a <_ff_pull_const_addr>
|
|
10006412: 4642 mov r2, r8
|
|
10006414: 444a add r2, r9
|
|
10006416: 2303 movs r3, #3
|
|
10006418: 0038 movs r0, r7
|
|
1000641a: 4018 ands r0, r3
|
|
1000641c: 421f tst r7, r3
|
|
1000641e: d030 beq.n 10006482 <_ff_pull_n+0x10c>
|
|
10006420: 2304 movs r3, #4
|
|
10006422: 1a1b subs r3, r3, r0
|
|
10006424: b29b uxth r3, r3
|
|
10006426: 1c19 adds r1, r3, #0
|
|
10006428: 455b cmp r3, fp
|
|
1000642a: d900 bls.n 1000642e <_ff_pull_n+0xb8>
|
|
1000642c: 4659 mov r1, fp
|
|
1000642e: b2cf uxtb r7, r1
|
|
10006430: 23ff movs r3, #255 @ 0xff
|
|
10006432: 400b ands r3, r1
|
|
10006434: 4659 mov r1, fp
|
|
10006436: 1acc subs r4, r1, r3
|
|
10006438: b2a3 uxth r3, r4
|
|
1000643a: 469b mov fp, r3
|
|
1000643c: 2300 movs r3, #0
|
|
1000643e: 9301 str r3, [sp, #4]
|
|
10006440: ab01 add r3, sp, #4
|
|
10006442: e004 b.n 1000644e <_ff_pull_n+0xd8>
|
|
10006444: 7810 ldrb r0, [r2, #0]
|
|
10006446: 7018 strb r0, [r3, #0]
|
|
10006448: 3301 adds r3, #1
|
|
1000644a: 0008 movs r0, r1
|
|
1000644c: 3201 adds r2, #1
|
|
1000644e: 1e41 subs r1, r0, #1
|
|
10006450: b2c9 uxtb r1, r1
|
|
10006452: 2800 cmp r0, #0
|
|
10006454: d1f6 bne.n 10006444 <_ff_pull_n+0xce>
|
|
10006456: 6829 ldr r1, [r5, #0]
|
|
10006458: e004 b.n 10006464 <_ff_pull_n+0xee>
|
|
1000645a: 7808 ldrb r0, [r1, #0]
|
|
1000645c: 7018 strb r0, [r3, #0]
|
|
1000645e: 3301 adds r3, #1
|
|
10006460: 0017 movs r7, r2
|
|
10006462: 3101 adds r1, #1
|
|
10006464: 1e7a subs r2, r7, #1
|
|
10006466: b2d2 uxtb r2, r2
|
|
10006468: 2f00 cmp r7, #0
|
|
1000646a: d1f6 bne.n 1000645a <_ff_pull_n+0xe4>
|
|
1000646c: 9b01 ldr r3, [sp, #4]
|
|
1000646e: 4652 mov r2, sl
|
|
10006470: 6013 str r3, [r2, #0]
|
|
10006472: 465b mov r3, fp
|
|
10006474: 2b00 cmp r3, #0
|
|
10006476: d0a0 beq.n 100063ba <_ff_pull_n+0x44>
|
|
10006478: 465a mov r2, fp
|
|
1000647a: 4650 mov r0, sl
|
|
1000647c: f7ff ff55 bl 1000632a <_ff_pull_const_addr>
|
|
10006480: e79b b.n 100063ba <_ff_pull_n+0x44>
|
|
10006482: 6829 ldr r1, [r5, #0]
|
|
10006484: e7f5 b.n 10006472 <_ff_pull_n+0xfc>
|
|
|
|
10006486 <_tu_fifo_peek_n>:
|
|
10006486: b5f0 push {r4, r5, r6, r7, lr}
|
|
10006488: 46c6 mov lr, r8
|
|
1000648a: b500 push {lr}
|
|
1000648c: b082 sub sp, #8
|
|
1000648e: 001e movs r6, r3
|
|
10006490: ab08 add r3, sp, #32
|
|
10006492: 881b ldrh r3, [r3, #0]
|
|
10006494: ac09 add r4, sp, #36 @ 0x24
|
|
10006496: 7827 ldrb r7, [r4, #0]
|
|
10006498: 8884 ldrh r4, [r0, #4]
|
|
1000649a: 429e cmp r6, r3
|
|
1000649c: d30f bcc.n 100064be <_tu_fifo_peek_n+0x38>
|
|
1000649e: 1af5 subs r5, r6, r3
|
|
100064a0: b2ad uxth r5, r5
|
|
100064a2: 2d00 cmp r5, #0
|
|
100064a4: d01f beq.n 100064e6 <_tu_fifo_peek_n+0x60>
|
|
100064a6: 42ac cmp r4, r5
|
|
100064a8: d205 bcs.n 100064b6 <_tu_fifo_peek_n+0x30>
|
|
100064aa: 42b4 cmp r4, r6
|
|
100064ac: d810 bhi.n 100064d0 <_tu_fifo_peek_n+0x4a>
|
|
100064ae: 1b33 subs r3, r6, r4
|
|
100064b0: b29b uxth r3, r3
|
|
100064b2: 8143 strh r3, [r0, #10]
|
|
100064b4: 0025 movs r5, r4
|
|
100064b6: 4295 cmp r5, r2
|
|
100064b8: d30f bcc.n 100064da <_tu_fifo_peek_n+0x54>
|
|
100064ba: 0015 movs r5, r2
|
|
100064bc: e00d b.n 100064da <_tu_fifo_peek_n+0x54>
|
|
100064be: 1af5 subs r5, r6, r3
|
|
100064c0: b2ad uxth r5, r5
|
|
100064c2: 46a8 mov r8, r5
|
|
100064c4: 0065 lsls r5, r4, #1
|
|
100064c6: 46ac mov ip, r5
|
|
100064c8: 4645 mov r5, r8
|
|
100064ca: 4465 add r5, ip
|
|
100064cc: b2ad uxth r5, r5
|
|
100064ce: e7e8 b.n 100064a2 <_tu_fifo_peek_n+0x1c>
|
|
100064d0: 19a6 adds r6, r4, r6
|
|
100064d2: b2b3 uxth r3, r6
|
|
100064d4: e7ed b.n 100064b2 <_tu_fifo_peek_n+0x2c>
|
|
100064d6: 1b1b subs r3, r3, r4
|
|
100064d8: b29b uxth r3, r3
|
|
100064da: 429c cmp r4, r3
|
|
100064dc: d9fb bls.n 100064d6 <_tu_fifo_peek_n+0x50>
|
|
100064de: 9700 str r7, [sp, #0]
|
|
100064e0: 002a movs r2, r5
|
|
100064e2: f7ff ff48 bl 10006376 <_ff_pull_n>
|
|
100064e6: 0028 movs r0, r5
|
|
100064e8: b002 add sp, #8
|
|
100064ea: bc80 pop {r7}
|
|
100064ec: 46b8 mov r8, r7
|
|
100064ee: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
100064f0 <_tu_fifo_read_n>:
|
|
100064f0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100064f2: b083 sub sp, #12
|
|
100064f4: 0004 movs r4, r0
|
|
100064f6: 000d movs r5, r1
|
|
100064f8: 0016 movs r6, r2
|
|
100064fa: 001f movs r7, r3
|
|
100064fc: 6900 ldr r0, [r0, #16]
|
|
100064fe: 2800 cmp r0, #0
|
|
10006500: d003 beq.n 1000650a <_tu_fifo_read_n+0x1a>
|
|
10006502: 2101 movs r1, #1
|
|
10006504: 4249 negs r1, r1
|
|
10006506: f002 fe3f bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
1000650a: 8923 ldrh r3, [r4, #8]
|
|
1000650c: b29b uxth r3, r3
|
|
1000650e: 8962 ldrh r2, [r4, #10]
|
|
10006510: 9701 str r7, [sp, #4]
|
|
10006512: 9200 str r2, [sp, #0]
|
|
10006514: 0032 movs r2, r6
|
|
10006516: 0029 movs r1, r5
|
|
10006518: 0020 movs r0, r4
|
|
1000651a: f7ff ffb4 bl 10006486 <_tu_fifo_peek_n>
|
|
1000651e: 0005 movs r5, r0
|
|
10006520: 8961 ldrh r1, [r4, #10]
|
|
10006522: b289 uxth r1, r1
|
|
10006524: 88a0 ldrh r0, [r4, #4]
|
|
10006526: 002a movs r2, r5
|
|
10006528: f7ff fec7 bl 100062ba <advance_index>
|
|
1000652c: 8160 strh r0, [r4, #10]
|
|
1000652e: 6920 ldr r0, [r4, #16]
|
|
10006530: 2800 cmp r0, #0
|
|
10006532: d001 beq.n 10006538 <_tu_fifo_read_n+0x48>
|
|
10006534: f002 fdf8 bl 10009128 <__mutex_exit_veneer>
|
|
10006538: 0028 movs r0, r5
|
|
1000653a: b003 add sp, #12
|
|
1000653c: bdf0 pop {r4, r5, r6, r7, pc}
|
|
|
|
1000653e <_ff_push_const_addr>:
|
|
1000653e: b570 push {r4, r5, r6, lr}
|
|
10006540: b082 sub sp, #8
|
|
10006542: 0016 movs r6, r2
|
|
10006544: 0895 lsrs r5, r2, #2
|
|
10006546: e009 b.n 1000655c <_ff_push_const_addr+0x1e>
|
|
10006548: 680b ldr r3, [r1, #0]
|
|
1000654a: 7003 strb r3, [r0, #0]
|
|
1000654c: 0a1d lsrs r5, r3, #8
|
|
1000654e: 7045 strb r5, [r0, #1]
|
|
10006550: 0c1d lsrs r5, r3, #16
|
|
10006552: 7085 strb r5, [r0, #2]
|
|
10006554: 0e1b lsrs r3, r3, #24
|
|
10006556: 70c3 strb r3, [r0, #3]
|
|
10006558: 3004 adds r0, #4
|
|
1000655a: 0025 movs r5, r4
|
|
1000655c: 1e6c subs r4, r5, #1
|
|
1000655e: b2a4 uxth r4, r4
|
|
10006560: 2d00 cmp r5, #0
|
|
10006562: d1f1 bne.n 10006548 <_ff_push_const_addr+0xa>
|
|
10006564: 2303 movs r3, #3
|
|
10006566: 0032 movs r2, r6
|
|
10006568: 401a ands r2, r3
|
|
1000656a: 421e tst r6, r3
|
|
1000656c: d101 bne.n 10006572 <_ff_push_const_addr+0x34>
|
|
1000656e: b002 add sp, #8
|
|
10006570: bd70 pop {r4, r5, r6, pc}
|
|
10006572: 680b ldr r3, [r1, #0]
|
|
10006574: 9301 str r3, [sp, #4]
|
|
10006576: a901 add r1, sp, #4
|
|
10006578: f7fd fdd0 bl 1000411c <__wrap___aeabi_memcpy>
|
|
1000657c: e7f7 b.n 1000656e <_ff_push_const_addr+0x30>
|
|
|
|
1000657e <_ff_push_n>:
|
|
1000657e: b5f0 push {r4, r5, r6, r7, lr}
|
|
10006580: 46de mov lr, fp
|
|
10006582: 4657 mov r7, sl
|
|
10006584: 464e mov r6, r9
|
|
10006586: 4645 mov r5, r8
|
|
10006588: b5e0 push {r5, r6, r7, lr}
|
|
1000658a: b083 sub sp, #12
|
|
1000658c: 0005 movs r5, r0
|
|
1000658e: 468a mov sl, r1
|
|
10006590: a90c add r1, sp, #48 @ 0x30
|
|
10006592: 7808 ldrb r0, [r1, #0]
|
|
10006594: 88ac ldrh r4, [r5, #4]
|
|
10006596: 1ae1 subs r1, r4, r3
|
|
10006598: b289 uxth r1, r1
|
|
1000659a: 1b1c subs r4, r3, r4
|
|
1000659c: 1914 adds r4, r2, r4
|
|
1000659e: b2a4 uxth r4, r4
|
|
100065a0: 88ef ldrh r7, [r5, #6]
|
|
100065a2: 047f lsls r7, r7, #17
|
|
100065a4: 0c7e lsrs r6, r7, #17
|
|
100065a6: 000f movs r7, r1
|
|
100065a8: 4377 muls r7, r6
|
|
100065aa: b2bf uxth r7, r7
|
|
100065ac: 4374 muls r4, r6
|
|
100065ae: b2a4 uxth r4, r4
|
|
100065b0: 46a3 mov fp, r4
|
|
100065b2: 682c ldr r4, [r5, #0]
|
|
100065b4: 46a0 mov r8, r4
|
|
100065b6: 4373 muls r3, r6
|
|
100065b8: 4498 add r8, r3
|
|
100065ba: 2800 cmp r0, #0
|
|
100065bc: d008 beq.n 100065d0 <_ff_push_n+0x52>
|
|
100065be: 2801 cmp r0, #1
|
|
100065c0: d01a beq.n 100065f8 <_ff_push_n+0x7a>
|
|
100065c2: b003 add sp, #12
|
|
100065c4: bcf0 pop {r4, r5, r6, r7}
|
|
100065c6: 46bb mov fp, r7
|
|
100065c8: 46b2 mov sl, r6
|
|
100065ca: 46a9 mov r9, r5
|
|
100065cc: 46a0 mov r8, r4
|
|
100065ce: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100065d0: 4291 cmp r1, r2
|
|
100065d2: d305 bcc.n 100065e0 <_ff_push_n+0x62>
|
|
100065d4: 4372 muls r2, r6
|
|
100065d6: 4651 mov r1, sl
|
|
100065d8: 4640 mov r0, r8
|
|
100065da: f7fd fd9f bl 1000411c <__wrap___aeabi_memcpy>
|
|
100065de: e7f0 b.n 100065c2 <_ff_push_n+0x44>
|
|
100065e0: 003a movs r2, r7
|
|
100065e2: 4651 mov r1, sl
|
|
100065e4: 4640 mov r0, r8
|
|
100065e6: f7fd fd99 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100065ea: 6828 ldr r0, [r5, #0]
|
|
100065ec: 0039 movs r1, r7
|
|
100065ee: 4451 add r1, sl
|
|
100065f0: 465a mov r2, fp
|
|
100065f2: f7fd fd93 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100065f6: e7e4 b.n 100065c2 <_ff_push_n+0x44>
|
|
100065f8: 4291 cmp r1, r2
|
|
100065fa: d306 bcc.n 1000660a <_ff_push_n+0x8c>
|
|
100065fc: 4372 muls r2, r6
|
|
100065fe: b292 uxth r2, r2
|
|
10006600: 4651 mov r1, sl
|
|
10006602: 4640 mov r0, r8
|
|
10006604: f7ff ff9b bl 1000653e <_ff_push_const_addr>
|
|
10006608: e7db b.n 100065c2 <_ff_push_n+0x44>
|
|
1000660a: 2303 movs r3, #3
|
|
1000660c: 003a movs r2, r7
|
|
1000660e: 439a bics r2, r3
|
|
10006610: 4691 mov r9, r2
|
|
10006612: 4651 mov r1, sl
|
|
10006614: 4640 mov r0, r8
|
|
10006616: f7ff ff92 bl 1000653e <_ff_push_const_addr>
|
|
1000661a: 4642 mov r2, r8
|
|
1000661c: 444a add r2, r9
|
|
1000661e: 2303 movs r3, #3
|
|
10006620: 0038 movs r0, r7
|
|
10006622: 4018 ands r0, r3
|
|
10006624: 421f tst r7, r3
|
|
10006626: d02e beq.n 10006686 <_ff_push_n+0x108>
|
|
10006628: 2304 movs r3, #4
|
|
1000662a: 1a1b subs r3, r3, r0
|
|
1000662c: b29b uxth r3, r3
|
|
1000662e: 1c19 adds r1, r3, #0
|
|
10006630: 455b cmp r3, fp
|
|
10006632: d900 bls.n 10006636 <_ff_push_n+0xb8>
|
|
10006634: 4659 mov r1, fp
|
|
10006636: b2cf uxtb r7, r1
|
|
10006638: 23ff movs r3, #255 @ 0xff
|
|
1000663a: 400b ands r3, r1
|
|
1000663c: 4659 mov r1, fp
|
|
1000663e: 1acc subs r4, r1, r3
|
|
10006640: b2a3 uxth r3, r4
|
|
10006642: 469b mov fp, r3
|
|
10006644: 4653 mov r3, sl
|
|
10006646: 681b ldr r3, [r3, #0]
|
|
10006648: 9301 str r3, [sp, #4]
|
|
1000664a: ab01 add r3, sp, #4
|
|
1000664c: e004 b.n 10006658 <_ff_push_n+0xda>
|
|
1000664e: 7818 ldrb r0, [r3, #0]
|
|
10006650: 7010 strb r0, [r2, #0]
|
|
10006652: 3301 adds r3, #1
|
|
10006654: 0008 movs r0, r1
|
|
10006656: 3201 adds r2, #1
|
|
10006658: 1e41 subs r1, r0, #1
|
|
1000665a: b2c9 uxtb r1, r1
|
|
1000665c: 2800 cmp r0, #0
|
|
1000665e: d1f6 bne.n 1000664e <_ff_push_n+0xd0>
|
|
10006660: 6828 ldr r0, [r5, #0]
|
|
10006662: e004 b.n 1000666e <_ff_push_n+0xf0>
|
|
10006664: 7819 ldrb r1, [r3, #0]
|
|
10006666: 7001 strb r1, [r0, #0]
|
|
10006668: 3301 adds r3, #1
|
|
1000666a: 0017 movs r7, r2
|
|
1000666c: 3001 adds r0, #1
|
|
1000666e: 1e7a subs r2, r7, #1
|
|
10006670: b2d2 uxtb r2, r2
|
|
10006672: 2f00 cmp r7, #0
|
|
10006674: d1f6 bne.n 10006664 <_ff_push_n+0xe6>
|
|
10006676: 465b mov r3, fp
|
|
10006678: 2b00 cmp r3, #0
|
|
1000667a: d0a2 beq.n 100065c2 <_ff_push_n+0x44>
|
|
1000667c: 465a mov r2, fp
|
|
1000667e: 4651 mov r1, sl
|
|
10006680: f7ff ff5d bl 1000653e <_ff_push_const_addr>
|
|
10006684: e79d b.n 100065c2 <_ff_push_n+0x44>
|
|
10006686: 6828 ldr r0, [r5, #0]
|
|
10006688: e7f5 b.n 10006676 <_ff_push_n+0xf8>
|
|
|
|
1000668a <_tu_fifo_write_n>:
|
|
1000668a: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000668c: b085 sub sp, #20
|
|
1000668e: 0006 movs r6, r0
|
|
10006690: 9103 str r1, [sp, #12]
|
|
10006692: 1e15 subs r5, r2, #0
|
|
10006694: 9302 str r3, [sp, #8]
|
|
10006696: d100 bne.n 1000669a <_tu_fifo_write_n+0x10>
|
|
10006698: e06d b.n 10006776 <_tu_fifo_write_n+0xec>
|
|
1000669a: 68c0 ldr r0, [r0, #12]
|
|
1000669c: 2800 cmp r0, #0
|
|
1000669e: d003 beq.n 100066a8 <_tu_fifo_write_n+0x1e>
|
|
100066a0: 2101 movs r1, #1
|
|
100066a2: 4249 negs r1, r1
|
|
100066a4: f002 fd70 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100066a8: 8934 ldrh r4, [r6, #8]
|
|
100066aa: b2a4 uxth r4, r4
|
|
100066ac: 8971 ldrh r1, [r6, #10]
|
|
100066ae: b289 uxth r1, r1
|
|
100066b0: 79f3 ldrb r3, [r6, #7]
|
|
100066b2: 09db lsrs r3, r3, #7
|
|
100066b4: d11a bne.n 100066ec <_tu_fifo_write_n+0x62>
|
|
100066b6: 88b3 ldrh r3, [r6, #4]
|
|
100066b8: 428c cmp r4, r1
|
|
100066ba: d30f bcc.n 100066dc <_tu_fifo_write_n+0x52>
|
|
100066bc: 1a61 subs r1, r4, r1
|
|
100066be: b289 uxth r1, r1
|
|
100066c0: 428b cmp r3, r1
|
|
100066c2: d911 bls.n 100066e8 <_tu_fifo_write_n+0x5e>
|
|
100066c4: 1a5b subs r3, r3, r1
|
|
100066c6: b29b uxth r3, r3
|
|
100066c8: 1c2f adds r7, r5, #0
|
|
100066ca: 429d cmp r5, r3
|
|
100066cc: d900 bls.n 100066d0 <_tu_fifo_write_n+0x46>
|
|
100066ce: 1c1f adds r7, r3, #0
|
|
100066d0: b2bf uxth r7, r7
|
|
100066d2: 2f00 cmp r7, #0
|
|
100066d4: d047 beq.n 10006766 <_tu_fifo_write_n+0xdc>
|
|
100066d6: 88b2 ldrh r2, [r6, #4]
|
|
100066d8: 0023 movs r3, r4
|
|
100066da: e035 b.n 10006748 <_tu_fifo_write_n+0xbe>
|
|
100066dc: 1a61 subs r1, r4, r1
|
|
100066de: b289 uxth r1, r1
|
|
100066e0: 005a lsls r2, r3, #1
|
|
100066e2: 1889 adds r1, r1, r2
|
|
100066e4: b289 uxth r1, r1
|
|
100066e6: e7eb b.n 100066c0 <_tu_fifo_write_n+0x36>
|
|
100066e8: 2300 movs r3, #0
|
|
100066ea: e7ed b.n 100066c8 <_tu_fifo_write_n+0x3e>
|
|
100066ec: 88b7 ldrh r7, [r6, #4]
|
|
100066ee: 42af cmp r7, r5
|
|
100066f0: d80e bhi.n 10006710 <_tu_fifo_write_n+0x86>
|
|
100066f2: 9b02 ldr r3, [sp, #8]
|
|
100066f4: 2b00 cmp r3, #0
|
|
100066f6: d121 bne.n 1000673c <_tu_fifo_write_n+0xb2>
|
|
100066f8: 1bed subs r5, r5, r7
|
|
100066fa: 88f3 ldrh r3, [r6, #6]
|
|
100066fc: 045b lsls r3, r3, #17
|
|
100066fe: 0c5b lsrs r3, r3, #17
|
|
10006700: 436b muls r3, r5
|
|
10006702: 9a03 ldr r2, [sp, #12]
|
|
10006704: 4694 mov ip, r2
|
|
10006706: 449c add ip, r3
|
|
10006708: 4663 mov r3, ip
|
|
1000670a: 9303 str r3, [sp, #12]
|
|
1000670c: 000c movs r4, r1
|
|
1000670e: e7e0 b.n 100066d2 <_tu_fifo_write_n+0x48>
|
|
10006710: 428c cmp r4, r1
|
|
10006712: d30d bcc.n 10006730 <_tu_fifo_write_n+0xa6>
|
|
10006714: 1a63 subs r3, r4, r1
|
|
10006716: b29b uxth r3, r3
|
|
10006718: 195b adds r3, r3, r5
|
|
1000671a: 007a lsls r2, r7, #1
|
|
1000671c: 4293 cmp r3, r2
|
|
1000671e: db0f blt.n 10006740 <_tu_fifo_write_n+0xb6>
|
|
10006720: 1b7a subs r2, r7, r5
|
|
10006722: b292 uxth r2, r2
|
|
10006724: 0038 movs r0, r7
|
|
10006726: f7ff fdc8 bl 100062ba <advance_index>
|
|
1000672a: 0004 movs r4, r0
|
|
1000672c: 002f movs r7, r5
|
|
1000672e: e7d0 b.n 100066d2 <_tu_fifo_write_n+0x48>
|
|
10006730: 1a63 subs r3, r4, r1
|
|
10006732: b29b uxth r3, r3
|
|
10006734: 007a lsls r2, r7, #1
|
|
10006736: 189b adds r3, r3, r2
|
|
10006738: b29b uxth r3, r3
|
|
1000673a: e7ed b.n 10006718 <_tu_fifo_write_n+0x8e>
|
|
1000673c: 000c movs r4, r1
|
|
1000673e: e7c8 b.n 100066d2 <_tu_fifo_write_n+0x48>
|
|
10006740: 002f movs r7, r5
|
|
10006742: e7c6 b.n 100066d2 <_tu_fifo_write_n+0x48>
|
|
10006744: 1a9b subs r3, r3, r2
|
|
10006746: b29b uxth r3, r3
|
|
10006748: 429a cmp r2, r3
|
|
1000674a: d9fb bls.n 10006744 <_tu_fifo_write_n+0xba>
|
|
1000674c: 9a02 ldr r2, [sp, #8]
|
|
1000674e: 9200 str r2, [sp, #0]
|
|
10006750: 003a movs r2, r7
|
|
10006752: 9903 ldr r1, [sp, #12]
|
|
10006754: 0030 movs r0, r6
|
|
10006756: f7ff ff12 bl 1000657e <_ff_push_n>
|
|
1000675a: 88b0 ldrh r0, [r6, #4]
|
|
1000675c: 003a movs r2, r7
|
|
1000675e: 0021 movs r1, r4
|
|
10006760: f7ff fdab bl 100062ba <advance_index>
|
|
10006764: 8130 strh r0, [r6, #8]
|
|
10006766: 68f0 ldr r0, [r6, #12]
|
|
10006768: 2800 cmp r0, #0
|
|
1000676a: d001 beq.n 10006770 <_tu_fifo_write_n+0xe6>
|
|
1000676c: f002 fcdc bl 10009128 <__mutex_exit_veneer>
|
|
10006770: 0038 movs r0, r7
|
|
10006772: b005 add sp, #20
|
|
10006774: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10006776: 0017 movs r7, r2
|
|
10006778: e7fa b.n 10006770 <_tu_fifo_write_n+0xe6>
|
|
|
|
1000677a <tu_fifo_config>:
|
|
1000677a: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000677c: b083 sub sp, #12
|
|
1000677e: 0004 movs r4, r0
|
|
10006780: 9101 str r1, [sp, #4]
|
|
10006782: 0016 movs r6, r2
|
|
10006784: 001d movs r5, r3
|
|
10006786: ab08 add r3, sp, #32
|
|
10006788: 781f ldrb r7, [r3, #0]
|
|
1000678a: 2380 movs r3, #128 @ 0x80
|
|
1000678c: 021b lsls r3, r3, #8
|
|
1000678e: 429a cmp r2, r3
|
|
10006790: d82d bhi.n 100067ee <tu_fifo_config+0x74>
|
|
10006792: 68c0 ldr r0, [r0, #12]
|
|
10006794: 2800 cmp r0, #0
|
|
10006796: d003 beq.n 100067a0 <tu_fifo_config+0x26>
|
|
10006798: 2101 movs r1, #1
|
|
1000679a: 4249 negs r1, r1
|
|
1000679c: f002 fcf4 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100067a0: 6920 ldr r0, [r4, #16]
|
|
100067a2: 2800 cmp r0, #0
|
|
100067a4: d003 beq.n 100067ae <tu_fifo_config+0x34>
|
|
100067a6: 2101 movs r1, #1
|
|
100067a8: 4249 negs r1, r1
|
|
100067aa: f002 fced bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100067ae: 9b01 ldr r3, [sp, #4]
|
|
100067b0: 6023 str r3, [r4, #0]
|
|
100067b2: 80a6 strh r6, [r4, #4]
|
|
100067b4: 046d lsls r5, r5, #17
|
|
100067b6: 0c6b lsrs r3, r5, #17
|
|
100067b8: 88e5 ldrh r5, [r4, #6]
|
|
100067ba: 0bed lsrs r5, r5, #15
|
|
100067bc: 03ed lsls r5, r5, #15
|
|
100067be: 431d orrs r5, r3
|
|
100067c0: 80e5 strh r5, [r4, #6]
|
|
100067c2: 01fb lsls r3, r7, #7
|
|
100067c4: 79e2 ldrb r2, [r4, #7]
|
|
100067c6: 277f movs r7, #127 @ 0x7f
|
|
100067c8: 4017 ands r7, r2
|
|
100067ca: 431f orrs r7, r3
|
|
100067cc: 71e7 strb r7, [r4, #7]
|
|
100067ce: 2300 movs r3, #0
|
|
100067d0: 8163 strh r3, [r4, #10]
|
|
100067d2: 8123 strh r3, [r4, #8]
|
|
100067d4: 68e0 ldr r0, [r4, #12]
|
|
100067d6: 2800 cmp r0, #0
|
|
100067d8: d001 beq.n 100067de <tu_fifo_config+0x64>
|
|
100067da: f002 fca5 bl 10009128 <__mutex_exit_veneer>
|
|
100067de: 6920 ldr r0, [r4, #16]
|
|
100067e0: 2800 cmp r0, #0
|
|
100067e2: d006 beq.n 100067f2 <tu_fifo_config+0x78>
|
|
100067e4: f002 fca0 bl 10009128 <__mutex_exit_veneer>
|
|
100067e8: 2001 movs r0, #1
|
|
100067ea: b003 add sp, #12
|
|
100067ec: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100067ee: 2000 movs r0, #0
|
|
100067f0: e7fb b.n 100067ea <tu_fifo_config+0x70>
|
|
100067f2: 2001 movs r0, #1
|
|
100067f4: e7f9 b.n 100067ea <tu_fifo_config+0x70>
|
|
|
|
100067f6 <tu_fifo_count>:
|
|
100067f6: 8881 ldrh r1, [r0, #4]
|
|
100067f8: 8903 ldrh r3, [r0, #8]
|
|
100067fa: b29b uxth r3, r3
|
|
100067fc: 8942 ldrh r2, [r0, #10]
|
|
100067fe: b292 uxth r2, r2
|
|
10006800: 4293 cmp r3, r2
|
|
10006802: d307 bcc.n 10006814 <tu_fifo_count+0x1e>
|
|
10006804: 1a9b subs r3, r3, r2
|
|
10006806: b29b uxth r3, r3
|
|
10006808: 1c08 adds r0, r1, #0
|
|
1000680a: 4299 cmp r1, r3
|
|
1000680c: d900 bls.n 10006810 <tu_fifo_count+0x1a>
|
|
1000680e: 1c18 adds r0, r3, #0
|
|
10006810: b280 uxth r0, r0
|
|
10006812: 4770 bx lr
|
|
10006814: 1a9b subs r3, r3, r2
|
|
10006816: b29b uxth r3, r3
|
|
10006818: 004a lsls r2, r1, #1
|
|
1000681a: 189b adds r3, r3, r2
|
|
1000681c: b29b uxth r3, r3
|
|
1000681e: e7f3 b.n 10006808 <tu_fifo_count+0x12>
|
|
|
|
10006820 <tu_fifo_empty>:
|
|
10006820: 8903 ldrh r3, [r0, #8]
|
|
10006822: 8940 ldrh r0, [r0, #10]
|
|
10006824: 1a18 subs r0, r3, r0
|
|
10006826: 4243 negs r3, r0
|
|
10006828: 4158 adcs r0, r3
|
|
1000682a: b2c0 uxtb r0, r0
|
|
1000682c: 4770 bx lr
|
|
|
|
1000682e <tu_fifo_full>:
|
|
1000682e: 8881 ldrh r1, [r0, #4]
|
|
10006830: 8903 ldrh r3, [r0, #8]
|
|
10006832: b29b uxth r3, r3
|
|
10006834: 8942 ldrh r2, [r0, #10]
|
|
10006836: b292 uxth r2, r2
|
|
10006838: 4293 cmp r3, r2
|
|
1000683a: d306 bcc.n 1000684a <tu_fifo_full+0x1c>
|
|
1000683c: 1a9b subs r3, r3, r2
|
|
1000683e: b29b uxth r3, r3
|
|
10006840: 2000 movs r0, #0
|
|
10006842: 428b cmp r3, r1
|
|
10006844: 4140 adcs r0, r0
|
|
10006846: b2c0 uxtb r0, r0
|
|
10006848: 4770 bx lr
|
|
1000684a: 1a9b subs r3, r3, r2
|
|
1000684c: b29b uxth r3, r3
|
|
1000684e: 004a lsls r2, r1, #1
|
|
10006850: 189b adds r3, r3, r2
|
|
10006852: b29b uxth r3, r3
|
|
10006854: e7f4 b.n 10006840 <tu_fifo_full+0x12>
|
|
|
|
10006856 <tu_fifo_remaining>:
|
|
10006856: 8882 ldrh r2, [r0, #4]
|
|
10006858: 8903 ldrh r3, [r0, #8]
|
|
1000685a: b29b uxth r3, r3
|
|
1000685c: 8941 ldrh r1, [r0, #10]
|
|
1000685e: b289 uxth r1, r1
|
|
10006860: 428b cmp r3, r1
|
|
10006862: d306 bcc.n 10006872 <tu_fifo_remaining+0x1c>
|
|
10006864: 1a5b subs r3, r3, r1
|
|
10006866: b29b uxth r3, r3
|
|
10006868: 429a cmp r2, r3
|
|
1000686a: d908 bls.n 1000687e <tu_fifo_remaining+0x28>
|
|
1000686c: 1ad0 subs r0, r2, r3
|
|
1000686e: b280 uxth r0, r0
|
|
10006870: 4770 bx lr
|
|
10006872: 1a5b subs r3, r3, r1
|
|
10006874: b29b uxth r3, r3
|
|
10006876: 0051 lsls r1, r2, #1
|
|
10006878: 185b adds r3, r3, r1
|
|
1000687a: b29b uxth r3, r3
|
|
1000687c: e7f4 b.n 10006868 <tu_fifo_remaining+0x12>
|
|
1000687e: 2000 movs r0, #0
|
|
10006880: e7f6 b.n 10006870 <tu_fifo_remaining+0x1a>
|
|
|
|
10006882 <tu_fifo_read>:
|
|
10006882: b570 push {r4, r5, r6, lr}
|
|
10006884: 0004 movs r4, r0
|
|
10006886: 000d movs r5, r1
|
|
10006888: 6900 ldr r0, [r0, #16]
|
|
1000688a: 2800 cmp r0, #0
|
|
1000688c: d003 beq.n 10006896 <tu_fifo_read+0x14>
|
|
1000688e: 2101 movs r1, #1
|
|
10006890: 4249 negs r1, r1
|
|
10006892: f002 fc79 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
10006896: 8922 ldrh r2, [r4, #8]
|
|
10006898: b292 uxth r2, r2
|
|
1000689a: 8963 ldrh r3, [r4, #10]
|
|
1000689c: b29b uxth r3, r3
|
|
1000689e: 0029 movs r1, r5
|
|
100068a0: 0020 movs r0, r4
|
|
100068a2: f7ff fd17 bl 100062d4 <_tu_fifo_peek>
|
|
100068a6: 0005 movs r5, r0
|
|
100068a8: 8961 ldrh r1, [r4, #10]
|
|
100068aa: b289 uxth r1, r1
|
|
100068ac: 88a0 ldrh r0, [r4, #4]
|
|
100068ae: 002a movs r2, r5
|
|
100068b0: f7ff fd03 bl 100062ba <advance_index>
|
|
100068b4: 8160 strh r0, [r4, #10]
|
|
100068b6: 6920 ldr r0, [r4, #16]
|
|
100068b8: 2800 cmp r0, #0
|
|
100068ba: d001 beq.n 100068c0 <tu_fifo_read+0x3e>
|
|
100068bc: f002 fc34 bl 10009128 <__mutex_exit_veneer>
|
|
100068c0: 0028 movs r0, r5
|
|
100068c2: bd70 pop {r4, r5, r6, pc}
|
|
|
|
100068c4 <tu_fifo_read_n>:
|
|
100068c4: b510 push {r4, lr}
|
|
100068c6: 2300 movs r3, #0
|
|
100068c8: f7ff fe12 bl 100064f0 <_tu_fifo_read_n>
|
|
100068cc: bd10 pop {r4, pc}
|
|
|
|
100068ce <tu_fifo_write>:
|
|
100068ce: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
100068d0: 0004 movs r4, r0
|
|
100068d2: 000e movs r6, r1
|
|
100068d4: 68c0 ldr r0, [r0, #12]
|
|
100068d6: 2800 cmp r0, #0
|
|
100068d8: d003 beq.n 100068e2 <tu_fifo_write+0x14>
|
|
100068da: 2101 movs r1, #1
|
|
100068dc: 4249 negs r1, r1
|
|
100068de: f002 fc53 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
100068e2: 8925 ldrh r5, [r4, #8]
|
|
100068e4: b2ad uxth r5, r5
|
|
100068e6: 0020 movs r0, r4
|
|
100068e8: f7ff ffa1 bl 1000682e <tu_fifo_full>
|
|
100068ec: 2800 cmp r0, #0
|
|
100068ee: d002 beq.n 100068f6 <tu_fifo_write+0x28>
|
|
100068f0: 79e7 ldrb r7, [r4, #7]
|
|
100068f2: 09ff lsrs r7, r7, #7
|
|
100068f4: d016 beq.n 10006924 <tu_fifo_write+0x56>
|
|
100068f6: 88a2 ldrh r2, [r4, #4]
|
|
100068f8: 002b movs r3, r5
|
|
100068fa: e001 b.n 10006900 <tu_fifo_write+0x32>
|
|
100068fc: 1a9b subs r3, r3, r2
|
|
100068fe: b29b uxth r3, r3
|
|
10006900: 429a cmp r2, r3
|
|
10006902: d9fb bls.n 100068fc <tu_fifo_write+0x2e>
|
|
10006904: 6820 ldr r0, [r4, #0]
|
|
10006906: 88e2 ldrh r2, [r4, #6]
|
|
10006908: 0452 lsls r2, r2, #17
|
|
1000690a: 0c52 lsrs r2, r2, #17
|
|
1000690c: 4353 muls r3, r2
|
|
1000690e: 18c0 adds r0, r0, r3
|
|
10006910: 0031 movs r1, r6
|
|
10006912: f7fd fc03 bl 1000411c <__wrap___aeabi_memcpy>
|
|
10006916: 88a0 ldrh r0, [r4, #4]
|
|
10006918: 2201 movs r2, #1
|
|
1000691a: 0029 movs r1, r5
|
|
1000691c: f7ff fccd bl 100062ba <advance_index>
|
|
10006920: 8120 strh r0, [r4, #8]
|
|
10006922: 2701 movs r7, #1
|
|
10006924: 68e0 ldr r0, [r4, #12]
|
|
10006926: 2800 cmp r0, #0
|
|
10006928: d001 beq.n 1000692e <tu_fifo_write+0x60>
|
|
1000692a: f002 fbfd bl 10009128 <__mutex_exit_veneer>
|
|
1000692e: 0038 movs r0, r7
|
|
10006930: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
|
|
10006932 <tu_fifo_write_n>:
|
|
10006932: b510 push {r4, lr}
|
|
10006934: 2300 movs r3, #0
|
|
10006936: f7ff fea8 bl 1000668a <_tu_fifo_write_n>
|
|
1000693a: bd10 pop {r4, pc}
|
|
|
|
1000693c <tu_fifo_clear>:
|
|
1000693c: b510 push {r4, lr}
|
|
1000693e: 0004 movs r4, r0
|
|
10006940: 68c0 ldr r0, [r0, #12]
|
|
10006942: 2800 cmp r0, #0
|
|
10006944: d003 beq.n 1000694e <tu_fifo_clear+0x12>
|
|
10006946: 2101 movs r1, #1
|
|
10006948: 4249 negs r1, r1
|
|
1000694a: f002 fc1d bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
1000694e: 6920 ldr r0, [r4, #16]
|
|
10006950: 2800 cmp r0, #0
|
|
10006952: d003 beq.n 1000695c <tu_fifo_clear+0x20>
|
|
10006954: 2101 movs r1, #1
|
|
10006956: 4249 negs r1, r1
|
|
10006958: f002 fc16 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
1000695c: 2300 movs r3, #0
|
|
1000695e: 8163 strh r3, [r4, #10]
|
|
10006960: 8123 strh r3, [r4, #8]
|
|
10006962: 68e0 ldr r0, [r4, #12]
|
|
10006964: 2800 cmp r0, #0
|
|
10006966: d001 beq.n 1000696c <tu_fifo_clear+0x30>
|
|
10006968: f002 fbde bl 10009128 <__mutex_exit_veneer>
|
|
1000696c: 6920 ldr r0, [r4, #16]
|
|
1000696e: 2800 cmp r0, #0
|
|
10006970: d001 beq.n 10006976 <tu_fifo_clear+0x3a>
|
|
10006972: f002 fbd9 bl 10009128 <__mutex_exit_veneer>
|
|
10006976: 2001 movs r0, #1
|
|
10006978: bd10 pop {r4, pc}
|
|
|
|
1000697a <tu_fifo_set_overwritable>:
|
|
1000697a: b570 push {r4, r5, r6, lr}
|
|
1000697c: 0004 movs r4, r0
|
|
1000697e: 000d movs r5, r1
|
|
10006980: 68c0 ldr r0, [r0, #12]
|
|
10006982: 2800 cmp r0, #0
|
|
10006984: d003 beq.n 1000698e <tu_fifo_set_overwritable+0x14>
|
|
10006986: 2101 movs r1, #1
|
|
10006988: 4249 negs r1, r1
|
|
1000698a: f002 fbfd bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
1000698e: 6920 ldr r0, [r4, #16]
|
|
10006990: 2800 cmp r0, #0
|
|
10006992: d003 beq.n 1000699c <tu_fifo_set_overwritable+0x22>
|
|
10006994: 2101 movs r1, #1
|
|
10006996: 4249 negs r1, r1
|
|
10006998: f002 fbf6 bl 10009188 <__mutex_enter_timeout_ms_veneer>
|
|
1000699c: 01ed lsls r5, r5, #7
|
|
1000699e: 79e3 ldrb r3, [r4, #7]
|
|
100069a0: 217f movs r1, #127 @ 0x7f
|
|
100069a2: 4019 ands r1, r3
|
|
100069a4: 4329 orrs r1, r5
|
|
100069a6: 71e1 strb r1, [r4, #7]
|
|
100069a8: 68e0 ldr r0, [r4, #12]
|
|
100069aa: 2800 cmp r0, #0
|
|
100069ac: d001 beq.n 100069b2 <tu_fifo_set_overwritable+0x38>
|
|
100069ae: f002 fbbb bl 10009128 <__mutex_exit_veneer>
|
|
100069b2: 6920 ldr r0, [r4, #16]
|
|
100069b4: 2800 cmp r0, #0
|
|
100069b6: d001 beq.n 100069bc <tu_fifo_set_overwritable+0x42>
|
|
100069b8: f002 fbb6 bl 10009128 <__mutex_exit_veneer>
|
|
100069bc: 2001 movs r0, #1
|
|
100069be: bd70 pop {r4, r5, r6, pc}
|
|
|
|
100069c0 <prvHeapInit>:
|
|
100069c0: 4a10 ldr r2, [pc, #64] @ (10006a04 <prvHeapInit+0x44>)
|
|
100069c2: 0753 lsls r3, r2, #29
|
|
100069c4: d01b beq.n 100069fe <prvHeapInit+0x3e>
|
|
100069c6: 1dd1 adds r1, r2, #7
|
|
100069c8: 2307 movs r3, #7
|
|
100069ca: 4399 bics r1, r3
|
|
100069cc: 2380 movs r3, #128 @ 0x80
|
|
100069ce: 029b lsls r3, r3, #10
|
|
100069d0: 1a5b subs r3, r3, r1
|
|
100069d2: 189b adds r3, r3, r2
|
|
100069d4: 000a movs r2, r1
|
|
100069d6: 480c ldr r0, [pc, #48] @ (10006a08 <prvHeapInit+0x48>)
|
|
100069d8: 6002 str r2, [r0, #0]
|
|
100069da: 2100 movs r1, #0
|
|
100069dc: 6041 str r1, [r0, #4]
|
|
100069de: 18d3 adds r3, r2, r3
|
|
100069e0: 3b08 subs r3, #8
|
|
100069e2: 2007 movs r0, #7
|
|
100069e4: 4383 bics r3, r0
|
|
100069e6: 4809 ldr r0, [pc, #36] @ (10006a0c <prvHeapInit+0x4c>)
|
|
100069e8: 6003 str r3, [r0, #0]
|
|
100069ea: 6059 str r1, [r3, #4]
|
|
100069ec: 6019 str r1, [r3, #0]
|
|
100069ee: 1a99 subs r1, r3, r2
|
|
100069f0: 6051 str r1, [r2, #4]
|
|
100069f2: 6013 str r3, [r2, #0]
|
|
100069f4: 4b06 ldr r3, [pc, #24] @ (10006a10 <prvHeapInit+0x50>)
|
|
100069f6: 6019 str r1, [r3, #0]
|
|
100069f8: 4b06 ldr r3, [pc, #24] @ (10006a14 <prvHeapInit+0x54>)
|
|
100069fa: 6019 str r1, [r3, #0]
|
|
100069fc: 4770 bx lr
|
|
100069fe: 2380 movs r3, #128 @ 0x80
|
|
10006a00: 029b lsls r3, r3, #10
|
|
10006a02: e7e8 b.n 100069d6 <prvHeapInit+0x16>
|
|
10006a04: 20001bfc .word 0x20001bfc
|
|
10006a08: 20021cfc .word 0x20021cfc
|
|
10006a0c: 20001744 .word 0x20001744
|
|
10006a10: 20021c8c .word 0x20021c8c
|
|
10006a14: 20021c80 .word 0x20021c80
|
|
|
|
10006a18 <prvInsertBlockIntoFreeList>:
|
|
10006a18: b510 push {r4, lr}
|
|
10006a1a: 4b12 ldr r3, [pc, #72] @ (10006a64 <prvInsertBlockIntoFreeList+0x4c>)
|
|
10006a1c: 001a movs r2, r3
|
|
10006a1e: 681b ldr r3, [r3, #0]
|
|
10006a20: 4283 cmp r3, r0
|
|
10006a22: d3fb bcc.n 10006a1c <prvInsertBlockIntoFreeList+0x4>
|
|
10006a24: 6851 ldr r1, [r2, #4]
|
|
10006a26: 1854 adds r4, r2, r1
|
|
10006a28: 4284 cmp r4, r0
|
|
10006a2a: d008 beq.n 10006a3e <prvInsertBlockIntoFreeList+0x26>
|
|
10006a2c: 6841 ldr r1, [r0, #4]
|
|
10006a2e: 1844 adds r4, r0, r1
|
|
10006a30: 42a3 cmp r3, r4
|
|
10006a32: d009 beq.n 10006a48 <prvInsertBlockIntoFreeList+0x30>
|
|
10006a34: 6003 str r3, [r0, #0]
|
|
10006a36: 4290 cmp r0, r2
|
|
10006a38: d000 beq.n 10006a3c <prvInsertBlockIntoFreeList+0x24>
|
|
10006a3a: 6010 str r0, [r2, #0]
|
|
10006a3c: bd10 pop {r4, pc}
|
|
10006a3e: 6840 ldr r0, [r0, #4]
|
|
10006a40: 1809 adds r1, r1, r0
|
|
10006a42: 6051 str r1, [r2, #4]
|
|
10006a44: 0010 movs r0, r2
|
|
10006a46: e7f1 b.n 10006a2c <prvInsertBlockIntoFreeList+0x14>
|
|
10006a48: 4c07 ldr r4, [pc, #28] @ (10006a68 <prvInsertBlockIntoFreeList+0x50>)
|
|
10006a4a: 6824 ldr r4, [r4, #0]
|
|
10006a4c: 42a3 cmp r3, r4
|
|
10006a4e: d006 beq.n 10006a5e <prvInsertBlockIntoFreeList+0x46>
|
|
10006a50: 685b ldr r3, [r3, #4]
|
|
10006a52: 18c9 adds r1, r1, r3
|
|
10006a54: 6041 str r1, [r0, #4]
|
|
10006a56: 6813 ldr r3, [r2, #0]
|
|
10006a58: 681b ldr r3, [r3, #0]
|
|
10006a5a: 6003 str r3, [r0, #0]
|
|
10006a5c: e7eb b.n 10006a36 <prvInsertBlockIntoFreeList+0x1e>
|
|
10006a5e: 6004 str r4, [r0, #0]
|
|
10006a60: e7e9 b.n 10006a36 <prvInsertBlockIntoFreeList+0x1e>
|
|
10006a62: 46c0 nop @ (mov r8, r8)
|
|
10006a64: 20021cfc .word 0x20021cfc
|
|
10006a68: 20001744 .word 0x20001744
|
|
|
|
10006a6c <pvPortMalloc>:
|
|
10006a6c: b570 push {r4, r5, r6, lr}
|
|
10006a6e: 0005 movs r5, r0
|
|
10006a70: f001 fbfe bl 10008270 <vTaskSuspendAll>
|
|
10006a74: 4b38 ldr r3, [pc, #224] @ (10006b58 <pvPortMalloc+0xec>)
|
|
10006a76: 681b ldr r3, [r3, #0]
|
|
10006a78: 2b00 cmp r3, #0
|
|
10006a7a: d014 beq.n 10006aa6 <pvPortMalloc+0x3a>
|
|
10006a7c: 2d00 cmp r5, #0
|
|
10006a7e: d016 beq.n 10006aae <pvPortMalloc+0x42>
|
|
10006a80: 002b movs r3, r5
|
|
10006a82: 3309 adds r3, #9
|
|
10006a84: d812 bhi.n 10006aac <pvPortMalloc+0x40>
|
|
10006a86: 3508 adds r5, #8
|
|
10006a88: 2307 movs r3, #7
|
|
10006a8a: 001a movs r2, r3
|
|
10006a8c: 402a ands r2, r5
|
|
10006a8e: 422b tst r3, r5
|
|
10006a90: d005 beq.n 10006a9e <pvPortMalloc+0x32>
|
|
10006a92: 3301 adds r3, #1
|
|
10006a94: 1a9b subs r3, r3, r2
|
|
10006a96: 3a09 subs r2, #9
|
|
10006a98: 42aa cmp r2, r5
|
|
10006a9a: d311 bcc.n 10006ac0 <pvPortMalloc+0x54>
|
|
10006a9c: 18ed adds r5, r5, r3
|
|
10006a9e: 2d00 cmp r5, #0
|
|
10006aa0: da05 bge.n 10006aae <pvPortMalloc+0x42>
|
|
10006aa2: 2600 movs r6, #0
|
|
10006aa4: e03e b.n 10006b24 <pvPortMalloc+0xb8>
|
|
10006aa6: f7ff ff8b bl 100069c0 <prvHeapInit>
|
|
10006aaa: e7e7 b.n 10006a7c <pvPortMalloc+0x10>
|
|
10006aac: 2500 movs r5, #0
|
|
10006aae: 2d00 cmp r5, #0
|
|
10006ab0: d044 beq.n 10006b3c <pvPortMalloc+0xd0>
|
|
10006ab2: 4b2a ldr r3, [pc, #168] @ (10006b5c <pvPortMalloc+0xf0>)
|
|
10006ab4: 681b ldr r3, [r3, #0]
|
|
10006ab6: 42ab cmp r3, r5
|
|
10006ab8: d342 bcc.n 10006b40 <pvPortMalloc+0xd4>
|
|
10006aba: 4a29 ldr r2, [pc, #164] @ (10006b60 <pvPortMalloc+0xf4>)
|
|
10006abc: 6814 ldr r4, [r2, #0]
|
|
10006abe: e003 b.n 10006ac8 <pvPortMalloc+0x5c>
|
|
10006ac0: 2500 movs r5, #0
|
|
10006ac2: e7f4 b.n 10006aae <pvPortMalloc+0x42>
|
|
10006ac4: 0022 movs r2, r4
|
|
10006ac6: 001c movs r4, r3
|
|
10006ac8: 6863 ldr r3, [r4, #4]
|
|
10006aca: 42ab cmp r3, r5
|
|
10006acc: d202 bcs.n 10006ad4 <pvPortMalloc+0x68>
|
|
10006ace: 6823 ldr r3, [r4, #0]
|
|
10006ad0: 2b00 cmp r3, #0
|
|
10006ad2: d1f7 bne.n 10006ac4 <pvPortMalloc+0x58>
|
|
10006ad4: 4b20 ldr r3, [pc, #128] @ (10006b58 <pvPortMalloc+0xec>)
|
|
10006ad6: 681b ldr r3, [r3, #0]
|
|
10006ad8: 42a3 cmp r3, r4
|
|
10006ada: d033 beq.n 10006b44 <pvPortMalloc+0xd8>
|
|
10006adc: 6816 ldr r6, [r2, #0]
|
|
10006ade: 3608 adds r6, #8
|
|
10006ae0: 6823 ldr r3, [r4, #0]
|
|
10006ae2: 6013 str r3, [r2, #0]
|
|
10006ae4: 6863 ldr r3, [r4, #4]
|
|
10006ae6: 1b5b subs r3, r3, r5
|
|
10006ae8: 2b10 cmp r3, #16
|
|
10006aea: d906 bls.n 10006afa <pvPortMalloc+0x8e>
|
|
10006aec: 1960 adds r0, r4, r5
|
|
10006aee: 0742 lsls r2, r0, #29
|
|
10006af0: d11e bne.n 10006b30 <pvPortMalloc+0xc4>
|
|
10006af2: 6043 str r3, [r0, #4]
|
|
10006af4: 6065 str r5, [r4, #4]
|
|
10006af6: f7ff ff8f bl 10006a18 <prvInsertBlockIntoFreeList>
|
|
10006afa: 6862 ldr r2, [r4, #4]
|
|
10006afc: 4917 ldr r1, [pc, #92] @ (10006b5c <pvPortMalloc+0xf0>)
|
|
10006afe: 680b ldr r3, [r1, #0]
|
|
10006b00: 1a9b subs r3, r3, r2
|
|
10006b02: 600b str r3, [r1, #0]
|
|
10006b04: 4917 ldr r1, [pc, #92] @ (10006b64 <pvPortMalloc+0xf8>)
|
|
10006b06: 6809 ldr r1, [r1, #0]
|
|
10006b08: 428b cmp r3, r1
|
|
10006b0a: d201 bcs.n 10006b10 <pvPortMalloc+0xa4>
|
|
10006b0c: 4915 ldr r1, [pc, #84] @ (10006b64 <pvPortMalloc+0xf8>)
|
|
10006b0e: 600b str r3, [r1, #0]
|
|
10006b10: 2380 movs r3, #128 @ 0x80
|
|
10006b12: 061b lsls r3, r3, #24
|
|
10006b14: 4313 orrs r3, r2
|
|
10006b16: 6063 str r3, [r4, #4]
|
|
10006b18: 2300 movs r3, #0
|
|
10006b1a: 6023 str r3, [r4, #0]
|
|
10006b1c: 4a12 ldr r2, [pc, #72] @ (10006b68 <pvPortMalloc+0xfc>)
|
|
10006b1e: 6813 ldr r3, [r2, #0]
|
|
10006b20: 3301 adds r3, #1
|
|
10006b22: 6013 str r3, [r2, #0]
|
|
10006b24: f001 fc76 bl 10008414 <xTaskResumeAll>
|
|
10006b28: 0773 lsls r3, r6, #29
|
|
10006b2a: d10d bne.n 10006b48 <pvPortMalloc+0xdc>
|
|
10006b2c: 0030 movs r0, r6
|
|
10006b2e: bd70 pop {r4, r5, r6, pc}
|
|
10006b30: 4b0e ldr r3, [pc, #56] @ (10006b6c <pvPortMalloc+0x100>)
|
|
10006b32: 4a0f ldr r2, [pc, #60] @ (10006b70 <pvPortMalloc+0x104>)
|
|
10006b34: 480f ldr r0, [pc, #60] @ (10006b74 <pvPortMalloc+0x108>)
|
|
10006b36: 21ee movs r1, #238 @ 0xee
|
|
10006b38: f7fb fca4 bl 10002484 <__assert_func>
|
|
10006b3c: 2600 movs r6, #0
|
|
10006b3e: e7f1 b.n 10006b24 <pvPortMalloc+0xb8>
|
|
10006b40: 2600 movs r6, #0
|
|
10006b42: e7ef b.n 10006b24 <pvPortMalloc+0xb8>
|
|
10006b44: 2600 movs r6, #0
|
|
10006b46: e7ed b.n 10006b24 <pvPortMalloc+0xb8>
|
|
10006b48: 4b0b ldr r3, [pc, #44] @ (10006b78 <pvPortMalloc+0x10c>)
|
|
10006b4a: 4a09 ldr r2, [pc, #36] @ (10006b70 <pvPortMalloc+0x104>)
|
|
10006b4c: 2197 movs r1, #151 @ 0x97
|
|
10006b4e: 4809 ldr r0, [pc, #36] @ (10006b74 <pvPortMalloc+0x108>)
|
|
10006b50: 0049 lsls r1, r1, #1
|
|
10006b52: f7fb fc97 bl 10002484 <__assert_func>
|
|
10006b56: 46c0 nop @ (mov r8, r8)
|
|
10006b58: 20001744 .word 0x20001744
|
|
10006b5c: 20021c80 .word 0x20021c80
|
|
10006b60: 20021cfc .word 0x20021cfc
|
|
10006b64: 20021c8c .word 0x20021c8c
|
|
10006b68: 20021c98 .word 0x20021c98
|
|
10006b6c: 1000a808 .word 0x1000a808
|
|
10006b70: 1000a960 .word 0x1000a960
|
|
10006b74: 1000a83c .word 0x1000a83c
|
|
10006b78: 1000a87c .word 0x1000a87c
|
|
|
|
10006b7c <vPortFree>:
|
|
10006b7c: b570 push {r4, r5, r6, lr}
|
|
10006b7e: 2800 cmp r0, #0
|
|
10006b80: d01e beq.n 10006bc0 <vPortFree+0x44>
|
|
10006b82: 0005 movs r5, r0
|
|
10006b84: 3d08 subs r5, #8
|
|
10006b86: 686b ldr r3, [r5, #4]
|
|
10006b88: 2b00 cmp r3, #0
|
|
10006b8a: da1a bge.n 10006bc2 <vPortFree+0x46>
|
|
10006b8c: 0002 movs r2, r0
|
|
10006b8e: 3a08 subs r2, #8
|
|
10006b90: 6812 ldr r2, [r2, #0]
|
|
10006b92: 2a00 cmp r2, #0
|
|
10006b94: d11c bne.n 10006bd0 <vPortFree+0x54>
|
|
10006b96: 3808 subs r0, #8
|
|
10006b98: 0004 movs r4, r0
|
|
10006b9a: 005b lsls r3, r3, #1
|
|
10006b9c: 085b lsrs r3, r3, #1
|
|
10006b9e: 6043 str r3, [r0, #4]
|
|
10006ba0: f001 fb66 bl 10008270 <vTaskSuspendAll>
|
|
10006ba4: 6861 ldr r1, [r4, #4]
|
|
10006ba6: 4a0e ldr r2, [pc, #56] @ (10006be0 <vPortFree+0x64>)
|
|
10006ba8: 6813 ldr r3, [r2, #0]
|
|
10006baa: 185b adds r3, r3, r1
|
|
10006bac: 6013 str r3, [r2, #0]
|
|
10006bae: 0028 movs r0, r5
|
|
10006bb0: f7ff ff32 bl 10006a18 <prvInsertBlockIntoFreeList>
|
|
10006bb4: 4a0b ldr r2, [pc, #44] @ (10006be4 <vPortFree+0x68>)
|
|
10006bb6: 6813 ldr r3, [r2, #0]
|
|
10006bb8: 3301 adds r3, #1
|
|
10006bba: 6013 str r3, [r2, #0]
|
|
10006bbc: f001 fc2a bl 10008414 <xTaskResumeAll>
|
|
10006bc0: bd70 pop {r4, r5, r6, pc}
|
|
10006bc2: 4b09 ldr r3, [pc, #36] @ (10006be8 <vPortFree+0x6c>)
|
|
10006bc4: 4a09 ldr r2, [pc, #36] @ (10006bec <vPortFree+0x70>)
|
|
10006bc6: 2142 movs r1, #66 @ 0x42
|
|
10006bc8: 4809 ldr r0, [pc, #36] @ (10006bf0 <vPortFree+0x74>)
|
|
10006bca: 31ff adds r1, #255 @ 0xff
|
|
10006bcc: f7fb fc5a bl 10002484 <__assert_func>
|
|
10006bd0: 4b08 ldr r3, [pc, #32] @ (10006bf4 <vPortFree+0x78>)
|
|
10006bd2: 4a06 ldr r2, [pc, #24] @ (10006bec <vPortFree+0x70>)
|
|
10006bd4: 21a1 movs r1, #161 @ 0xa1
|
|
10006bd6: 4806 ldr r0, [pc, #24] @ (10006bf0 <vPortFree+0x74>)
|
|
10006bd8: 0049 lsls r1, r1, #1
|
|
10006bda: f7fb fc53 bl 10002484 <__assert_func>
|
|
10006bde: 46c0 nop @ (mov r8, r8)
|
|
10006be0: 20021c80 .word 0x20021c80
|
|
10006be4: 20021c9c .word 0x20021c9c
|
|
10006be8: 1000a8b8 .word 0x1000a8b8
|
|
10006bec: 1000a954 .word 0x1000a954
|
|
10006bf0: 1000a83c .word 0x1000a83c
|
|
10006bf4: 1000a92c .word 0x1000a92c
|
|
|
|
10006bf8 <time_reached>:
|
|
10006bf8: 4b08 ldr r3, [pc, #32] @ (10006c1c <time_reached+0x24>)
|
|
10006bfa: 6a5b ldr r3, [r3, #36] @ 0x24
|
|
10006bfc: 4299 cmp r1, r3
|
|
10006bfe: d809 bhi.n 10006c14 <time_reached+0x1c>
|
|
10006c00: 4a06 ldr r2, [pc, #24] @ (10006c1c <time_reached+0x24>)
|
|
10006c02: 6a92 ldr r2, [r2, #40] @ 0x28
|
|
10006c04: 4282 cmp r2, r0
|
|
10006c06: d207 bcs.n 10006c18 <time_reached+0x20>
|
|
10006c08: 4299 cmp r1, r3
|
|
10006c0a: d001 beq.n 10006c10 <time_reached+0x18>
|
|
10006c0c: 2001 movs r0, #1
|
|
10006c0e: e002 b.n 10006c16 <time_reached+0x1e>
|
|
10006c10: 2000 movs r0, #0
|
|
10006c12: e000 b.n 10006c16 <time_reached+0x1e>
|
|
10006c14: 2000 movs r0, #0
|
|
10006c16: 4770 bx lr
|
|
10006c18: 2001 movs r0, #1
|
|
10006c1a: e7fc b.n 10006c16 <time_reached+0x1e>
|
|
10006c1c: 40054000 .word 0x40054000
|
|
|
|
10006c20 <vPortSVCHandler>:
|
|
10006c20: 4770 bx lr
|
|
...
|
|
|
|
10006c30 <vPortStartFirstTask>:
|
|
10006c30: 4a0b ldr r2, [pc, #44] @ (10006c60 <pxCurrentTCBConst1>)
|
|
10006c32: 6813 ldr r3, [r2, #0]
|
|
10006c34: 6818 ldr r0, [r3, #0]
|
|
10006c36: 3020 adds r0, #32
|
|
10006c38: f380 8809 msr PSP, r0
|
|
10006c3c: 2002 movs r0, #2
|
|
10006c3e: f380 8814 msr CONTROL, r0
|
|
10006c42: f3bf 8f6f isb sy
|
|
10006c46: bc3f pop {r0, r1, r2, r3, r4, r5}
|
|
10006c48: 46ae mov lr, r5
|
|
10006c4a: bc08 pop {r3}
|
|
10006c4c: bc04 pop {r2}
|
|
10006c4e: b662 cpsie i
|
|
10006c50: 4718 bx r3
|
|
10006c52: 46c0 nop @ (mov r8, r8)
|
|
10006c54: 46c0 nop @ (mov r8, r8)
|
|
10006c56: 46c0 nop @ (mov r8, r8)
|
|
10006c58: 46c0 nop @ (mov r8, r8)
|
|
10006c5a: 46c0 nop @ (mov r8, r8)
|
|
10006c5c: 46c0 nop @ (mov r8, r8)
|
|
10006c5e: 46c0 nop @ (mov r8, r8)
|
|
|
|
10006c60 <pxCurrentTCBConst1>:
|
|
10006c60: 20001738 .word 0x20001738
|
|
...
|
|
|
|
10006c70 <xPortPendSVHandler>:
|
|
10006c70: f3ef 8009 mrs r0, PSP
|
|
10006c74: 4b16 ldr r3, [pc, #88] @ (10006cd0 <pxCurrentTCBConst2>)
|
|
10006c76: 681a ldr r2, [r3, #0]
|
|
10006c78: 3820 subs r0, #32
|
|
10006c7a: 6010 str r0, [r2, #0]
|
|
10006c7c: c0f0 stmia r0!, {r4, r5, r6, r7}
|
|
10006c7e: 4644 mov r4, r8
|
|
10006c80: 464d mov r5, r9
|
|
10006c82: 4656 mov r6, sl
|
|
10006c84: 465f mov r7, fp
|
|
10006c86: c0f0 stmia r0!, {r4, r5, r6, r7}
|
|
10006c88: 220d movs r2, #13
|
|
10006c8a: 0712 lsls r2, r2, #28
|
|
10006c8c: 6e14 ldr r4, [r2, #96] @ 0x60
|
|
10006c8e: 6e55 ldr r5, [r2, #100] @ 0x64
|
|
10006c90: 6f56 ldr r6, [r2, #116] @ 0x74
|
|
10006c92: 6f17 ldr r7, [r2, #112] @ 0x70
|
|
10006c94: 3830 subs r0, #48 @ 0x30
|
|
10006c96: c0f0 stmia r0!, {r4, r5, r6, r7}
|
|
10006c98: b508 push {r3, lr}
|
|
10006c9a: b672 cpsid i
|
|
10006c9c: f001 fc8c bl 100085b8 <vTaskSwitchContext>
|
|
10006ca0: b662 cpsie i
|
|
10006ca2: bc0c pop {r2, r3}
|
|
10006ca4: 6811 ldr r1, [r2, #0]
|
|
10006ca6: 6808 ldr r0, [r1, #0]
|
|
10006ca8: 3010 adds r0, #16
|
|
10006caa: c8f0 ldmia r0!, {r4, r5, r6, r7}
|
|
10006cac: 46a0 mov r8, r4
|
|
10006cae: 46a9 mov r9, r5
|
|
10006cb0: 46b2 mov sl, r6
|
|
10006cb2: 46bb mov fp, r7
|
|
10006cb4: f380 8809 msr PSP, r0
|
|
10006cb8: 220d movs r2, #13
|
|
10006cba: 0712 lsls r2, r2, #28
|
|
10006cbc: 3830 subs r0, #48 @ 0x30
|
|
10006cbe: c8f0 ldmia r0!, {r4, r5, r6, r7}
|
|
10006cc0: 6614 str r4, [r2, #96] @ 0x60
|
|
10006cc2: 6655 str r5, [r2, #100] @ 0x64
|
|
10006cc4: 6756 str r6, [r2, #116] @ 0x74
|
|
10006cc6: 6717 str r7, [r2, #112] @ 0x70
|
|
10006cc8: c8f0 ldmia r0!, {r4, r5, r6, r7}
|
|
10006cca: 4718 bx r3
|
|
10006ccc: 46c0 nop @ (mov r8, r8)
|
|
10006cce: 46c0 nop @ (mov r8, r8)
|
|
|
|
10006cd0 <pxCurrentTCBConst2>:
|
|
10006cd0: 20001738 .word 0x20001738
|
|
|
|
10006cd4 <prvTaskExitError>:
|
|
10006cd4: b510 push {r4, lr}
|
|
10006cd6: f7fb fc85 bl 100025e4 <panic_unsupported>
|
|
...
|
|
|
|
10006cdc <update_us_since_boot>:
|
|
10006cdc: b510 push {r4, lr}
|
|
10006cde: 2b00 cmp r3, #0
|
|
10006ce0: db02 blt.n 10006ce8 <update_us_since_boot+0xc>
|
|
10006ce2: 6002 str r2, [r0, #0]
|
|
10006ce4: 6043 str r3, [r0, #4]
|
|
10006ce6: bd10 pop {r4, pc}
|
|
10006ce8: 4b02 ldr r3, [pc, #8] @ (10006cf4 <update_us_since_boot+0x18>)
|
|
10006cea: 4a03 ldr r2, [pc, #12] @ (10006cf8 <update_us_since_boot+0x1c>)
|
|
10006cec: 4803 ldr r0, [pc, #12] @ (10006cfc <update_us_since_boot+0x20>)
|
|
10006cee: 213f movs r1, #63 @ 0x3f
|
|
10006cf0: f7fb fbc8 bl 10002484 <__assert_func>
|
|
10006cf4: 10009770 .word 0x10009770
|
|
10006cf8: 1000aa64 .word 0x1000aa64
|
|
10006cfc: 1000978c .word 0x1000978c
|
|
|
|
10006d00 <get_absolute_time>:
|
|
10006d00: b510 push {r4, lr}
|
|
10006d02: b082 sub sp, #8
|
|
10006d04: 0004 movs r4, r0
|
|
10006d06: f7fa ffe9 bl 10001cdc <time_us_64>
|
|
10006d0a: 0002 movs r2, r0
|
|
10006d0c: 000b movs r3, r1
|
|
10006d0e: 4668 mov r0, sp
|
|
10006d10: f7ff ffe4 bl 10006cdc <update_us_since_boot>
|
|
10006d14: 9a00 ldr r2, [sp, #0]
|
|
10006d16: 9b01 ldr r3, [sp, #4]
|
|
10006d18: 6022 str r2, [r4, #0]
|
|
10006d1a: 6063 str r3, [r4, #4]
|
|
10006d1c: 0020 movs r0, r4
|
|
10006d1e: b002 add sp, #8
|
|
10006d20: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10006d24 <prvGetTicksToWaitBefore>:
|
|
10006d24: b530 push {r4, r5, lr}
|
|
10006d26: b083 sub sp, #12
|
|
10006d28: 0004 movs r4, r0
|
|
10006d2a: 000d movs r5, r1
|
|
10006d2c: 4668 mov r0, sp
|
|
10006d2e: f7ff ffe7 bl 10006d00 <get_absolute_time>
|
|
10006d32: 9a00 ldr r2, [sp, #0]
|
|
10006d34: 9b01 ldr r3, [sp, #4]
|
|
10006d36: 0020 movs r0, r4
|
|
10006d38: 0029 movs r1, r5
|
|
10006d3a: 1a80 subs r0, r0, r2
|
|
10006d3c: 4199 sbcs r1, r3
|
|
10006d3e: 4a0a ldr r2, [pc, #40] @ (10006d68 <prvGetTicksToWaitBefore+0x44>)
|
|
10006d40: 2301 movs r3, #1
|
|
10006d42: 425b negs r3, r3
|
|
10006d44: 1880 adds r0, r0, r2
|
|
10006d46: 4159 adcs r1, r3
|
|
10006d48: 2900 cmp r1, #0
|
|
10006d4a: dc07 bgt.n 10006d5c <prvGetTicksToWaitBefore+0x38>
|
|
10006d4c: d002 beq.n 10006d54 <prvGetTicksToWaitBefore+0x30>
|
|
10006d4e: 2000 movs r0, #0
|
|
10006d50: b003 add sp, #12
|
|
10006d52: bd30 pop {r4, r5, pc}
|
|
10006d54: 23fa movs r3, #250 @ 0xfa
|
|
10006d56: 009b lsls r3, r3, #2
|
|
10006d58: 4298 cmp r0, r3
|
|
10006d5a: d3f8 bcc.n 10006d4e <prvGetTicksToWaitBefore+0x2a>
|
|
10006d5c: 22fa movs r2, #250 @ 0xfa
|
|
10006d5e: 0092 lsls r2, r2, #2
|
|
10006d60: 2300 movs r3, #0
|
|
10006d62: f7fc fd71 bl 10003848 <__wrap___aeabi_ldivmod>
|
|
10006d66: e7f3 b.n 10006d50 <prvGetTicksToWaitBefore+0x2c>
|
|
10006d68: fffffc18 .word 0xfffffc18
|
|
|
|
10006d6c <pxPortInitialiseStack>:
|
|
10006d6c: b510 push {r4, lr}
|
|
10006d6e: 1f03 subs r3, r0, #4
|
|
10006d70: 2480 movs r4, #128 @ 0x80
|
|
10006d72: 0464 lsls r4, r4, #17
|
|
10006d74: 601c str r4, [r3, #0]
|
|
10006d76: 3b04 subs r3, #4
|
|
10006d78: 6019 str r1, [r3, #0]
|
|
10006d7a: 4b04 ldr r3, [pc, #16] @ (10006d8c <pxPortInitialiseStack+0x20>)
|
|
10006d7c: 0001 movs r1, r0
|
|
10006d7e: 390c subs r1, #12
|
|
10006d80: 600b str r3, [r1, #0]
|
|
10006d82: 0003 movs r3, r0
|
|
10006d84: 3b20 subs r3, #32
|
|
10006d86: 601a str r2, [r3, #0]
|
|
10006d88: 3840 subs r0, #64 @ 0x40
|
|
10006d8a: bd10 pop {r4, pc}
|
|
10006d8c: 10006cd5 .word 0x10006cd5
|
|
|
|
10006d90 <vPortYield>:
|
|
10006d90: b510 push {r4, lr}
|
|
10006d92: 4b0a ldr r3, [pc, #40] @ (10006dbc <vPortYield+0x2c>)
|
|
10006d94: 681b ldr r3, [r3, #0]
|
|
10006d96: 2b00 cmp r3, #0
|
|
10006d98: d108 bne.n 10006dac <vPortYield+0x1c>
|
|
10006d9a: 4b09 ldr r3, [pc, #36] @ (10006dc0 <vPortYield+0x30>)
|
|
10006d9c: 2280 movs r2, #128 @ 0x80
|
|
10006d9e: 0552 lsls r2, r2, #21
|
|
10006da0: 601a str r2, [r3, #0]
|
|
10006da2: f3bf 8f4f dsb sy
|
|
10006da6: f3bf 8f6f isb sy
|
|
10006daa: bd10 pop {r4, pc}
|
|
10006dac: 4b05 ldr r3, [pc, #20] @ (10006dc4 <vPortYield+0x34>)
|
|
10006dae: 4a06 ldr r2, [pc, #24] @ (10006dc8 <vPortYield+0x38>)
|
|
10006db0: 2136 movs r1, #54 @ 0x36
|
|
10006db2: 4806 ldr r0, [pc, #24] @ (10006dcc <vPortYield+0x3c>)
|
|
10006db4: 31ff adds r1, #255 @ 0xff
|
|
10006db6: f7fb fb65 bl 10002484 <__assert_func>
|
|
10006dba: 46c0 nop @ (mov r8, r8)
|
|
10006dbc: 200019d0 .word 0x200019d0
|
|
10006dc0: e000ed04 .word 0xe000ed04
|
|
10006dc4: 1000a970 .word 0x1000a970
|
|
10006dc8: 1000aaec .word 0x1000aaec
|
|
10006dcc: 1000a990 .word 0x1000a990
|
|
|
|
10006dd0 <vPortEnterCritical>:
|
|
10006dd0: b672 cpsid i
|
|
10006dd2: 4a04 ldr r2, [pc, #16] @ (10006de4 <vPortEnterCritical+0x14>)
|
|
10006dd4: 6813 ldr r3, [r2, #0]
|
|
10006dd6: 3301 adds r3, #1
|
|
10006dd8: 6013 str r3, [r2, #0]
|
|
10006dda: f3bf 8f4f dsb sy
|
|
10006dde: f3bf 8f6f isb sy
|
|
10006de2: 4770 bx lr
|
|
10006de4: 20021c14 .word 0x20021c14
|
|
|
|
10006de8 <vPortEnableInterrupts>:
|
|
10006de8: 4b07 ldr r3, [pc, #28] @ (10006e08 <vPortEnableInterrupts+0x20>)
|
|
10006dea: 681b ldr r3, [r3, #0]
|
|
10006dec: 2b00 cmp r3, #0
|
|
10006dee: d009 beq.n 10006e04 <vPortEnableInterrupts+0x1c>
|
|
10006df0: 4a06 ldr r2, [pc, #24] @ (10006e0c <vPortEnableInterrupts+0x24>)
|
|
10006df2: 6811 ldr r1, [r2, #0]
|
|
10006df4: f3bf 8f5f dmb sy
|
|
10006df8: 2200 movs r2, #0
|
|
10006dfa: 601a str r2, [r3, #0]
|
|
10006dfc: f381 8810 msr PRIMASK, r1
|
|
10006e00: 4b01 ldr r3, [pc, #4] @ (10006e08 <vPortEnableInterrupts+0x20>)
|
|
10006e02: 601a str r2, [r3, #0]
|
|
10006e04: b662 cpsie i
|
|
10006e06: 4770 bx lr
|
|
10006e08: 200019d0 .word 0x200019d0
|
|
10006e0c: 20021bfc .word 0x20021bfc
|
|
|
|
10006e10 <vPortExitCritical>:
|
|
10006e10: b510 push {r4, lr}
|
|
10006e12: 4b0a ldr r3, [pc, #40] @ (10006e3c <vPortExitCritical+0x2c>)
|
|
10006e14: 681b ldr r3, [r3, #0]
|
|
10006e16: 2b00 cmp r3, #0
|
|
10006e18: d005 beq.n 10006e26 <vPortExitCritical+0x16>
|
|
10006e1a: 3b01 subs r3, #1
|
|
10006e1c: 4a07 ldr r2, [pc, #28] @ (10006e3c <vPortExitCritical+0x2c>)
|
|
10006e1e: 6013 str r3, [r2, #0]
|
|
10006e20: 2b00 cmp r3, #0
|
|
10006e22: d007 beq.n 10006e34 <vPortExitCritical+0x24>
|
|
10006e24: bd10 pop {r4, pc}
|
|
10006e26: 4b06 ldr r3, [pc, #24] @ (10006e40 <vPortExitCritical+0x30>)
|
|
10006e28: 4a06 ldr r2, [pc, #24] @ (10006e44 <vPortExitCritical+0x34>)
|
|
10006e2a: 21a7 movs r1, #167 @ 0xa7
|
|
10006e2c: 4806 ldr r0, [pc, #24] @ (10006e48 <vPortExitCritical+0x38>)
|
|
10006e2e: 0049 lsls r1, r1, #1
|
|
10006e30: f7fb fb28 bl 10002484 <__assert_func>
|
|
10006e34: f7ff ffd8 bl 10006de8 <vPortEnableInterrupts>
|
|
10006e38: e7f4 b.n 10006e24 <vPortExitCritical+0x14>
|
|
10006e3a: 46c0 nop @ (mov r8, r8)
|
|
10006e3c: 20021c14 .word 0x20021c14
|
|
10006e40: 1000a9dc .word 0x1000a9dc
|
|
10006e44: 1000aad8 .word 0x1000aad8
|
|
10006e48: 1000a990 .word 0x1000a990
|
|
|
|
10006e4c <ulSetInterruptMaskFromISR>:
|
|
10006e4c: f3ef 8010 mrs r0, PRIMASK
|
|
10006e50: b672 cpsid i
|
|
10006e52: 4770 bx lr
|
|
|
|
10006e54 <vClearInterruptMaskFromISR>:
|
|
10006e54: f380 8810 msr PRIMASK, r0
|
|
10006e58: 4770 bx lr
|
|
...
|
|
|
|
10006e5c <xPortSysTickHandler>:
|
|
10006e5c: b510 push {r4, lr}
|
|
10006e5e: f7ff fff5 bl 10006e4c <ulSetInterruptMaskFromISR>
|
|
10006e62: 0004 movs r4, r0
|
|
10006e64: f001 fa18 bl 10008298 <xTaskIncrementTick>
|
|
10006e68: 2800 cmp r0, #0
|
|
10006e6a: d003 beq.n 10006e74 <xPortSysTickHandler+0x18>
|
|
10006e6c: 4b03 ldr r3, [pc, #12] @ (10006e7c <xPortSysTickHandler+0x20>)
|
|
10006e6e: 2280 movs r2, #128 @ 0x80
|
|
10006e70: 0552 lsls r2, r2, #21
|
|
10006e72: 601a str r2, [r3, #0]
|
|
10006e74: 0020 movs r0, r4
|
|
10006e76: f7ff ffed bl 10006e54 <vClearInterruptMaskFromISR>
|
|
10006e7a: bd10 pop {r4, pc}
|
|
10006e7c: e000ed04 .word 0xe000ed04
|
|
|
|
10006e80 <vPortSetupTimerInterrupt>:
|
|
10006e80: b510 push {r4, lr}
|
|
10006e82: 4c09 ldr r4, [pc, #36] @ (10006ea8 <vPortSetupTimerInterrupt+0x28>)
|
|
10006e84: 2300 movs r3, #0
|
|
10006e86: 6023 str r3, [r4, #0]
|
|
10006e88: 4a08 ldr r2, [pc, #32] @ (10006eac <vPortSetupTimerInterrupt+0x2c>)
|
|
10006e8a: 6013 str r3, [r2, #0]
|
|
10006e8c: 2005 movs r0, #5
|
|
10006e8e: f7f9 fdcd bl 10000a2c <clock_get_hz>
|
|
10006e92: 21fa movs r1, #250 @ 0xfa
|
|
10006e94: 0089 lsls r1, r1, #2
|
|
10006e96: f7fc fcb1 bl 100037fc <__wrap___aeabi_uidiv>
|
|
10006e9a: 3801 subs r0, #1
|
|
10006e9c: 4b04 ldr r3, [pc, #16] @ (10006eb0 <vPortSetupTimerInterrupt+0x30>)
|
|
10006e9e: 6018 str r0, [r3, #0]
|
|
10006ea0: 2307 movs r3, #7
|
|
10006ea2: 6023 str r3, [r4, #0]
|
|
10006ea4: bd10 pop {r4, pc}
|
|
10006ea6: 46c0 nop @ (mov r8, r8)
|
|
10006ea8: e000e010 .word 0xe000e010
|
|
10006eac: e000e018 .word 0xe000e018
|
|
10006eb0: e000e014 .word 0xe000e014
|
|
|
|
10006eb4 <xPortStartScheduler>:
|
|
10006eb4: b510 push {r4, lr}
|
|
10006eb6: 4b15 ldr r3, [pc, #84] @ (10006f0c <xPortStartScheduler+0x58>)
|
|
10006eb8: 6819 ldr r1, [r3, #0]
|
|
10006eba: 22ff movs r2, #255 @ 0xff
|
|
10006ebc: 0412 lsls r2, r2, #16
|
|
10006ebe: 430a orrs r2, r1
|
|
10006ec0: 601a str r2, [r3, #0]
|
|
10006ec2: 6819 ldr r1, [r3, #0]
|
|
10006ec4: 22ff movs r2, #255 @ 0xff
|
|
10006ec6: 0612 lsls r2, r2, #24
|
|
10006ec8: 430a orrs r2, r1
|
|
10006eca: 601a str r2, [r3, #0]
|
|
10006ecc: 4910 ldr r1, [pc, #64] @ (10006f10 <xPortStartScheduler+0x5c>)
|
|
10006ece: 2002 movs r0, #2
|
|
10006ed0: 4240 negs r0, r0
|
|
10006ed2: f7fb faaf bl 10002434 <exception_set_exclusive_handler>
|
|
10006ed6: 490f ldr r1, [pc, #60] @ (10006f14 <xPortStartScheduler+0x60>)
|
|
10006ed8: 2001 movs r0, #1
|
|
10006eda: 4240 negs r0, r0
|
|
10006edc: f7fb faaa bl 10002434 <exception_set_exclusive_handler>
|
|
10006ee0: 490d ldr r1, [pc, #52] @ (10006f18 <xPortStartScheduler+0x64>)
|
|
10006ee2: 2005 movs r0, #5
|
|
10006ee4: 4240 negs r0, r0
|
|
10006ee6: f7fb faa5 bl 10002434 <exception_set_exclusive_handler>
|
|
10006eea: f7ff ffc9 bl 10006e80 <vPortSetupTimerInterrupt>
|
|
10006eee: 4b0b ldr r3, [pc, #44] @ (10006f1c <xPortStartScheduler+0x68>)
|
|
10006ef0: 2200 movs r2, #0
|
|
10006ef2: 601a str r2, [r3, #0]
|
|
10006ef4: 23d0 movs r3, #208 @ 0xd0
|
|
10006ef6: 061b lsls r3, r3, #24
|
|
10006ef8: 681a ldr r2, [r3, #0]
|
|
10006efa: 4b09 ldr r3, [pc, #36] @ (10006f20 <xPortStartScheduler+0x6c>)
|
|
10006efc: 701a strb r2, [r3, #0]
|
|
10006efe: f7ff fe97 bl 10006c30 <vPortStartFirstTask>
|
|
10006f02: f001 fb59 bl 100085b8 <vTaskSwitchContext>
|
|
10006f06: f7ff fee5 bl 10006cd4 <prvTaskExitError>
|
|
10006f0a: 46c0 nop @ (mov r8, r8)
|
|
10006f0c: e000ed20 .word 0xe000ed20
|
|
10006f10: 10006c71 .word 0x10006c71
|
|
10006f14: 10006e5d .word 0x10006e5d
|
|
10006f18: 10006c21 .word 0x10006c21
|
|
10006f1c: 20021c14 .word 0x20021c14
|
|
10006f20: 20000bbd .word 0x20000bbd
|
|
|
|
10006f24 <ulPortLockGetCurrentOwnerId>:
|
|
10006f24: b510 push {r4, lr}
|
|
10006f26: 4b09 ldr r3, [pc, #36] @ (10006f4c <ulPortLockGetCurrentOwnerId+0x28>)
|
|
10006f28: 781b ldrb r3, [r3, #0]
|
|
10006f2a: 22d0 movs r2, #208 @ 0xd0
|
|
10006f2c: 0612 lsls r2, r2, #24
|
|
10006f2e: 6810 ldr r0, [r2, #0]
|
|
10006f30: 4283 cmp r3, r0
|
|
10006f32: d000 beq.n 10006f36 <ulPortLockGetCurrentOwnerId+0x12>
|
|
10006f34: bd10 pop {r4, pc}
|
|
10006f36: f3ef 8305 mrs r3, IPSR
|
|
10006f3a: 2b00 cmp r3, #0
|
|
10006f3c: d002 beq.n 10006f44 <ulPortLockGetCurrentOwnerId+0x20>
|
|
10006f3e: 005b lsls r3, r3, #1
|
|
10006f40: 18c0 adds r0, r0, r3
|
|
10006f42: e7f7 b.n 10006f34 <ulPortLockGetCurrentOwnerId+0x10>
|
|
10006f44: f001 fd80 bl 10008a48 <xTaskGetCurrentTaskHandle>
|
|
10006f48: e7f4 b.n 10006f34 <ulPortLockGetCurrentOwnerId+0x10>
|
|
10006f4a: 46c0 nop @ (mov r8, r8)
|
|
10006f4c: 20000bbd .word 0x20000bbd
|
|
|
|
10006f50 <vPortLockInternalSpinUnlockWithWait>:
|
|
10006f50: b500 push {lr}
|
|
10006f52: b083 sub sp, #12
|
|
10006f54: f3ef 8305 mrs r3, IPSR
|
|
10006f58: b2db uxtb r3, r3
|
|
10006f5a: 2b00 cmp r3, #0
|
|
10006f5c: d110 bne.n 10006f80 <vPortLockInternalSpinUnlockWithWait+0x30>
|
|
10006f5e: 4b21 ldr r3, [pc, #132] @ (10006fe4 <vPortLockInternalSpinUnlockWithWait+0x94>)
|
|
10006f60: 781a ldrb r2, [r3, #0]
|
|
10006f62: 23d0 movs r3, #208 @ 0xd0
|
|
10006f64: 061b lsls r3, r3, #24
|
|
10006f66: 681b ldr r3, [r3, #0]
|
|
10006f68: 429a cmp r2, r3
|
|
10006f6a: d00f beq.n 10006f8c <vPortLockInternalSpinUnlockWithWait+0x3c>
|
|
10006f6c: 6803 ldr r3, [r0, #0]
|
|
10006f6e: f3bf 8f5f dmb sy
|
|
10006f72: 2200 movs r2, #0
|
|
10006f74: 601a str r2, [r3, #0]
|
|
10006f76: f381 8810 msr PRIMASK, r1
|
|
10006f7a: bf20 wfe
|
|
10006f7c: b003 add sp, #12
|
|
10006f7e: bd00 pop {pc}
|
|
10006f80: 4b19 ldr r3, [pc, #100] @ (10006fe8 <vPortLockInternalSpinUnlockWithWait+0x98>)
|
|
10006f82: 4a1a ldr r2, [pc, #104] @ (10006fec <vPortLockInternalSpinUnlockWithWait+0x9c>)
|
|
10006f84: 481a ldr r0, [pc, #104] @ (10006ff0 <vPortLockInternalSpinUnlockWithWait+0xa0>)
|
|
10006f86: 491b ldr r1, [pc, #108] @ (10006ff4 <vPortLockInternalSpinUnlockWithWait+0xa4>)
|
|
10006f88: f7fb fa7c bl 10002484 <__assert_func>
|
|
10006f8c: 4b1a ldr r3, [pc, #104] @ (10006ff8 <vPortLockInternalSpinUnlockWithWait+0xa8>)
|
|
10006f8e: 681b ldr r3, [r3, #0]
|
|
10006f90: 2b00 cmp r3, #0
|
|
10006f92: d119 bne.n 10006fc8 <vPortLockInternalSpinUnlockWithWait+0x78>
|
|
10006f94: 6803 ldr r3, [r0, #0]
|
|
10006f96: 2b00 cmp r3, #0
|
|
10006f98: d01c beq.n 10006fd4 <vPortLockInternalSpinUnlockWithWait+0x84>
|
|
10006f9a: 4a17 ldr r2, [pc, #92] @ (10006ff8 <vPortLockInternalSpinUnlockWithWait+0xa8>)
|
|
10006f9c: 6013 str r3, [r2, #0]
|
|
10006f9e: 4a17 ldr r2, [pc, #92] @ (10006ffc <vPortLockInternalSpinUnlockWithWait+0xac>)
|
|
10006fa0: 6011 str r1, [r2, #0]
|
|
10006fa2: 4a17 ldr r2, [pc, #92] @ (10007000 <vPortLockInternalSpinUnlockWithWait+0xb0>)
|
|
10006fa4: 4694 mov ip, r2
|
|
10006fa6: 4463 add r3, ip
|
|
10006fa8: 109b asrs r3, r3, #2
|
|
10006faa: 2101 movs r1, #1
|
|
10006fac: 4099 lsls r1, r3
|
|
10006fae: 020b lsls r3, r1, #8
|
|
10006fb0: 4319 orrs r1, r3
|
|
10006fb2: 0a09 lsrs r1, r1, #8
|
|
10006fb4: 4b13 ldr r3, [pc, #76] @ (10007004 <vPortLockInternalSpinUnlockWithWait+0xb4>)
|
|
10006fb6: 6818 ldr r0, [r3, #0]
|
|
10006fb8: 2301 movs r3, #1
|
|
10006fba: 425b negs r3, r3
|
|
10006fbc: 9300 str r3, [sp, #0]
|
|
10006fbe: 2300 movs r3, #0
|
|
10006fc0: 2201 movs r2, #1
|
|
10006fc2: f000 f919 bl 100071f8 <xEventGroupWaitBits>
|
|
10006fc6: e7d9 b.n 10006f7c <vPortLockInternalSpinUnlockWithWait+0x2c>
|
|
10006fc8: 4b0f ldr r3, [pc, #60] @ (10007008 <vPortLockInternalSpinUnlockWithWait+0xb8>)
|
|
10006fca: 4a08 ldr r2, [pc, #32] @ (10006fec <vPortLockInternalSpinUnlockWithWait+0x9c>)
|
|
10006fcc: 4808 ldr r0, [pc, #32] @ (10006ff0 <vPortLockInternalSpinUnlockWithWait+0xa0>)
|
|
10006fce: 490f ldr r1, [pc, #60] @ (1000700c <vPortLockInternalSpinUnlockWithWait+0xbc>)
|
|
10006fd0: f7fb fa58 bl 10002484 <__assert_func>
|
|
10006fd4: 4b0e ldr r3, [pc, #56] @ (10007010 <vPortLockInternalSpinUnlockWithWait+0xc0>)
|
|
10006fd6: 4a05 ldr r2, [pc, #20] @ (10006fec <vPortLockInternalSpinUnlockWithWait+0x9c>)
|
|
10006fd8: 21ba movs r1, #186 @ 0xba
|
|
10006fda: 4805 ldr r0, [pc, #20] @ (10006ff0 <vPortLockInternalSpinUnlockWithWait+0xa0>)
|
|
10006fdc: 0089 lsls r1, r1, #2
|
|
10006fde: f7fb fa51 bl 10002484 <__assert_func>
|
|
10006fe2: 46c0 nop @ (mov r8, r8)
|
|
10006fe4: 20000bbd .word 0x20000bbd
|
|
10006fe8: 1000a9f0 .word 0x1000a9f0
|
|
10006fec: 1000aab4 .word 0x1000aab4
|
|
10006ff0: 1000a990 .word 0x1000a990
|
|
10006ff4: 000002db .word 0x000002db
|
|
10006ff8: 200019d0 .word 0x200019d0
|
|
10006ffc: 20021bfc .word 0x20021bfc
|
|
10007000: 2fffff00 .word 0x2fffff00
|
|
10007004: 20021c7c .word 0x20021c7c
|
|
10007008: 1000a970 .word 0x1000a970
|
|
1000700c: 000002e3 .word 0x000002e3
|
|
10007010: 1000aa50 .word 0x1000aa50
|
|
|
|
10007014 <vPortLockInternalSpinUnlockWithNotify>:
|
|
10007014: b530 push {r4, r5, lr}
|
|
10007016: b083 sub sp, #12
|
|
10007018: 000a movs r2, r1
|
|
1000701a: 6804 ldr r4, [r0, #0]
|
|
1000701c: 4b1b ldr r3, [pc, #108] @ (1000708c <vPortLockInternalSpinUnlockWithNotify+0x78>)
|
|
1000701e: 18e1 adds r1, r4, r3
|
|
10007020: 1089 asrs r1, r1, #2
|
|
10007022: 2301 movs r3, #1
|
|
10007024: 408b lsls r3, r1
|
|
10007026: 0219 lsls r1, r3, #8
|
|
10007028: 4319 orrs r1, r3
|
|
1000702a: 0a09 lsrs r1, r1, #8
|
|
1000702c: 4b18 ldr r3, [pc, #96] @ (10007090 <vPortLockInternalSpinUnlockWithNotify+0x7c>)
|
|
1000702e: 781d ldrb r5, [r3, #0]
|
|
10007030: 23d0 movs r3, #208 @ 0xd0
|
|
10007032: 061b lsls r3, r3, #24
|
|
10007034: 681b ldr r3, [r3, #0]
|
|
10007036: 429d cmp r5, r3
|
|
10007038: d009 beq.n 1000704e <vPortLockInternalSpinUnlockWithNotify+0x3a>
|
|
1000703a: bf40 sev
|
|
1000703c: 6803 ldr r3, [r0, #0]
|
|
1000703e: f3bf 8f5f dmb sy
|
|
10007042: 2100 movs r1, #0
|
|
10007044: 6019 str r1, [r3, #0]
|
|
10007046: f382 8810 msr PRIMASK, r2
|
|
1000704a: b003 add sp, #12
|
|
1000704c: bd30 pop {r4, r5, pc}
|
|
1000704e: f3bf 8f5f dmb sy
|
|
10007052: 2300 movs r3, #0
|
|
10007054: 6023 str r3, [r4, #0]
|
|
10007056: f382 8810 msr PRIMASK, r2
|
|
1000705a: f3ef 8305 mrs r3, IPSR
|
|
1000705e: b2db uxtb r3, r3
|
|
10007060: 2b00 cmp r3, #0
|
|
10007062: d104 bne.n 1000706e <vPortLockInternalSpinUnlockWithNotify+0x5a>
|
|
10007064: 4b0b ldr r3, [pc, #44] @ (10007094 <vPortLockInternalSpinUnlockWithNotify+0x80>)
|
|
10007066: 6818 ldr r0, [r3, #0]
|
|
10007068: f000 f956 bl 10007318 <xEventGroupSetBits>
|
|
1000706c: e7ed b.n 1000704a <vPortLockInternalSpinUnlockWithNotify+0x36>
|
|
1000706e: 2300 movs r3, #0
|
|
10007070: 9301 str r3, [sp, #4]
|
|
10007072: 4b08 ldr r3, [pc, #32] @ (10007094 <vPortLockInternalSpinUnlockWithNotify+0x80>)
|
|
10007074: 6818 ldr r0, [r3, #0]
|
|
10007076: aa01 add r2, sp, #4
|
|
10007078: f000 f99e bl 100073b8 <xEventGroupSetBitsFromISR>
|
|
1000707c: 9b01 ldr r3, [sp, #4]
|
|
1000707e: 2b00 cmp r3, #0
|
|
10007080: d0e3 beq.n 1000704a <vPortLockInternalSpinUnlockWithNotify+0x36>
|
|
10007082: 4b05 ldr r3, [pc, #20] @ (10007098 <vPortLockInternalSpinUnlockWithNotify+0x84>)
|
|
10007084: 2280 movs r2, #128 @ 0x80
|
|
10007086: 0552 lsls r2, r2, #21
|
|
10007088: 601a str r2, [r3, #0]
|
|
1000708a: e7de b.n 1000704a <vPortLockInternalSpinUnlockWithNotify+0x36>
|
|
1000708c: 2fffff00 .word 0x2fffff00
|
|
10007090: 20000bbd .word 0x20000bbd
|
|
10007094: 20021c7c .word 0x20021c7c
|
|
10007098: e000ed04 .word 0xe000ed04
|
|
|
|
1000709c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout>:
|
|
1000709c: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000709e: b083 sub sp, #12
|
|
100070a0: 0007 movs r7, r0
|
|
100070a2: 000e movs r6, r1
|
|
100070a4: 0015 movs r5, r2
|
|
100070a6: 001c movs r4, r3
|
|
100070a8: f3ef 8305 mrs r3, IPSR
|
|
100070ac: b2db uxtb r3, r3
|
|
100070ae: 2b00 cmp r3, #0
|
|
100070b0: d130 bne.n 10007114 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x78>
|
|
100070b2: 4b31 ldr r3, [pc, #196] @ (10007178 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xdc>)
|
|
100070b4: 781a ldrb r2, [r3, #0]
|
|
100070b6: 23d0 movs r3, #208 @ 0xd0
|
|
100070b8: 061b lsls r3, r3, #24
|
|
100070ba: 681b ldr r3, [r3, #0]
|
|
100070bc: 429a cmp r2, r3
|
|
100070be: d12f bne.n 10007120 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x84>
|
|
100070c0: 4b2e ldr r3, [pc, #184] @ (1000717c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xe0>)
|
|
100070c2: 681b ldr r3, [r3, #0]
|
|
100070c4: 2b00 cmp r3, #0
|
|
100070c6: d138 bne.n 1000713a <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x9e>
|
|
100070c8: 0028 movs r0, r5
|
|
100070ca: 0021 movs r1, r4
|
|
100070cc: f7ff fe2a bl 10006d24 <prvGetTicksToWaitBefore>
|
|
100070d0: 1e03 subs r3, r0, #0
|
|
100070d2: d03e beq.n 10007152 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xb6>
|
|
100070d4: 683a ldr r2, [r7, #0]
|
|
100070d6: 2a00 cmp r2, #0
|
|
100070d8: d035 beq.n 10007146 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xaa>
|
|
100070da: 4f28 ldr r7, [pc, #160] @ (1000717c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xe0>)
|
|
100070dc: 603a str r2, [r7, #0]
|
|
100070de: 4928 ldr r1, [pc, #160] @ (10007180 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xe4>)
|
|
100070e0: 600e str r6, [r1, #0]
|
|
100070e2: 4928 ldr r1, [pc, #160] @ (10007184 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xe8>)
|
|
100070e4: 468c mov ip, r1
|
|
100070e6: 4462 add r2, ip
|
|
100070e8: 1092 asrs r2, r2, #2
|
|
100070ea: 2101 movs r1, #1
|
|
100070ec: 4091 lsls r1, r2
|
|
100070ee: 020a lsls r2, r1, #8
|
|
100070f0: 4311 orrs r1, r2
|
|
100070f2: 0a09 lsrs r1, r1, #8
|
|
100070f4: 4a24 ldr r2, [pc, #144] @ (10007188 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xec>)
|
|
100070f6: 6810 ldr r0, [r2, #0]
|
|
100070f8: 9300 str r3, [sp, #0]
|
|
100070fa: 2300 movs r3, #0
|
|
100070fc: 2201 movs r2, #1
|
|
100070fe: f000 f87b bl 100071f8 <xEventGroupWaitBits>
|
|
10007102: 683b ldr r3, [r7, #0]
|
|
10007104: 2b00 cmp r3, #0
|
|
10007106: d02b beq.n 10007160 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xc4>
|
|
10007108: 4b20 ldr r3, [pc, #128] @ (1000718c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf0>)
|
|
1000710a: 4a21 ldr r2, [pc, #132] @ (10007190 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf4>)
|
|
1000710c: 4821 ldr r0, [pc, #132] @ (10007194 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf8>)
|
|
1000710e: 4922 ldr r1, [pc, #136] @ (10007198 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xfc>)
|
|
10007110: f7fb f9b8 bl 10002484 <__assert_func>
|
|
10007114: 4b21 ldr r3, [pc, #132] @ (1000719c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x100>)
|
|
10007116: 4a1e ldr r2, [pc, #120] @ (10007190 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf4>)
|
|
10007118: 481e ldr r0, [pc, #120] @ (10007194 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf8>)
|
|
1000711a: 4921 ldr r1, [pc, #132] @ (100071a0 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x104>)
|
|
1000711c: f7fb f9b2 bl 10002484 <__assert_func>
|
|
10007120: 6803 ldr r3, [r0, #0]
|
|
10007122: f3bf 8f5f dmb sy
|
|
10007126: 2200 movs r2, #0
|
|
10007128: 601a str r2, [r3, #0]
|
|
1000712a: f381 8810 msr PRIMASK, r1
|
|
1000712e: 0028 movs r0, r5
|
|
10007130: 0021 movs r1, r4
|
|
10007132: f7fa fd5f bl 10001bf4 <best_effort_wfe_or_timeout>
|
|
10007136: 0004 movs r4, r0
|
|
10007138: e018 b.n 1000716c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xd0>
|
|
1000713a: 4b14 ldr r3, [pc, #80] @ (1000718c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf0>)
|
|
1000713c: 4a14 ldr r2, [pc, #80] @ (10007190 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf4>)
|
|
1000713e: 4815 ldr r0, [pc, #84] @ (10007194 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf8>)
|
|
10007140: 4918 ldr r1, [pc, #96] @ (100071a4 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x108>)
|
|
10007142: f7fb f99f bl 10002484 <__assert_func>
|
|
10007146: 4b18 ldr r3, [pc, #96] @ (100071a8 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x10c>)
|
|
10007148: 4a11 ldr r2, [pc, #68] @ (10007190 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf4>)
|
|
1000714a: 4812 ldr r0, [pc, #72] @ (10007194 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xf8>)
|
|
1000714c: 4917 ldr r1, [pc, #92] @ (100071ac <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0x110>)
|
|
1000714e: f7fb f999 bl 10002484 <__assert_func>
|
|
10007152: 683b ldr r3, [r7, #0]
|
|
10007154: f3bf 8f5f dmb sy
|
|
10007158: 2200 movs r2, #0
|
|
1000715a: 601a str r2, [r3, #0]
|
|
1000715c: f386 8810 msr PRIMASK, r6
|
|
10007160: 0028 movs r0, r5
|
|
10007162: 0021 movs r1, r4
|
|
10007164: f7ff fd48 bl 10006bf8 <time_reached>
|
|
10007168: 1e04 subs r4, r0, #0
|
|
1000716a: d002 beq.n 10007172 <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xd6>
|
|
1000716c: 0020 movs r0, r4
|
|
1000716e: b003 add sp, #12
|
|
10007170: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10007172: f7ff fe0d bl 10006d90 <vPortYield>
|
|
10007176: e7f9 b.n 1000716c <xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout+0xd0>
|
|
10007178: 20000bbd .word 0x20000bbd
|
|
1000717c: 200019d0 .word 0x200019d0
|
|
10007180: 20021bfc .word 0x20021bfc
|
|
10007184: 2fffff00 .word 0x2fffff00
|
|
10007188: 20021c7c .word 0x20021c7c
|
|
1000718c: 1000a970 .word 0x1000a970
|
|
10007190: 1000aa7c .word 0x1000aa7c
|
|
10007194: 1000a990 .word 0x1000a990
|
|
10007198: 00000336 .word 0x00000336
|
|
1000719c: 1000a9f0 .word 0x1000a9f0
|
|
100071a0: 0000031d .word 0x0000031d
|
|
100071a4: 00000326 .word 0x00000326
|
|
100071a8: 1000aa50 .word 0x1000aa50
|
|
100071ac: 0000032e .word 0x0000032e
|
|
|
|
100071b0 <prvRuntimeInitializer>:
|
|
100071b0: b510 push {r4, lr}
|
|
100071b2: f000 f814 bl 100071de <xEventGroupCreate>
|
|
100071b6: 4b01 ldr r3, [pc, #4] @ (100071bc <prvRuntimeInitializer+0xc>)
|
|
100071b8: 6018 str r0, [r3, #0]
|
|
100071ba: bd10 pop {r4, pc}
|
|
100071bc: 20021c7c .word 0x20021c7c
|
|
|
|
100071c0 <prvTestWaitCondition>:
|
|
100071c0: 2a00 cmp r2, #0
|
|
100071c2: d103 bne.n 100071cc <prvTestWaitCondition+0xc>
|
|
100071c4: 4201 tst r1, r0
|
|
100071c6: d106 bne.n 100071d6 <prvTestWaitCondition+0x16>
|
|
100071c8: 0010 movs r0, r2
|
|
100071ca: e003 b.n 100071d4 <prvTestWaitCondition+0x14>
|
|
100071cc: 4008 ands r0, r1
|
|
100071ce: 4288 cmp r0, r1
|
|
100071d0: d003 beq.n 100071da <prvTestWaitCondition+0x1a>
|
|
100071d2: 2000 movs r0, #0
|
|
100071d4: 4770 bx lr
|
|
100071d6: 2001 movs r0, #1
|
|
100071d8: e7fc b.n 100071d4 <prvTestWaitCondition+0x14>
|
|
100071da: 2001 movs r0, #1
|
|
100071dc: e7fa b.n 100071d4 <prvTestWaitCondition+0x14>
|
|
|
|
100071de <xEventGroupCreate>:
|
|
100071de: b510 push {r4, lr}
|
|
100071e0: 201c movs r0, #28
|
|
100071e2: f7ff fc43 bl 10006a6c <pvPortMalloc>
|
|
100071e6: 1e04 subs r4, r0, #0
|
|
100071e8: d003 beq.n 100071f2 <xEventGroupCreate+0x14>
|
|
100071ea: 2300 movs r3, #0
|
|
100071ec: c008 stmia r0!, {r3}
|
|
100071ee: f000 f8ef bl 100073d0 <vListInitialise>
|
|
100071f2: 0020 movs r0, r4
|
|
100071f4: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100071f8 <xEventGroupWaitBits>:
|
|
100071f8: b5f0 push {r4, r5, r6, r7, lr}
|
|
100071fa: 46c6 mov lr, r8
|
|
100071fc: b500 push {lr}
|
|
100071fe: 0006 movs r6, r0
|
|
10007200: 000d movs r5, r1
|
|
10007202: 0017 movs r7, r2
|
|
10007204: 4698 mov r8, r3
|
|
10007206: 2800 cmp r0, #0
|
|
10007208: d02f beq.n 1000726a <xEventGroupWaitBits+0x72>
|
|
1000720a: 2380 movs r3, #128 @ 0x80
|
|
1000720c: 045b lsls r3, r3, #17
|
|
1000720e: 4299 cmp r1, r3
|
|
10007210: d232 bcs.n 10007278 <xEventGroupWaitBits+0x80>
|
|
10007212: 2900 cmp r1, #0
|
|
10007214: d037 beq.n 10007286 <xEventGroupWaitBits+0x8e>
|
|
10007216: f001 fc1d bl 10008a54 <xTaskGetSchedulerState>
|
|
1000721a: 2800 cmp r0, #0
|
|
1000721c: d102 bne.n 10007224 <xEventGroupWaitBits+0x2c>
|
|
1000721e: 9b06 ldr r3, [sp, #24]
|
|
10007220: 2b00 cmp r3, #0
|
|
10007222: d137 bne.n 10007294 <xEventGroupWaitBits+0x9c>
|
|
10007224: f001 f824 bl 10008270 <vTaskSuspendAll>
|
|
10007228: 6834 ldr r4, [r6, #0]
|
|
1000722a: 4642 mov r2, r8
|
|
1000722c: 0029 movs r1, r5
|
|
1000722e: 0020 movs r0, r4
|
|
10007230: f7ff ffc6 bl 100071c0 <prvTestWaitCondition>
|
|
10007234: 2800 cmp r0, #0
|
|
10007236: d034 beq.n 100072a2 <xEventGroupWaitBits+0xaa>
|
|
10007238: 2f00 cmp r7, #0
|
|
1000723a: d048 beq.n 100072ce <xEventGroupWaitBits+0xd6>
|
|
1000723c: 0023 movs r3, r4
|
|
1000723e: 43ab bics r3, r5
|
|
10007240: 6033 str r3, [r6, #0]
|
|
10007242: 2300 movs r3, #0
|
|
10007244: 9306 str r3, [sp, #24]
|
|
10007246: f001 f8e5 bl 10008414 <xTaskResumeAll>
|
|
1000724a: 9b06 ldr r3, [sp, #24]
|
|
1000724c: 2b00 cmp r3, #0
|
|
1000724e: d008 beq.n 10007262 <xEventGroupWaitBits+0x6a>
|
|
10007250: 2800 cmp r0, #0
|
|
10007252: d03f beq.n 100072d4 <xEventGroupWaitBits+0xdc>
|
|
10007254: f001 fd30 bl 10008cb8 <uxTaskResetEventItemValue>
|
|
10007258: 0004 movs r4, r0
|
|
1000725a: 0183 lsls r3, r0, #6
|
|
1000725c: d53d bpl.n 100072da <xEventGroupWaitBits+0xe2>
|
|
1000725e: 0224 lsls r4, r4, #8
|
|
10007260: 0a24 lsrs r4, r4, #8
|
|
10007262: 0020 movs r0, r4
|
|
10007264: bc80 pop {r7}
|
|
10007266: 46b8 mov r8, r7
|
|
10007268: bdf0 pop {r4, r5, r6, r7, pc}
|
|
1000726a: 4b25 ldr r3, [pc, #148] @ (10007300 <xEventGroupWaitBits+0x108>)
|
|
1000726c: 4a25 ldr r2, [pc, #148] @ (10007304 <xEventGroupWaitBits+0x10c>)
|
|
1000726e: 213c movs r1, #60 @ 0x3c
|
|
10007270: 4825 ldr r0, [pc, #148] @ (10007308 <xEventGroupWaitBits+0x110>)
|
|
10007272: 31ff adds r1, #255 @ 0xff
|
|
10007274: f7fb f906 bl 10002484 <__assert_func>
|
|
10007278: 4b24 ldr r3, [pc, #144] @ (1000730c <xEventGroupWaitBits+0x114>)
|
|
1000727a: 4a22 ldr r2, [pc, #136] @ (10007304 <xEventGroupWaitBits+0x10c>)
|
|
1000727c: 219e movs r1, #158 @ 0x9e
|
|
1000727e: 4822 ldr r0, [pc, #136] @ (10007308 <xEventGroupWaitBits+0x110>)
|
|
10007280: 0049 lsls r1, r1, #1
|
|
10007282: f7fb f8ff bl 10002484 <__assert_func>
|
|
10007286: 4b22 ldr r3, [pc, #136] @ (10007310 <xEventGroupWaitBits+0x118>)
|
|
10007288: 4a1e ldr r2, [pc, #120] @ (10007304 <xEventGroupWaitBits+0x10c>)
|
|
1000728a: 213e movs r1, #62 @ 0x3e
|
|
1000728c: 481e ldr r0, [pc, #120] @ (10007308 <xEventGroupWaitBits+0x110>)
|
|
1000728e: 31ff adds r1, #255 @ 0xff
|
|
10007290: f7fb f8f8 bl 10002484 <__assert_func>
|
|
10007294: 4b1f ldr r3, [pc, #124] @ (10007314 <xEventGroupWaitBits+0x11c>)
|
|
10007296: 4a1b ldr r2, [pc, #108] @ (10007304 <xEventGroupWaitBits+0x10c>)
|
|
10007298: 21a0 movs r1, #160 @ 0xa0
|
|
1000729a: 481b ldr r0, [pc, #108] @ (10007308 <xEventGroupWaitBits+0x110>)
|
|
1000729c: 0049 lsls r1, r1, #1
|
|
1000729e: f7fb f8f1 bl 10002484 <__assert_func>
|
|
100072a2: 9b06 ldr r3, [sp, #24]
|
|
100072a4: 2b00 cmp r3, #0
|
|
100072a6: d0ce beq.n 10007246 <xEventGroupWaitBits+0x4e>
|
|
100072a8: 2f00 cmp r7, #0
|
|
100072aa: d10d bne.n 100072c8 <xEventGroupWaitBits+0xd0>
|
|
100072ac: 2100 movs r1, #0
|
|
100072ae: 4643 mov r3, r8
|
|
100072b0: 2b00 cmp r3, #0
|
|
100072b2: d002 beq.n 100072ba <xEventGroupWaitBits+0xc2>
|
|
100072b4: 2380 movs r3, #128 @ 0x80
|
|
100072b6: 04db lsls r3, r3, #19
|
|
100072b8: 4319 orrs r1, r3
|
|
100072ba: 4329 orrs r1, r5
|
|
100072bc: 1d30 adds r0, r6, #4
|
|
100072be: 9a06 ldr r2, [sp, #24]
|
|
100072c0: f001 f9ec bl 1000869c <vTaskPlaceOnUnorderedEventList>
|
|
100072c4: 2400 movs r4, #0
|
|
100072c6: e7be b.n 10007246 <xEventGroupWaitBits+0x4e>
|
|
100072c8: 2180 movs r1, #128 @ 0x80
|
|
100072ca: 0449 lsls r1, r1, #17
|
|
100072cc: e7ef b.n 100072ae <xEventGroupWaitBits+0xb6>
|
|
100072ce: 2300 movs r3, #0
|
|
100072d0: 9306 str r3, [sp, #24]
|
|
100072d2: e7b8 b.n 10007246 <xEventGroupWaitBits+0x4e>
|
|
100072d4: f7ff fd5c bl 10006d90 <vPortYield>
|
|
100072d8: e7bc b.n 10007254 <xEventGroupWaitBits+0x5c>
|
|
100072da: f7ff fd79 bl 10006dd0 <vPortEnterCritical>
|
|
100072de: 6834 ldr r4, [r6, #0]
|
|
100072e0: 4642 mov r2, r8
|
|
100072e2: 0029 movs r1, r5
|
|
100072e4: 0020 movs r0, r4
|
|
100072e6: f7ff ff6b bl 100071c0 <prvTestWaitCondition>
|
|
100072ea: 2800 cmp r0, #0
|
|
100072ec: d004 beq.n 100072f8 <xEventGroupWaitBits+0x100>
|
|
100072ee: 2f00 cmp r7, #0
|
|
100072f0: d002 beq.n 100072f8 <xEventGroupWaitBits+0x100>
|
|
100072f2: 0023 movs r3, r4
|
|
100072f4: 43ab bics r3, r5
|
|
100072f6: 6033 str r3, [r6, #0]
|
|
100072f8: f7ff fd8a bl 10006e10 <vPortExitCritical>
|
|
100072fc: e7af b.n 1000725e <xEventGroupWaitBits+0x66>
|
|
100072fe: 46c0 nop @ (mov r8, r8)
|
|
10007300: 1000aaf8 .word 0x1000aaf8
|
|
10007304: 1000ac08 .word 0x1000ac08
|
|
10007308: 1000ab04 .word 0x1000ab04
|
|
1000730c: 1000ab3c .word 0x1000ab3c
|
|
10007310: 1000ab64 .word 0x1000ab64
|
|
10007314: 1000ab7c .word 0x1000ab7c
|
|
|
|
10007318 <xEventGroupSetBits>:
|
|
10007318: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000731a: 0004 movs r4, r0
|
|
1000731c: 000d movs r5, r1
|
|
1000731e: 2800 cmp r0, #0
|
|
10007320: d00d beq.n 1000733e <xEventGroupSetBits+0x26>
|
|
10007322: 2380 movs r3, #128 @ 0x80
|
|
10007324: 045b lsls r3, r3, #17
|
|
10007326: 4299 cmp r1, r3
|
|
10007328: d20f bcs.n 1000734a <xEventGroupSetBits+0x32>
|
|
1000732a: 0006 movs r6, r0
|
|
1000732c: 360c adds r6, #12
|
|
1000732e: f000 ff9f bl 10008270 <vTaskSuspendAll>
|
|
10007332: 6920 ldr r0, [r4, #16]
|
|
10007334: 6823 ldr r3, [r4, #0]
|
|
10007336: 432b orrs r3, r5
|
|
10007338: 6023 str r3, [r4, #0]
|
|
1000733a: 2700 movs r7, #0
|
|
1000733c: e018 b.n 10007370 <xEventGroupSetBits+0x58>
|
|
1000733e: 4b17 ldr r3, [pc, #92] @ (1000739c <xEventGroupSetBits+0x84>)
|
|
10007340: 4a17 ldr r2, [pc, #92] @ (100073a0 <xEventGroupSetBits+0x88>)
|
|
10007342: 4818 ldr r0, [pc, #96] @ (100073a4 <xEventGroupSetBits+0x8c>)
|
|
10007344: 4918 ldr r1, [pc, #96] @ (100073a8 <xEventGroupSetBits+0x90>)
|
|
10007346: f7fb f89d bl 10002484 <__assert_func>
|
|
1000734a: 4b18 ldr r3, [pc, #96] @ (100073ac <xEventGroupSetBits+0x94>)
|
|
1000734c: 4a14 ldr r2, [pc, #80] @ (100073a0 <xEventGroupSetBits+0x88>)
|
|
1000734e: 2185 movs r1, #133 @ 0x85
|
|
10007350: 4814 ldr r0, [pc, #80] @ (100073a4 <xEventGroupSetBits+0x8c>)
|
|
10007352: 0089 lsls r1, r1, #2
|
|
10007354: f7fb f896 bl 10002484 <__assert_func>
|
|
10007358: 6821 ldr r1, [r4, #0]
|
|
1000735a: 4019 ands r1, r3
|
|
1000735c: 4299 cmp r1, r3
|
|
1000735e: d106 bne.n 1000736e <xEventGroupSetBits+0x56>
|
|
10007360: e011 b.n 10007386 <xEventGroupSetBits+0x6e>
|
|
10007362: 6823 ldr r3, [r4, #0]
|
|
10007364: 2180 movs r1, #128 @ 0x80
|
|
10007366: 0489 lsls r1, r1, #18
|
|
10007368: 4319 orrs r1, r3
|
|
1000736a: f001 fa87 bl 1000887c <vTaskRemoveFromUnorderedEventList>
|
|
1000736e: 0028 movs r0, r5
|
|
10007370: 42b0 cmp r0, r6
|
|
10007372: d00c beq.n 1000738e <xEventGroupSetBits+0x76>
|
|
10007374: 6845 ldr r5, [r0, #4]
|
|
10007376: 6802 ldr r2, [r0, #0]
|
|
10007378: 0213 lsls r3, r2, #8
|
|
1000737a: 0a1b lsrs r3, r3, #8
|
|
1000737c: 0151 lsls r1, r2, #5
|
|
1000737e: d4eb bmi.n 10007358 <xEventGroupSetBits+0x40>
|
|
10007380: 6821 ldr r1, [r4, #0]
|
|
10007382: 420b tst r3, r1
|
|
10007384: d0f3 beq.n 1000736e <xEventGroupSetBits+0x56>
|
|
10007386: 01d2 lsls r2, r2, #7
|
|
10007388: d5eb bpl.n 10007362 <xEventGroupSetBits+0x4a>
|
|
1000738a: 431f orrs r7, r3
|
|
1000738c: e7e9 b.n 10007362 <xEventGroupSetBits+0x4a>
|
|
1000738e: 6823 ldr r3, [r4, #0]
|
|
10007390: 43bb bics r3, r7
|
|
10007392: 6023 str r3, [r4, #0]
|
|
10007394: f001 f83e bl 10008414 <xTaskResumeAll>
|
|
10007398: 6820 ldr r0, [r4, #0]
|
|
1000739a: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
1000739c: 1000aaf8 .word 0x1000aaf8
|
|
100073a0: 1000abf4 .word 0x1000abf4
|
|
100073a4: 1000ab04 .word 0x1000ab04
|
|
100073a8: 00000213 .word 0x00000213
|
|
100073ac: 1000abd0 .word 0x1000abd0
|
|
|
|
100073b0 <vEventGroupSetBitsCallback>:
|
|
100073b0: b510 push {r4, lr}
|
|
100073b2: f7ff ffb1 bl 10007318 <xEventGroupSetBits>
|
|
100073b6: bd10 pop {r4, pc}
|
|
|
|
100073b8 <xEventGroupSetBitsFromISR>:
|
|
100073b8: b510 push {r4, lr}
|
|
100073ba: 0013 movs r3, r2
|
|
100073bc: 4c03 ldr r4, [pc, #12] @ (100073cc <xEventGroupSetBitsFromISR+0x14>)
|
|
100073be: 000a movs r2, r1
|
|
100073c0: 0001 movs r1, r0
|
|
100073c2: 0020 movs r0, r4
|
|
100073c4: f001 fe48 bl 10009058 <xTimerPendFunctionCallFromISR>
|
|
100073c8: bd10 pop {r4, pc}
|
|
100073ca: 46c0 nop @ (mov r8, r8)
|
|
100073cc: 100073b1 .word 0x100073b1
|
|
|
|
100073d0 <vListInitialise>:
|
|
100073d0: 0003 movs r3, r0
|
|
100073d2: 3308 adds r3, #8
|
|
100073d4: 6043 str r3, [r0, #4]
|
|
100073d6: 2201 movs r2, #1
|
|
100073d8: 4252 negs r2, r2
|
|
100073da: 6082 str r2, [r0, #8]
|
|
100073dc: 60c3 str r3, [r0, #12]
|
|
100073de: 6103 str r3, [r0, #16]
|
|
100073e0: 2300 movs r3, #0
|
|
100073e2: 6003 str r3, [r0, #0]
|
|
100073e4: 4770 bx lr
|
|
|
|
100073e6 <vListInitialiseItem>:
|
|
100073e6: 2300 movs r3, #0
|
|
100073e8: 6103 str r3, [r0, #16]
|
|
100073ea: 4770 bx lr
|
|
|
|
100073ec <vListInsert>:
|
|
100073ec: b530 push {r4, r5, lr}
|
|
100073ee: 680d ldr r5, [r1, #0]
|
|
100073f0: 1c6b adds r3, r5, #1
|
|
100073f2: d010 beq.n 10007416 <vListInsert+0x2a>
|
|
100073f4: 0003 movs r3, r0
|
|
100073f6: 3308 adds r3, #8
|
|
100073f8: 001c movs r4, r3
|
|
100073fa: 685b ldr r3, [r3, #4]
|
|
100073fc: 681a ldr r2, [r3, #0]
|
|
100073fe: 42aa cmp r2, r5
|
|
10007400: d9fa bls.n 100073f8 <vListInsert+0xc>
|
|
10007402: 6863 ldr r3, [r4, #4]
|
|
10007404: 604b str r3, [r1, #4]
|
|
10007406: 6099 str r1, [r3, #8]
|
|
10007408: 608c str r4, [r1, #8]
|
|
1000740a: 6061 str r1, [r4, #4]
|
|
1000740c: 6108 str r0, [r1, #16]
|
|
1000740e: 6803 ldr r3, [r0, #0]
|
|
10007410: 3301 adds r3, #1
|
|
10007412: 6003 str r3, [r0, #0]
|
|
10007414: bd30 pop {r4, r5, pc}
|
|
10007416: 6904 ldr r4, [r0, #16]
|
|
10007418: e7f3 b.n 10007402 <vListInsert+0x16>
|
|
|
|
1000741a <uxListRemove>:
|
|
1000741a: 6903 ldr r3, [r0, #16]
|
|
1000741c: 6841 ldr r1, [r0, #4]
|
|
1000741e: 6882 ldr r2, [r0, #8]
|
|
10007420: 608a str r2, [r1, #8]
|
|
10007422: 6841 ldr r1, [r0, #4]
|
|
10007424: 6051 str r1, [r2, #4]
|
|
10007426: 685a ldr r2, [r3, #4]
|
|
10007428: 4282 cmp r2, r0
|
|
1000742a: d006 beq.n 1000743a <uxListRemove+0x20>
|
|
1000742c: 2200 movs r2, #0
|
|
1000742e: 6102 str r2, [r0, #16]
|
|
10007430: 681a ldr r2, [r3, #0]
|
|
10007432: 3a01 subs r2, #1
|
|
10007434: 601a str r2, [r3, #0]
|
|
10007436: 6818 ldr r0, [r3, #0]
|
|
10007438: 4770 bx lr
|
|
1000743a: 6882 ldr r2, [r0, #8]
|
|
1000743c: 605a str r2, [r3, #4]
|
|
1000743e: e7f5 b.n 1000742c <uxListRemove+0x12>
|
|
|
|
10007440 <prvGetDisinheritPriorityAfterTimeout>:
|
|
10007440: 0003 movs r3, r0
|
|
10007442: 6a40 ldr r0, [r0, #36] @ 0x24
|
|
10007444: 2800 cmp r0, #0
|
|
10007446: d003 beq.n 10007450 <prvGetDisinheritPriorityAfterTimeout+0x10>
|
|
10007448: 6b1b ldr r3, [r3, #48] @ 0x30
|
|
1000744a: 681b ldr r3, [r3, #0]
|
|
1000744c: 2020 movs r0, #32
|
|
1000744e: 1ac0 subs r0, r0, r3
|
|
10007450: 4770 bx lr
|
|
|
|
10007452 <prvIsQueueFull>:
|
|
10007452: b510 push {r4, lr}
|
|
10007454: 0004 movs r4, r0
|
|
10007456: f7ff fcbb bl 10006dd0 <vPortEnterCritical>
|
|
1000745a: 6ba2 ldr r2, [r4, #56] @ 0x38
|
|
1000745c: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
1000745e: 429a cmp r2, r3
|
|
10007460: d004 beq.n 1000746c <prvIsQueueFull+0x1a>
|
|
10007462: 2400 movs r4, #0
|
|
10007464: f7ff fcd4 bl 10006e10 <vPortExitCritical>
|
|
10007468: 0020 movs r0, r4
|
|
1000746a: bd10 pop {r4, pc}
|
|
1000746c: 2401 movs r4, #1
|
|
1000746e: e7f9 b.n 10007464 <prvIsQueueFull+0x12>
|
|
|
|
10007470 <prvIsQueueEmpty>:
|
|
10007470: b510 push {r4, lr}
|
|
10007472: 0004 movs r4, r0
|
|
10007474: f7ff fcac bl 10006dd0 <vPortEnterCritical>
|
|
10007478: 6ba3 ldr r3, [r4, #56] @ 0x38
|
|
1000747a: 2b00 cmp r3, #0
|
|
1000747c: d104 bne.n 10007488 <prvIsQueueEmpty+0x18>
|
|
1000747e: 2401 movs r4, #1
|
|
10007480: f7ff fcc6 bl 10006e10 <vPortExitCritical>
|
|
10007484: 0020 movs r0, r4
|
|
10007486: bd10 pop {r4, pc}
|
|
10007488: 2400 movs r4, #0
|
|
1000748a: e7f9 b.n 10007480 <prvIsQueueEmpty+0x10>
|
|
|
|
1000748c <prvCopyDataToQueue>:
|
|
1000748c: b570 push {r4, r5, r6, lr}
|
|
1000748e: 0004 movs r4, r0
|
|
10007490: 0015 movs r5, r2
|
|
10007492: 6b86 ldr r6, [r0, #56] @ 0x38
|
|
10007494: 6c02 ldr r2, [r0, #64] @ 0x40
|
|
10007496: 2a00 cmp r2, #0
|
|
10007498: d10c bne.n 100074b4 <prvCopyDataToQueue+0x28>
|
|
1000749a: 6803 ldr r3, [r0, #0]
|
|
1000749c: 2b00 cmp r3, #0
|
|
1000749e: d003 beq.n 100074a8 <prvCopyDataToQueue+0x1c>
|
|
100074a0: 2000 movs r0, #0
|
|
100074a2: 3601 adds r6, #1
|
|
100074a4: 63a6 str r6, [r4, #56] @ 0x38
|
|
100074a6: bd70 pop {r4, r5, r6, pc}
|
|
100074a8: 6880 ldr r0, [r0, #8]
|
|
100074aa: f001 fb3f bl 10008b2c <xTaskPriorityDisinherit>
|
|
100074ae: 2300 movs r3, #0
|
|
100074b0: 60a3 str r3, [r4, #8]
|
|
100074b2: e7f6 b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
100074b4: 2d00 cmp r5, #0
|
|
100074b6: d10d bne.n 100074d4 <prvCopyDataToQueue+0x48>
|
|
100074b8: 6840 ldr r0, [r0, #4]
|
|
100074ba: f7fc fe2f bl 1000411c <__wrap___aeabi_memcpy>
|
|
100074be: 6863 ldr r3, [r4, #4]
|
|
100074c0: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
100074c2: 189b adds r3, r3, r2
|
|
100074c4: 6063 str r3, [r4, #4]
|
|
100074c6: 68a2 ldr r2, [r4, #8]
|
|
100074c8: 4293 cmp r3, r2
|
|
100074ca: d31a bcc.n 10007502 <prvCopyDataToQueue+0x76>
|
|
100074cc: 6823 ldr r3, [r4, #0]
|
|
100074ce: 6063 str r3, [r4, #4]
|
|
100074d0: 0028 movs r0, r5
|
|
100074d2: e7e6 b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
100074d4: 68c0 ldr r0, [r0, #12]
|
|
100074d6: f7fc fe21 bl 1000411c <__wrap___aeabi_memcpy>
|
|
100074da: 68e3 ldr r3, [r4, #12]
|
|
100074dc: 6c22 ldr r2, [r4, #64] @ 0x40
|
|
100074de: 4251 negs r1, r2
|
|
100074e0: 1a9b subs r3, r3, r2
|
|
100074e2: 60e3 str r3, [r4, #12]
|
|
100074e4: 6822 ldr r2, [r4, #0]
|
|
100074e6: 4293 cmp r3, r2
|
|
100074e8: d202 bcs.n 100074f0 <prvCopyDataToQueue+0x64>
|
|
100074ea: 68a3 ldr r3, [r4, #8]
|
|
100074ec: 185b adds r3, r3, r1
|
|
100074ee: 60e3 str r3, [r4, #12]
|
|
100074f0: 2d02 cmp r5, #2
|
|
100074f2: d001 beq.n 100074f8 <prvCopyDataToQueue+0x6c>
|
|
100074f4: 2000 movs r0, #0
|
|
100074f6: e7d4 b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
100074f8: 2e00 cmp r6, #0
|
|
100074fa: d004 beq.n 10007506 <prvCopyDataToQueue+0x7a>
|
|
100074fc: 3e01 subs r6, #1
|
|
100074fe: 2000 movs r0, #0
|
|
10007500: e7cf b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
10007502: 0028 movs r0, r5
|
|
10007504: e7cd b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
10007506: 2000 movs r0, #0
|
|
10007508: e7cb b.n 100074a2 <prvCopyDataToQueue+0x16>
|
|
|
|
1000750a <prvCopyDataFromQueue>:
|
|
1000750a: b510 push {r4, lr}
|
|
1000750c: 0003 movs r3, r0
|
|
1000750e: 0008 movs r0, r1
|
|
10007510: 6c1a ldr r2, [r3, #64] @ 0x40
|
|
10007512: 2a00 cmp r2, #0
|
|
10007514: d00a beq.n 1000752c <prvCopyDataFromQueue+0x22>
|
|
10007516: 68dc ldr r4, [r3, #12]
|
|
10007518: 18a4 adds r4, r4, r2
|
|
1000751a: 60dc str r4, [r3, #12]
|
|
1000751c: 6899 ldr r1, [r3, #8]
|
|
1000751e: 428c cmp r4, r1
|
|
10007520: d301 bcc.n 10007526 <prvCopyDataFromQueue+0x1c>
|
|
10007522: 6819 ldr r1, [r3, #0]
|
|
10007524: 60d9 str r1, [r3, #12]
|
|
10007526: 68d9 ldr r1, [r3, #12]
|
|
10007528: f7fc fdf8 bl 1000411c <__wrap___aeabi_memcpy>
|
|
1000752c: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10007530 <prvNotifyQueueSetContainer>:
|
|
10007530: b570 push {r4, r5, r6, lr}
|
|
10007532: b082 sub sp, #8
|
|
10007534: 9001 str r0, [sp, #4]
|
|
10007536: 6c84 ldr r4, [r0, #72] @ 0x48
|
|
10007538: 2c00 cmp r4, #0
|
|
1000753a: d00a beq.n 10007552 <prvNotifyQueueSetContainer+0x22>
|
|
1000753c: 6ba2 ldr r2, [r4, #56] @ 0x38
|
|
1000753e: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
10007540: 429a cmp r2, r3
|
|
10007542: d20d bcs.n 10007560 <prvNotifyQueueSetContainer+0x30>
|
|
10007544: 6ba2 ldr r2, [r4, #56] @ 0x38
|
|
10007546: 4293 cmp r3, r2
|
|
10007548: d810 bhi.n 1000756c <prvNotifyQueueSetContainer+0x3c>
|
|
1000754a: 2500 movs r5, #0
|
|
1000754c: 0028 movs r0, r5
|
|
1000754e: b002 add sp, #8
|
|
10007550: bd70 pop {r4, r5, r6, pc}
|
|
10007552: 4b1a ldr r3, [pc, #104] @ (100075bc <prvNotifyQueueSetContainer+0x8c>)
|
|
10007554: 4a1a ldr r2, [pc, #104] @ (100075c0 <prvNotifyQueueSetContainer+0x90>)
|
|
10007556: 21c2 movs r1, #194 @ 0xc2
|
|
10007558: 481a ldr r0, [pc, #104] @ (100075c4 <prvNotifyQueueSetContainer+0x94>)
|
|
1000755a: 0109 lsls r1, r1, #4
|
|
1000755c: f7fa ff92 bl 10002484 <__assert_func>
|
|
10007560: 4b19 ldr r3, [pc, #100] @ (100075c8 <prvNotifyQueueSetContainer+0x98>)
|
|
10007562: 4a17 ldr r2, [pc, #92] @ (100075c0 <prvNotifyQueueSetContainer+0x90>)
|
|
10007564: 4817 ldr r0, [pc, #92] @ (100075c4 <prvNotifyQueueSetContainer+0x94>)
|
|
10007566: 4919 ldr r1, [pc, #100] @ (100075cc <prvNotifyQueueSetContainer+0x9c>)
|
|
10007568: f7fa ff8c bl 10002484 <__assert_func>
|
|
1000756c: 2345 movs r3, #69 @ 0x45
|
|
1000756e: 5ce6 ldrb r6, [r4, r3]
|
|
10007570: b276 sxtb r6, r6
|
|
10007572: 2200 movs r2, #0
|
|
10007574: a901 add r1, sp, #4
|
|
10007576: 0020 movs r0, r4
|
|
10007578: f7ff ff88 bl 1000748c <prvCopyDataToQueue>
|
|
1000757c: 0005 movs r5, r0
|
|
1000757e: 1c73 adds r3, r6, #1
|
|
10007580: d10a bne.n 10007598 <prvNotifyQueueSetContainer+0x68>
|
|
10007582: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
10007584: 2b00 cmp r3, #0
|
|
10007586: d0e1 beq.n 1000754c <prvNotifyQueueSetContainer+0x1c>
|
|
10007588: 0020 movs r0, r4
|
|
1000758a: 3024 adds r0, #36 @ 0x24
|
|
1000758c: f001 f8f6 bl 1000877c <xTaskRemoveFromEventList>
|
|
10007590: 2800 cmp r0, #0
|
|
10007592: d0db beq.n 1000754c <prvNotifyQueueSetContainer+0x1c>
|
|
10007594: 2501 movs r5, #1
|
|
10007596: e7d9 b.n 1000754c <prvNotifyQueueSetContainer+0x1c>
|
|
10007598: f000 fe78 bl 1000828c <uxTaskGetNumberOfTasks>
|
|
1000759c: 4286 cmp r6, r0
|
|
1000759e: d2d5 bcs.n 1000754c <prvNotifyQueueSetContainer+0x1c>
|
|
100075a0: 2e7f cmp r6, #127 @ 0x7f
|
|
100075a2: d004 beq.n 100075ae <prvNotifyQueueSetContainer+0x7e>
|
|
100075a4: 3601 adds r6, #1
|
|
100075a6: b276 sxtb r6, r6
|
|
100075a8: 2345 movs r3, #69 @ 0x45
|
|
100075aa: 54e6 strb r6, [r4, r3]
|
|
100075ac: e7ce b.n 1000754c <prvNotifyQueueSetContainer+0x1c>
|
|
100075ae: 4b08 ldr r3, [pc, #32] @ (100075d0 <prvNotifyQueueSetContainer+0xa0>)
|
|
100075b0: 4a03 ldr r2, [pc, #12] @ (100075c0 <prvNotifyQueueSetContainer+0x90>)
|
|
100075b2: 4804 ldr r0, [pc, #16] @ (100075c4 <prvNotifyQueueSetContainer+0x94>)
|
|
100075b4: 4907 ldr r1, [pc, #28] @ (100075d4 <prvNotifyQueueSetContainer+0xa4>)
|
|
100075b6: f7fa ff65 bl 10002484 <__assert_func>
|
|
100075ba: 46c0 nop @ (mov r8, r8)
|
|
100075bc: 1000ac1c .word 0x1000ac1c
|
|
100075c0: 1000aef0 .word 0x1000aef0
|
|
100075c4: 1000ac30 .word 0x1000ac30
|
|
100075c8: 1000ac60 .word 0x1000ac60
|
|
100075cc: 00000c21 .word 0x00000c21
|
|
100075d0: 1000aca8 .word 0x1000aca8
|
|
100075d4: 00000c41 .word 0x00000c41
|
|
|
|
100075d8 <prvUnlockQueue>:
|
|
100075d8: b570 push {r4, r5, r6, lr}
|
|
100075da: 0005 movs r5, r0
|
|
100075dc: f7ff fbf8 bl 10006dd0 <vPortEnterCritical>
|
|
100075e0: 2345 movs r3, #69 @ 0x45
|
|
100075e2: 5cec ldrb r4, [r5, r3]
|
|
100075e4: b264 sxtb r4, r4
|
|
100075e6: e00a b.n 100075fe <prvUnlockQueue+0x26>
|
|
100075e8: 6a6b ldr r3, [r5, #36] @ 0x24
|
|
100075ea: 2b00 cmp r3, #0
|
|
100075ec: d017 beq.n 1000761e <prvUnlockQueue+0x46>
|
|
100075ee: 0028 movs r0, r5
|
|
100075f0: 3024 adds r0, #36 @ 0x24
|
|
100075f2: f001 f8c3 bl 1000877c <xTaskRemoveFromEventList>
|
|
100075f6: 2800 cmp r0, #0
|
|
100075f8: d10e bne.n 10007618 <prvUnlockQueue+0x40>
|
|
100075fa: 3c01 subs r4, #1
|
|
100075fc: b264 sxtb r4, r4
|
|
100075fe: 2c00 cmp r4, #0
|
|
10007600: dd0d ble.n 1000761e <prvUnlockQueue+0x46>
|
|
10007602: 6cab ldr r3, [r5, #72] @ 0x48
|
|
10007604: 2b00 cmp r3, #0
|
|
10007606: d0ef beq.n 100075e8 <prvUnlockQueue+0x10>
|
|
10007608: 0028 movs r0, r5
|
|
1000760a: f7ff ff91 bl 10007530 <prvNotifyQueueSetContainer>
|
|
1000760e: 2800 cmp r0, #0
|
|
10007610: d0f3 beq.n 100075fa <prvUnlockQueue+0x22>
|
|
10007612: f001 fa13 bl 10008a3c <vTaskMissedYield>
|
|
10007616: e7f0 b.n 100075fa <prvUnlockQueue+0x22>
|
|
10007618: f001 fa10 bl 10008a3c <vTaskMissedYield>
|
|
1000761c: e7ed b.n 100075fa <prvUnlockQueue+0x22>
|
|
1000761e: 2345 movs r3, #69 @ 0x45
|
|
10007620: 22ff movs r2, #255 @ 0xff
|
|
10007622: 54ea strb r2, [r5, r3]
|
|
10007624: f7ff fbf4 bl 10006e10 <vPortExitCritical>
|
|
10007628: f7ff fbd2 bl 10006dd0 <vPortEnterCritical>
|
|
1000762c: 2344 movs r3, #68 @ 0x44
|
|
1000762e: 5cec ldrb r4, [r5, r3]
|
|
10007630: b264 sxtb r4, r4
|
|
10007632: e001 b.n 10007638 <prvUnlockQueue+0x60>
|
|
10007634: 3c01 subs r4, #1
|
|
10007636: b264 sxtb r4, r4
|
|
10007638: 2c00 cmp r4, #0
|
|
1000763a: dd0b ble.n 10007654 <prvUnlockQueue+0x7c>
|
|
1000763c: 692b ldr r3, [r5, #16]
|
|
1000763e: 2b00 cmp r3, #0
|
|
10007640: d008 beq.n 10007654 <prvUnlockQueue+0x7c>
|
|
10007642: 0028 movs r0, r5
|
|
10007644: 3010 adds r0, #16
|
|
10007646: f001 f899 bl 1000877c <xTaskRemoveFromEventList>
|
|
1000764a: 2800 cmp r0, #0
|
|
1000764c: d0f2 beq.n 10007634 <prvUnlockQueue+0x5c>
|
|
1000764e: f001 f9f5 bl 10008a3c <vTaskMissedYield>
|
|
10007652: e7ef b.n 10007634 <prvUnlockQueue+0x5c>
|
|
10007654: 2344 movs r3, #68 @ 0x44
|
|
10007656: 22ff movs r2, #255 @ 0xff
|
|
10007658: 54ea strb r2, [r5, r3]
|
|
1000765a: f7ff fbd9 bl 10006e10 <vPortExitCritical>
|
|
1000765e: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10007660 <xQueueGenericReset>:
|
|
10007660: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10007662: 0004 movs r4, r0
|
|
10007664: 000d movs r5, r1
|
|
10007666: 2800 cmp r0, #0
|
|
10007668: d02b beq.n 100076c2 <xQueueGenericReset+0x62>
|
|
1000766a: 6bc3 ldr r3, [r0, #60] @ 0x3c
|
|
1000766c: 2b00 cmp r3, #0
|
|
1000766e: d054 beq.n 1000771a <xQueueGenericReset+0xba>
|
|
10007670: 6c02 ldr r2, [r0, #64] @ 0x40
|
|
10007672: 2600 movs r6, #0
|
|
10007674: 0c19 lsrs r1, r3, #16
|
|
10007676: 0c10 lsrs r0, r2, #16
|
|
10007678: 2900 cmp r1, #0
|
|
1000767a: d137 bne.n 100076ec <xQueueGenericReset+0x8c>
|
|
1000767c: b281 uxth r1, r0
|
|
1000767e: 2900 cmp r1, #0
|
|
10007680: d126 bne.n 100076d0 <xQueueGenericReset+0x70>
|
|
10007682: 2e00 cmp r6, #0
|
|
10007684: d149 bne.n 1000771a <xQueueGenericReset+0xba>
|
|
10007686: f7ff fba3 bl 10006dd0 <vPortEnterCritical>
|
|
1000768a: 6822 ldr r2, [r4, #0]
|
|
1000768c: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
1000768e: 6c20 ldr r0, [r4, #64] @ 0x40
|
|
10007690: 0001 movs r1, r0
|
|
10007692: 4359 muls r1, r3
|
|
10007694: 1851 adds r1, r2, r1
|
|
10007696: 60a1 str r1, [r4, #8]
|
|
10007698: 2100 movs r1, #0
|
|
1000769a: 63a1 str r1, [r4, #56] @ 0x38
|
|
1000769c: 6062 str r2, [r4, #4]
|
|
1000769e: 3b01 subs r3, #1
|
|
100076a0: 4343 muls r3, r0
|
|
100076a2: 18d2 adds r2, r2, r3
|
|
100076a4: 60e2 str r2, [r4, #12]
|
|
100076a6: 23ff movs r3, #255 @ 0xff
|
|
100076a8: 2244 movs r2, #68 @ 0x44
|
|
100076aa: 54a3 strb r3, [r4, r2]
|
|
100076ac: 3201 adds r2, #1
|
|
100076ae: 54a3 strb r3, [r4, r2]
|
|
100076b0: 2d00 cmp r5, #0
|
|
100076b2: d129 bne.n 10007708 <xQueueGenericReset+0xa8>
|
|
100076b4: 6923 ldr r3, [r4, #16]
|
|
100076b6: 2b00 cmp r3, #0
|
|
100076b8: d11d bne.n 100076f6 <xQueueGenericReset+0x96>
|
|
100076ba: f7ff fba9 bl 10006e10 <vPortExitCritical>
|
|
100076be: 2001 movs r0, #1
|
|
100076c0: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100076c2: 4b19 ldr r3, [pc, #100] @ (10007728 <xQueueGenericReset+0xc8>)
|
|
100076c4: 4a19 ldr r2, [pc, #100] @ (1000772c <xQueueGenericReset+0xcc>)
|
|
100076c6: 2197 movs r1, #151 @ 0x97
|
|
100076c8: 4819 ldr r0, [pc, #100] @ (10007730 <xQueueGenericReset+0xd0>)
|
|
100076ca: 0049 lsls r1, r1, #1
|
|
100076cc: f7fa feda bl 10002484 <__assert_func>
|
|
100076d0: 1c01 adds r1, r0, #0
|
|
100076d2: 1c18 adds r0, r3, #0
|
|
100076d4: b29b uxth r3, r3
|
|
100076d6: b292 uxth r2, r2
|
|
100076d8: 435a muls r2, r3
|
|
100076da: b280 uxth r0, r0
|
|
100076dc: b289 uxth r1, r1
|
|
100076de: 4341 muls r1, r0
|
|
100076e0: 0c12 lsrs r2, r2, #16
|
|
100076e2: 1889 adds r1, r1, r2
|
|
100076e4: 0c09 lsrs r1, r1, #16
|
|
100076e6: d0cc beq.n 10007682 <xQueueGenericReset+0x22>
|
|
100076e8: 2601 movs r6, #1
|
|
100076ea: e7ca b.n 10007682 <xQueueGenericReset+0x22>
|
|
100076ec: b280 uxth r0, r0
|
|
100076ee: 2800 cmp r0, #0
|
|
100076f0: d1fa bne.n 100076e8 <xQueueGenericReset+0x88>
|
|
100076f2: 1c10 adds r0, r2, #0
|
|
100076f4: e7ee b.n 100076d4 <xQueueGenericReset+0x74>
|
|
100076f6: 0020 movs r0, r4
|
|
100076f8: 3010 adds r0, #16
|
|
100076fa: f001 f83f bl 1000877c <xTaskRemoveFromEventList>
|
|
100076fe: 2800 cmp r0, #0
|
|
10007700: d0db beq.n 100076ba <xQueueGenericReset+0x5a>
|
|
10007702: f7ff fb45 bl 10006d90 <vPortYield>
|
|
10007706: e7d8 b.n 100076ba <xQueueGenericReset+0x5a>
|
|
10007708: 0020 movs r0, r4
|
|
1000770a: 3010 adds r0, #16
|
|
1000770c: f7ff fe60 bl 100073d0 <vListInitialise>
|
|
10007710: 0020 movs r0, r4
|
|
10007712: 3024 adds r0, #36 @ 0x24
|
|
10007714: f7ff fe5c bl 100073d0 <vListInitialise>
|
|
10007718: e7cf b.n 100076ba <xQueueGenericReset+0x5a>
|
|
1000771a: 4b06 ldr r3, [pc, #24] @ (10007734 <xQueueGenericReset+0xd4>)
|
|
1000771c: 4a03 ldr r2, [pc, #12] @ (1000772c <xQueueGenericReset+0xcc>)
|
|
1000771e: 2164 movs r1, #100 @ 0x64
|
|
10007720: 4803 ldr r0, [pc, #12] @ (10007730 <xQueueGenericReset+0xd0>)
|
|
10007722: 31ff adds r1, #255 @ 0xff
|
|
10007724: f7fa feae bl 10002484 <__assert_func>
|
|
10007728: 1000accc .word 0x1000accc
|
|
1000772c: 1000af34 .word 0x1000af34
|
|
10007730: 1000ac30 .word 0x1000ac30
|
|
10007734: 1000acd4 .word 0x1000acd4
|
|
|
|
10007738 <prvInitialiseNewQueue>:
|
|
10007738: b570 push {r4, r5, r6, lr}
|
|
1000773a: 001d movs r5, r3
|
|
1000773c: 9c04 ldr r4, [sp, #16]
|
|
1000773e: 2900 cmp r1, #0
|
|
10007740: d10b bne.n 1000775a <prvInitialiseNewQueue+0x22>
|
|
10007742: 6024 str r4, [r4, #0]
|
|
10007744: 63e0 str r0, [r4, #60] @ 0x3c
|
|
10007746: 6421 str r1, [r4, #64] @ 0x40
|
|
10007748: 2101 movs r1, #1
|
|
1000774a: 0020 movs r0, r4
|
|
1000774c: f7ff ff88 bl 10007660 <xQueueGenericReset>
|
|
10007750: 2350 movs r3, #80 @ 0x50
|
|
10007752: 54e5 strb r5, [r4, r3]
|
|
10007754: 2300 movs r3, #0
|
|
10007756: 64a3 str r3, [r4, #72] @ 0x48
|
|
10007758: bd70 pop {r4, r5, r6, pc}
|
|
1000775a: 6022 str r2, [r4, #0]
|
|
1000775c: e7f2 b.n 10007744 <prvInitialiseNewQueue+0xc>
|
|
...
|
|
|
|
10007760 <xQueueGenericCreate>:
|
|
10007760: b5f0 push {r4, r5, r6, r7, lr}
|
|
10007762: b083 sub sp, #12
|
|
10007764: 0004 movs r4, r0
|
|
10007766: 000f movs r7, r1
|
|
10007768: 0016 movs r6, r2
|
|
1000776a: 2800 cmp r0, #0
|
|
1000776c: d031 beq.n 100077d2 <xQueueGenericCreate+0x72>
|
|
1000776e: 2100 movs r1, #0
|
|
10007770: 0c03 lsrs r3, r0, #16
|
|
10007772: 0c3a lsrs r2, r7, #16
|
|
10007774: 2b00 cmp r3, #0
|
|
10007776: d127 bne.n 100077c8 <xQueueGenericCreate+0x68>
|
|
10007778: b293 uxth r3, r2
|
|
1000777a: 2b00 cmp r3, #0
|
|
1000777c: d116 bne.n 100077ac <xQueueGenericCreate+0x4c>
|
|
1000777e: 2900 cmp r1, #0
|
|
10007780: d127 bne.n 100077d2 <xQueueGenericCreate+0x72>
|
|
10007782: 0038 movs r0, r7
|
|
10007784: 4360 muls r0, r4
|
|
10007786: 0003 movs r3, r0
|
|
10007788: 3355 adds r3, #85 @ 0x55
|
|
1000778a: d822 bhi.n 100077d2 <xQueueGenericCreate+0x72>
|
|
1000778c: 3054 adds r0, #84 @ 0x54
|
|
1000778e: f7ff f96d bl 10006a6c <pvPortMalloc>
|
|
10007792: 1e05 subs r5, r0, #0
|
|
10007794: d007 beq.n 100077a6 <xQueueGenericCreate+0x46>
|
|
10007796: 0002 movs r2, r0
|
|
10007798: 3254 adds r2, #84 @ 0x54
|
|
1000779a: 9000 str r0, [sp, #0]
|
|
1000779c: 0033 movs r3, r6
|
|
1000779e: 0039 movs r1, r7
|
|
100077a0: 0020 movs r0, r4
|
|
100077a2: f7ff ffc9 bl 10007738 <prvInitialiseNewQueue>
|
|
100077a6: 0028 movs r0, r5
|
|
100077a8: b003 add sp, #12
|
|
100077aa: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100077ac: 1c13 adds r3, r2, #0
|
|
100077ae: 1c20 adds r0, r4, #0
|
|
100077b0: b2a5 uxth r5, r4
|
|
100077b2: b2ba uxth r2, r7
|
|
100077b4: 436a muls r2, r5
|
|
100077b6: b280 uxth r0, r0
|
|
100077b8: b29b uxth r3, r3
|
|
100077ba: 4343 muls r3, r0
|
|
100077bc: 0c12 lsrs r2, r2, #16
|
|
100077be: 189b adds r3, r3, r2
|
|
100077c0: 0c1b lsrs r3, r3, #16
|
|
100077c2: d0dc beq.n 1000777e <xQueueGenericCreate+0x1e>
|
|
100077c4: 2101 movs r1, #1
|
|
100077c6: e7da b.n 1000777e <xQueueGenericCreate+0x1e>
|
|
100077c8: b292 uxth r2, r2
|
|
100077ca: 2a00 cmp r2, #0
|
|
100077cc: d1fa bne.n 100077c4 <xQueueGenericCreate+0x64>
|
|
100077ce: 1c38 adds r0, r7, #0
|
|
100077d0: e7ee b.n 100077b0 <xQueueGenericCreate+0x50>
|
|
100077d2: 4b03 ldr r3, [pc, #12] @ (100077e0 <xQueueGenericCreate+0x80>)
|
|
100077d4: 4a03 ldr r2, [pc, #12] @ (100077e4 <xQueueGenericCreate+0x84>)
|
|
100077d6: 4804 ldr r0, [pc, #16] @ (100077e8 <xQueueGenericCreate+0x88>)
|
|
100077d8: 4904 ldr r1, [pc, #16] @ (100077ec <xQueueGenericCreate+0x8c>)
|
|
100077da: f7fa fe53 bl 10002484 <__assert_func>
|
|
100077de: 46c0 nop @ (mov r8, r8)
|
|
100077e0: 1000acf8 .word 0x1000acf8
|
|
100077e4: 1000af20 .word 0x1000af20
|
|
100077e8: 1000ac30 .word 0x1000ac30
|
|
100077ec: 00000215 .word 0x00000215
|
|
|
|
100077f0 <xQueueGenericSend>:
|
|
100077f0: b5f0 push {r4, r5, r6, r7, lr}
|
|
100077f2: b085 sub sp, #20
|
|
100077f4: 0004 movs r4, r0
|
|
100077f6: 000f movs r7, r1
|
|
100077f8: 9201 str r2, [sp, #4]
|
|
100077fa: 001e movs r6, r3
|
|
100077fc: 2800 cmp r0, #0
|
|
100077fe: d013 beq.n 10007828 <xQueueGenericSend+0x38>
|
|
10007800: 2900 cmp r1, #0
|
|
10007802: d017 beq.n 10007834 <xQueueGenericSend+0x44>
|
|
10007804: 2e02 cmp r6, #2
|
|
10007806: d102 bne.n 1000780e <xQueueGenericSend+0x1e>
|
|
10007808: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
1000780a: 2b01 cmp r3, #1
|
|
1000780c: d11b bne.n 10007846 <xQueueGenericSend+0x56>
|
|
1000780e: f001 f921 bl 10008a54 <xTaskGetSchedulerState>
|
|
10007812: 1e05 subs r5, r0, #0
|
|
10007814: d11d bne.n 10007852 <xQueueGenericSend+0x62>
|
|
10007816: 9b01 ldr r3, [sp, #4]
|
|
10007818: 2b00 cmp r3, #0
|
|
1000781a: d05b beq.n 100078d4 <xQueueGenericSend+0xe4>
|
|
1000781c: 4b4d ldr r3, [pc, #308] @ (10007954 <xQueueGenericSend+0x164>)
|
|
1000781e: 4a4e ldr r2, [pc, #312] @ (10007958 <xQueueGenericSend+0x168>)
|
|
10007820: 484e ldr r0, [pc, #312] @ (1000795c <xQueueGenericSend+0x16c>)
|
|
10007822: 494f ldr r1, [pc, #316] @ (10007960 <xQueueGenericSend+0x170>)
|
|
10007824: f7fa fe2e bl 10002484 <__assert_func>
|
|
10007828: 4b4e ldr r3, [pc, #312] @ (10007964 <xQueueGenericSend+0x174>)
|
|
1000782a: 4a4b ldr r2, [pc, #300] @ (10007958 <xQueueGenericSend+0x168>)
|
|
1000782c: 484b ldr r0, [pc, #300] @ (1000795c <xQueueGenericSend+0x16c>)
|
|
1000782e: 494e ldr r1, [pc, #312] @ (10007968 <xQueueGenericSend+0x178>)
|
|
10007830: f7fa fe28 bl 10002484 <__assert_func>
|
|
10007834: 6c03 ldr r3, [r0, #64] @ 0x40
|
|
10007836: 2b00 cmp r3, #0
|
|
10007838: d0e4 beq.n 10007804 <xQueueGenericSend+0x14>
|
|
1000783a: 4b4c ldr r3, [pc, #304] @ (1000796c <xQueueGenericSend+0x17c>)
|
|
1000783c: 4a46 ldr r2, [pc, #280] @ (10007958 <xQueueGenericSend+0x168>)
|
|
1000783e: 4847 ldr r0, [pc, #284] @ (1000795c <xQueueGenericSend+0x16c>)
|
|
10007840: 494b ldr r1, [pc, #300] @ (10007970 <xQueueGenericSend+0x180>)
|
|
10007842: f7fa fe1f bl 10002484 <__assert_func>
|
|
10007846: 4b4b ldr r3, [pc, #300] @ (10007974 <xQueueGenericSend+0x184>)
|
|
10007848: 4a43 ldr r2, [pc, #268] @ (10007958 <xQueueGenericSend+0x168>)
|
|
1000784a: 4844 ldr r0, [pc, #272] @ (1000795c <xQueueGenericSend+0x16c>)
|
|
1000784c: 494a ldr r1, [pc, #296] @ (10007978 <xQueueGenericSend+0x188>)
|
|
1000784e: f7fa fe19 bl 10002484 <__assert_func>
|
|
10007852: 2500 movs r5, #0
|
|
10007854: e03e b.n 100078d4 <xQueueGenericSend+0xe4>
|
|
10007856: 6ba5 ldr r5, [r4, #56] @ 0x38
|
|
10007858: 0032 movs r2, r6
|
|
1000785a: 0039 movs r1, r7
|
|
1000785c: 0020 movs r0, r4
|
|
1000785e: f7ff fe15 bl 1000748c <prvCopyDataToQueue>
|
|
10007862: 6ca3 ldr r3, [r4, #72] @ 0x48
|
|
10007864: 2b00 cmp r3, #0
|
|
10007866: d010 beq.n 1000788a <xQueueGenericSend+0x9a>
|
|
10007868: 2e02 cmp r6, #2
|
|
1000786a: d101 bne.n 10007870 <xQueueGenericSend+0x80>
|
|
1000786c: 2d00 cmp r5, #0
|
|
1000786e: d104 bne.n 1000787a <xQueueGenericSend+0x8a>
|
|
10007870: 0020 movs r0, r4
|
|
10007872: f7ff fe5d bl 10007530 <prvNotifyQueueSetContainer>
|
|
10007876: 2800 cmp r0, #0
|
|
10007878: d104 bne.n 10007884 <xQueueGenericSend+0x94>
|
|
1000787a: f7ff fac9 bl 10006e10 <vPortExitCritical>
|
|
1000787e: 2001 movs r0, #1
|
|
10007880: b005 add sp, #20
|
|
10007882: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10007884: f7ff fa84 bl 10006d90 <vPortYield>
|
|
10007888: e7f7 b.n 1000787a <xQueueGenericSend+0x8a>
|
|
1000788a: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
1000788c: 2b00 cmp r3, #0
|
|
1000788e: d104 bne.n 1000789a <xQueueGenericSend+0xaa>
|
|
10007890: 2800 cmp r0, #0
|
|
10007892: d0f2 beq.n 1000787a <xQueueGenericSend+0x8a>
|
|
10007894: f7ff fa7c bl 10006d90 <vPortYield>
|
|
10007898: e7ef b.n 1000787a <xQueueGenericSend+0x8a>
|
|
1000789a: 0020 movs r0, r4
|
|
1000789c: 3024 adds r0, #36 @ 0x24
|
|
1000789e: f000 ff6d bl 1000877c <xTaskRemoveFromEventList>
|
|
100078a2: 2800 cmp r0, #0
|
|
100078a4: d0e9 beq.n 1000787a <xQueueGenericSend+0x8a>
|
|
100078a6: f7ff fa73 bl 10006d90 <vPortYield>
|
|
100078aa: e7e6 b.n 1000787a <xQueueGenericSend+0x8a>
|
|
100078ac: f7ff fab0 bl 10006e10 <vPortExitCritical>
|
|
100078b0: 2000 movs r0, #0
|
|
100078b2: e7e5 b.n 10007880 <xQueueGenericSend+0x90>
|
|
100078b4: a802 add r0, sp, #8
|
|
100078b6: f001 f85b bl 10008970 <vTaskInternalSetTimeOutState>
|
|
100078ba: 3501 adds r5, #1
|
|
100078bc: e017 b.n 100078ee <xQueueGenericSend+0xfe>
|
|
100078be: 2200 movs r2, #0
|
|
100078c0: 54e2 strb r2, [r4, r3]
|
|
100078c2: e01f b.n 10007904 <xQueueGenericSend+0x114>
|
|
100078c4: 2200 movs r2, #0
|
|
100078c6: 54e2 strb r2, [r4, r3]
|
|
100078c8: e021 b.n 1000790e <xQueueGenericSend+0x11e>
|
|
100078ca: 0020 movs r0, r4
|
|
100078cc: f7ff fe84 bl 100075d8 <prvUnlockQueue>
|
|
100078d0: f000 fda0 bl 10008414 <xTaskResumeAll>
|
|
100078d4: f7ff fa7c bl 10006dd0 <vPortEnterCritical>
|
|
100078d8: 6ba2 ldr r2, [r4, #56] @ 0x38
|
|
100078da: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
100078dc: 429a cmp r2, r3
|
|
100078de: d3ba bcc.n 10007856 <xQueueGenericSend+0x66>
|
|
100078e0: 2e02 cmp r6, #2
|
|
100078e2: d0b8 beq.n 10007856 <xQueueGenericSend+0x66>
|
|
100078e4: 9b01 ldr r3, [sp, #4]
|
|
100078e6: 2b00 cmp r3, #0
|
|
100078e8: d0e0 beq.n 100078ac <xQueueGenericSend+0xbc>
|
|
100078ea: 2d00 cmp r5, #0
|
|
100078ec: d0e2 beq.n 100078b4 <xQueueGenericSend+0xc4>
|
|
100078ee: f7ff fa8f bl 10006e10 <vPortExitCritical>
|
|
100078f2: f000 fcbd bl 10008270 <vTaskSuspendAll>
|
|
100078f6: f7ff fa6b bl 10006dd0 <vPortEnterCritical>
|
|
100078fa: 2344 movs r3, #68 @ 0x44
|
|
100078fc: 5ce2 ldrb r2, [r4, r3]
|
|
100078fe: b252 sxtb r2, r2
|
|
10007900: 3201 adds r2, #1
|
|
10007902: d0dc beq.n 100078be <xQueueGenericSend+0xce>
|
|
10007904: 2345 movs r3, #69 @ 0x45
|
|
10007906: 5ce2 ldrb r2, [r4, r3]
|
|
10007908: b252 sxtb r2, r2
|
|
1000790a: 3201 adds r2, #1
|
|
1000790c: d0da beq.n 100078c4 <xQueueGenericSend+0xd4>
|
|
1000790e: f7ff fa7f bl 10006e10 <vPortExitCritical>
|
|
10007912: a901 add r1, sp, #4
|
|
10007914: a802 add r0, sp, #8
|
|
10007916: f001 f837 bl 10008988 <xTaskCheckForTimeOut>
|
|
1000791a: 2800 cmp r0, #0
|
|
1000791c: d113 bne.n 10007946 <xQueueGenericSend+0x156>
|
|
1000791e: 0020 movs r0, r4
|
|
10007920: f7ff fd97 bl 10007452 <prvIsQueueFull>
|
|
10007924: 2800 cmp r0, #0
|
|
10007926: d0d0 beq.n 100078ca <xQueueGenericSend+0xda>
|
|
10007928: 9901 ldr r1, [sp, #4]
|
|
1000792a: 0020 movs r0, r4
|
|
1000792c: 3010 adds r0, #16
|
|
1000792e: f000 fe97 bl 10008660 <vTaskPlaceOnEventList>
|
|
10007932: 0020 movs r0, r4
|
|
10007934: f7ff fe50 bl 100075d8 <prvUnlockQueue>
|
|
10007938: f000 fd6c bl 10008414 <xTaskResumeAll>
|
|
1000793c: 2800 cmp r0, #0
|
|
1000793e: d1c9 bne.n 100078d4 <xQueueGenericSend+0xe4>
|
|
10007940: f7ff fa26 bl 10006d90 <vPortYield>
|
|
10007944: e7c6 b.n 100078d4 <xQueueGenericSend+0xe4>
|
|
10007946: 0020 movs r0, r4
|
|
10007948: f7ff fe46 bl 100075d8 <prvUnlockQueue>
|
|
1000794c: f000 fd62 bl 10008414 <xTaskResumeAll>
|
|
10007950: 2000 movs r0, #0
|
|
10007952: e795 b.n 10007880 <xQueueGenericSend+0x90>
|
|
10007954: 1000ab7c .word 0x1000ab7c
|
|
10007958: 1000af0c .word 0x1000af0c
|
|
1000795c: 1000ac30 .word 0x1000ac30
|
|
10007960: 00000382 .word 0x00000382
|
|
10007964: 1000accc .word 0x1000accc
|
|
10007968: 0000037d .word 0x0000037d
|
|
1000796c: 1000ad04 .word 0x1000ad04
|
|
10007970: 0000037e .word 0x0000037e
|
|
10007974: 1000ad5c .word 0x1000ad5c
|
|
10007978: 0000037f .word 0x0000037f
|
|
|
|
1000797c <prvInitialiseMutex>:
|
|
1000797c: b510 push {r4, lr}
|
|
1000797e: 2800 cmp r0, #0
|
|
10007980: d007 beq.n 10007992 <prvInitialiseMutex+0x16>
|
|
10007982: 2300 movs r3, #0
|
|
10007984: 6083 str r3, [r0, #8]
|
|
10007986: 6003 str r3, [r0, #0]
|
|
10007988: 60c3 str r3, [r0, #12]
|
|
1000798a: 2200 movs r2, #0
|
|
1000798c: 2100 movs r1, #0
|
|
1000798e: f7ff ff2f bl 100077f0 <xQueueGenericSend>
|
|
10007992: bd10 pop {r4, pc}
|
|
|
|
10007994 <xQueueCreateMutex>:
|
|
10007994: b510 push {r4, lr}
|
|
10007996: 0002 movs r2, r0
|
|
10007998: 2100 movs r1, #0
|
|
1000799a: 2001 movs r0, #1
|
|
1000799c: f7ff fee0 bl 10007760 <xQueueGenericCreate>
|
|
100079a0: 0004 movs r4, r0
|
|
100079a2: f7ff ffeb bl 1000797c <prvInitialiseMutex>
|
|
100079a6: 0020 movs r0, r4
|
|
100079a8: bd10 pop {r4, pc}
|
|
...
|
|
|
|
100079ac <xQueueGenericSendFromISR>:
|
|
100079ac: b5f0 push {r4, r5, r6, r7, lr}
|
|
100079ae: 46d6 mov lr, sl
|
|
100079b0: 4647 mov r7, r8
|
|
100079b2: b580 push {r7, lr}
|
|
100079b4: b083 sub sp, #12
|
|
100079b6: 0004 movs r4, r0
|
|
100079b8: 000f movs r7, r1
|
|
100079ba: 9201 str r2, [sp, #4]
|
|
100079bc: 001d movs r5, r3
|
|
100079be: 2800 cmp r0, #0
|
|
100079c0: d019 beq.n 100079f6 <xQueueGenericSendFromISR+0x4a>
|
|
100079c2: 2900 cmp r1, #0
|
|
100079c4: d01d beq.n 10007a02 <xQueueGenericSendFromISR+0x56>
|
|
100079c6: 2d02 cmp r5, #2
|
|
100079c8: d102 bne.n 100079d0 <xQueueGenericSendFromISR+0x24>
|
|
100079ca: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
100079cc: 2b01 cmp r3, #1
|
|
100079ce: d121 bne.n 10007a14 <xQueueGenericSendFromISR+0x68>
|
|
100079d0: f7ff fa3c bl 10006e4c <ulSetInterruptMaskFromISR>
|
|
100079d4: 4680 mov r8, r0
|
|
100079d6: 6ba2 ldr r2, [r4, #56] @ 0x38
|
|
100079d8: 6be3 ldr r3, [r4, #60] @ 0x3c
|
|
100079da: 429a cmp r2, r3
|
|
100079dc: d320 bcc.n 10007a20 <xQueueGenericSendFromISR+0x74>
|
|
100079de: 2d02 cmp r5, #2
|
|
100079e0: d01e beq.n 10007a20 <xQueueGenericSendFromISR+0x74>
|
|
100079e2: 2400 movs r4, #0
|
|
100079e4: 4640 mov r0, r8
|
|
100079e6: f7ff fa35 bl 10006e54 <vClearInterruptMaskFromISR>
|
|
100079ea: 0020 movs r0, r4
|
|
100079ec: b003 add sp, #12
|
|
100079ee: bcc0 pop {r6, r7}
|
|
100079f0: 46ba mov sl, r7
|
|
100079f2: 46b0 mov r8, r6
|
|
100079f4: bdf0 pop {r4, r5, r6, r7, pc}
|
|
100079f6: 4b32 ldr r3, [pc, #200] @ (10007ac0 <xQueueGenericSendFromISR+0x114>)
|
|
100079f8: 4a32 ldr r2, [pc, #200] @ (10007ac4 <xQueueGenericSendFromISR+0x118>)
|
|
100079fa: 4833 ldr r0, [pc, #204] @ (10007ac8 <xQueueGenericSendFromISR+0x11c>)
|
|
100079fc: 4933 ldr r1, [pc, #204] @ (10007acc <xQueueGenericSendFromISR+0x120>)
|
|
100079fe: f7fa fd41 bl 10002484 <__assert_func>
|
|
10007a02: 6c03 ldr r3, [r0, #64] @ 0x40
|
|
10007a04: 2b00 cmp r3, #0
|
|
10007a06: d0de beq.n 100079c6 <xQueueGenericSendFromISR+0x1a>
|
|
10007a08: 4b31 ldr r3, [pc, #196] @ (10007ad0 <xQueueGenericSendFromISR+0x124>)
|
|
10007a0a: 4a2e ldr r2, [pc, #184] @ (10007ac4 <xQueueGenericSendFromISR+0x118>)
|
|
10007a0c: 482e ldr r0, [pc, #184] @ (10007ac8 <xQueueGenericSendFromISR+0x11c>)
|
|
10007a0e: 4931 ldr r1, [pc, #196] @ (10007ad4 <xQueueGenericSendFromISR+0x128>)
|
|
10007a10: f7fa fd38 bl 10002484 <__assert_func>
|
|
10007a14: 4b30 ldr r3, [pc, #192] @ (10007ad8 <xQueueGenericSendFromISR+0x12c>)
|
|
10007a16: 4a2b ldr r2, [pc, #172] @ (10007ac4 <xQueueGenericSendFromISR+0x118>)
|
|
10007a18: 482b ldr r0, [pc, #172] @ (10007ac8 <xQueueGenericSendFromISR+0x11c>)
|
|
10007a1a: 4930 ldr r1, [pc, #192] @ (10007adc <xQueueGenericSendFromISR+0x130>)
|
|
10007a1c: f7fa fd32 bl 10002484 <__assert_func>
|
|
10007a20: 2345 movs r3, #69 @ 0x45
|
|
10007a22: 5ce6 ldrb r6, [r4, r3]
|
|
10007a24: b276 sxtb r6, r6
|
|
10007a26: 6ba3 ldr r3, [r4, #56] @ 0x38
|
|
10007a28: 469a mov sl, r3
|
|
10007a2a: 002a movs r2, r5
|
|
10007a2c: 0039 movs r1, r7
|
|
10007a2e: 0020 movs r0, r4
|
|
10007a30: f7ff fd2c bl 1000748c <prvCopyDataToQueue>
|
|
10007a34: 1c73 adds r3, r6, #1
|
|
10007a36: d125 bne.n 10007a84 <xQueueGenericSendFromISR+0xd8>
|
|
10007a38: 6ca3 ldr r3, [r4, #72] @ 0x48
|
|
10007a3a: 2b00 cmp r3, #0
|
|
10007a3c: d010 beq.n 10007a60 <xQueueGenericSendFromISR+0xb4>
|
|
10007a3e: 2d02 cmp r5, #2
|
|
10007a40: d102 bne.n 10007a48 <xQueueGenericSendFromISR+0x9c>
|
|
10007a42: 4653 mov r3, sl
|
|
10007a44: 2b00 cmp r3, #0
|
|
10007a46: d12f bne.n 10007aa8 <xQueueGenericSendFromISR+0xfc>
|
|
10007a48: 0020 movs r0, r4
|
|
10007a4a: f7ff fd71 bl 10007530 <prvNotifyQueueSetContainer>
|
|
10007a4e: 2800 cmp r0, #0
|
|
10007a50: d02c beq.n 10007aac <xQueueGenericSendFromISR+0x100>
|
|
10007a52: 9a01 ldr r2, [sp, #4]
|
|
10007a54: 2a00 cmp r2, #0
|
|
10007a56: d02b beq.n 10007ab0 <xQueueGenericSendFromISR+0x104>
|
|
10007a58: 2301 movs r3, #1
|
|
10007a5a: 6013 str r3, [r2, #0]
|
|
10007a5c: 2401 movs r4, #1
|
|
10007a5e: e7c1 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007a60: 6a63 ldr r3, [r4, #36] @ 0x24
|
|
10007a62: 2b00 cmp r3, #0
|
|
10007a64: d101 bne.n 10007a6a <xQueueGenericSendFromISR+0xbe>
|
|
10007a66: 2401 movs r4, #1
|
|
10007a68: e7bc b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007a6a: 0020 movs r0, r4
|
|
10007a6c: 3024 adds r0, #36 @ 0x24
|
|
10007a6e: f000 fe85 bl 1000877c <xTaskRemoveFromEventList>
|
|
10007a72: 2800 cmp r0, #0
|
|
10007a74: d01e beq.n 10007ab4 <xQueueGenericSendFromISR+0x108>
|
|
10007a76: 9a01 ldr r2, [sp, #4]
|
|
10007a78: 2a00 cmp r2, #0
|
|
10007a7a: d01d beq.n 10007ab8 <xQueueGenericSendFromISR+0x10c>
|
|
10007a7c: 2301 movs r3, #1
|
|
10007a7e: 6013 str r3, [r2, #0]
|
|
10007a80: 2401 movs r4, #1
|
|
10007a82: e7af b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007a84: f000 fc02 bl 1000828c <uxTaskGetNumberOfTasks>
|
|
10007a88: 4286 cmp r6, r0
|
|
10007a8a: d217 bcs.n 10007abc <xQueueGenericSendFromISR+0x110>
|
|
10007a8c: 2e7f cmp r6, #127 @ 0x7f
|
|
10007a8e: d005 beq.n 10007a9c <xQueueGenericSendFromISR+0xf0>
|
|
10007a90: 3601 adds r6, #1
|
|
10007a92: b276 sxtb r6, r6
|
|
10007a94: 2345 movs r3, #69 @ 0x45
|
|
10007a96: 54e6 strb r6, [r4, r3]
|
|
10007a98: 2401 movs r4, #1
|
|
10007a9a: e7a3 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007a9c: 4b10 ldr r3, [pc, #64] @ (10007ae0 <xQueueGenericSendFromISR+0x134>)
|
|
10007a9e: 4a09 ldr r2, [pc, #36] @ (10007ac4 <xQueueGenericSendFromISR+0x118>)
|
|
10007aa0: 4809 ldr r0, [pc, #36] @ (10007ac8 <xQueueGenericSendFromISR+0x11c>)
|
|
10007aa2: 4910 ldr r1, [pc, #64] @ (10007ae4 <xQueueGenericSendFromISR+0x138>)
|
|
10007aa4: f7fa fcee bl 10002484 <__assert_func>
|
|
10007aa8: 2401 movs r4, #1
|
|
10007aaa: e79b b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007aac: 2401 movs r4, #1
|
|
10007aae: e799 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007ab0: 2401 movs r4, #1
|
|
10007ab2: e797 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007ab4: 2401 movs r4, #1
|
|
10007ab6: e795 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007ab8: 2401 movs r4, #1
|
|
10007aba: e793 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007abc: 2401 movs r4, #1
|
|
10007abe: e791 b.n 100079e4 <xQueueGenericSendFromISR+0x38>
|
|
10007ac0: 1000accc .word 0x1000accc
|
|
10007ac4: 1000aed4 .word 0x1000aed4
|
|
10007ac8: 1000ac30 .word 0x1000ac30
|
|
10007acc: 00000451 .word 0x00000451
|
|
10007ad0: 1000ad04 .word 0x1000ad04
|
|
10007ad4: 00000452 .word 0x00000452
|
|
10007ad8: 1000ad5c .word 0x1000ad5c
|
|
10007adc: 00000453 .word 0x00000453
|
|
10007ae0: 1000aca8 .word 0x1000aca8
|
|
10007ae4: 000004dc .word 0x000004dc
|
|
|
|
10007ae8 <xQueueReceive>:
|
|
10007ae8: b5f0 push {r4, r5, r6, r7, lr}
|
|
10007aea: b085 sub sp, #20
|
|
10007aec: 0004 movs r4, r0
|
|
10007aee: 000e movs r6, r1
|
|
10007af0: 9201 str r2, [sp, #4]
|
|
10007af2: 2800 cmp r0, #0
|
|
10007af4: d00e beq.n 10007b14 <xQueueReceive+0x2c>
|
|
10007af6: 2900 cmp r1, #0
|
|
10007af8: d012 beq.n 10007b20 <xQueueReceive+0x38>
|
|
10007afa: f000 ffab bl 10008a54 <xTaskGetSchedulerState>
|
|
10007afe: 1e05 subs r5, r0, #0
|
|
10007b00: d118 bne.n 10007b34 <xQueueReceive+0x4c>
|
|
10007b02: 9b01 ldr r3, [sp, #4]
|
|
10007b04: 2b00 cmp r3, #0
|
|
10007b06: d04f beq.n 10007ba8 <xQueueReceive+0xc0>
|
|
10007b08: 4b43 ldr r3, [pc, #268] @ (10007c18 <xQueueReceive+0x130>)
|
|
10007b0a: 4a44 ldr r2, [pc, #272] @ (10007c1c <xQueueReceive+0x134>)
|
|
10007b0c: 4844 ldr r0, [pc, #272] @ (10007c20 <xQueueReceive+0x138>)
|
|
10007b0e: 4945 ldr r1, [pc, #276] @ (10007c24 <xQueueReceive+0x13c>)
|
|
10007b10: f7fa fcb8 bl 10002484 <__assert_func>
|
|
10007b14: 4b44 ldr r3, [pc, #272] @ (10007c28 <xQueueReceive+0x140>)
|
|
10007b16: 4a41 ldr r2, [pc, #260] @ (10007c1c <xQueueReceive+0x134>)
|
|
10007b18: 4841 ldr r0, [pc, #260] @ (10007c20 <xQueueReceive+0x138>)
|
|
10007b1a: 4944 ldr r1, [pc, #272] @ (10007c2c <xQueueReceive+0x144>)
|
|
10007b1c: f7fa fcb2 bl 10002484 <__assert_func>
|
|
10007b20: 6c03 ldr r3, [r0, #64] @ 0x40
|
|
10007b22: 2b00 cmp r3, #0
|
|
10007b24: d0e9 beq.n 10007afa <xQueueReceive+0x12>
|
|
10007b26: 4b42 ldr r3, [pc, #264] @ (10007c30 <xQueueReceive+0x148>)
|
|
10007b28: 4a3c ldr r2, [pc, #240] @ (10007c1c <xQueueReceive+0x134>)
|
|
10007b2a: 21b4 movs r1, #180 @ 0xb4
|
|
10007b2c: 483c ldr r0, [pc, #240] @ (10007c20 <xQueueReceive+0x138>)
|
|
10007b2e: 00c9 lsls r1, r1, #3
|
|
10007b30: f7fa fca8 bl 10002484 <__assert_func>
|
|
10007b34: 2500 movs r5, #0
|
|
10007b36: e037 b.n 10007ba8 <xQueueReceive+0xc0>
|
|
10007b38: 0031 movs r1, r6
|
|
10007b3a: 0020 movs r0, r4
|
|
10007b3c: f7ff fce5 bl 1000750a <prvCopyDataFromQueue>
|
|
10007b40: 3f01 subs r7, #1
|
|
10007b42: 63a7 str r7, [r4, #56] @ 0x38
|
|
10007b44: 6923 ldr r3, [r4, #16]
|
|
10007b46: 2b00 cmp r3, #0
|
|
10007b48: d104 bne.n 10007b54 <xQueueReceive+0x6c>
|
|
10007b4a: f7ff f961 bl 10006e10 <vPortExitCritical>
|
|
10007b4e: 2001 movs r0, #1
|
|
10007b50: b005 add sp, #20
|
|
10007b52: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10007b54: 0020 movs r0, r4
|
|
10007b56: 3010 adds r0, #16
|
|
10007b58: f000 fe10 bl 1000877c <xTaskRemoveFromEventList>
|
|
10007b5c: 2800 cmp r0, #0
|
|
10007b5e: d0f4 beq.n 10007b4a <xQueueReceive+0x62>
|
|
10007b60: f7ff f916 bl 10006d90 <vPortYield>
|
|
10007b64: e7f1 b.n 10007b4a <xQueueReceive+0x62>
|
|
10007b66: f7ff f953 bl 10006e10 <vPortExitCritical>
|
|
10007b6a: 2000 movs r0, #0
|
|
10007b6c: e7f0 b.n 10007b50 <xQueueReceive+0x68>
|
|
10007b6e: a802 add r0, sp, #8
|
|
10007b70: f000 fefe bl 10008970 <vTaskInternalSetTimeOutState>
|
|
10007b74: 3501 adds r5, #1
|
|
10007b76: e021 b.n 10007bbc <xQueueReceive+0xd4>
|
|
10007b78: 2344 movs r3, #68 @ 0x44
|
|
10007b7a: 2200 movs r2, #0
|
|
10007b7c: 54e2 strb r2, [r4, r3]
|
|
10007b7e: e028 b.n 10007bd2 <xQueueReceive+0xea>
|
|
10007b80: 2345 movs r3, #69 @ 0x45
|
|
10007b82: 2200 movs r2, #0
|
|
10007b84: 54e2 strb r2, [r4, r3]
|
|
10007b86: e029 b.n 10007bdc <xQueueReceive+0xf4>
|
|
10007b88: 0020 movs r0, r4
|
|
10007b8a: f7ff fd25 bl 100075d8 <prvUnlockQueue>
|
|
10007b8e: f000 fc41 bl 10008414 <xTaskResumeAll>
|
|
10007b92: e009 b.n 10007ba8 <xQueueReceive+0xc0>
|
|
10007b94: 0020 movs r0, r4
|
|
10007b96: f7ff fd1f bl 100075d8 <prvUnlockQueue>
|
|
10007b9a: f000 fc3b bl 10008414 <xTaskResumeAll>
|
|
10007b9e: 0020 movs r0, r4
|
|
10007ba0: f7ff fc66 bl 10007470 <prvIsQueueEmpty>
|
|
10007ba4: 2800 cmp r0, #0
|
|
10007ba6: d135 bne.n 10007c14 <xQueueReceive+0x12c>
|
|
10007ba8: f7ff f912 bl 10006dd0 <vPortEnterCritical>
|
|
10007bac: 6ba7 ldr r7, [r4, #56] @ 0x38
|
|
10007bae: 2f00 cmp r7, #0
|
|
10007bb0: d1c2 bne.n 10007b38 <xQueueReceive+0x50>
|
|
10007bb2: 9b01 ldr r3, [sp, #4]
|
|
10007bb4: 2b00 cmp r3, #0
|
|
10007bb6: d0d6 beq.n 10007b66 <xQueueReceive+0x7e>
|
|
10007bb8: 2d00 cmp r5, #0
|
|
10007bba: d0d8 beq.n 10007b6e <xQueueReceive+0x86>
|
|
10007bbc: f7ff f928 bl 10006e10 <vPortExitCritical>
|
|
10007bc0: f000 fb56 bl 10008270 <vTaskSuspendAll>
|
|
10007bc4: f7ff f904 bl 10006dd0 <vPortEnterCritical>
|
|
10007bc8: 2344 movs r3, #68 @ 0x44
|
|
10007bca: 5ce3 ldrb r3, [r4, r3]
|
|
10007bcc: b25b sxtb r3, r3
|
|
10007bce: 3301 adds r3, #1
|
|
10007bd0: d0d2 beq.n 10007b78 <xQueueReceive+0x90>
|
|
10007bd2: 2345 movs r3, #69 @ 0x45
|
|
10007bd4: 5ce3 ldrb r3, [r4, r3]
|
|
10007bd6: b25b sxtb r3, r3
|
|
10007bd8: 3301 adds r3, #1
|
|
10007bda: d0d1 beq.n 10007b80 <xQueueReceive+0x98>
|
|
10007bdc: f7ff f918 bl 10006e10 <vPortExitCritical>
|
|
10007be0: a901 add r1, sp, #4
|
|
10007be2: a802 add r0, sp, #8
|
|
10007be4: f000 fed0 bl 10008988 <xTaskCheckForTimeOut>
|
|
10007be8: 2800 cmp r0, #0
|
|
10007bea: d1d3 bne.n 10007b94 <xQueueReceive+0xac>
|
|
10007bec: 0020 movs r0, r4
|
|
10007bee: f7ff fc3f bl 10007470 <prvIsQueueEmpty>
|
|
10007bf2: 2800 cmp r0, #0
|
|
10007bf4: d0c8 beq.n 10007b88 <xQueueReceive+0xa0>
|
|
10007bf6: 9901 ldr r1, [sp, #4]
|
|
10007bf8: 0020 movs r0, r4
|
|
10007bfa: 3024 adds r0, #36 @ 0x24
|
|
10007bfc: f000 fd30 bl 10008660 <vTaskPlaceOnEventList>
|
|
10007c00: 0020 movs r0, r4
|
|
10007c02: f7ff fce9 bl 100075d8 <prvUnlockQueue>
|
|
10007c06: f000 fc05 bl 10008414 <xTaskResumeAll>
|
|
10007c0a: 2800 cmp r0, #0
|
|
10007c0c: d1cc bne.n 10007ba8 <xQueueReceive+0xc0>
|
|
10007c0e: f7ff f8bf bl 10006d90 <vPortYield>
|
|
10007c12: e7c9 b.n 10007ba8 <xQueueReceive+0xc0>
|
|
10007c14: 2000 movs r0, #0
|
|
10007c16: e79b b.n 10007b50 <xQueueReceive+0x68>
|
|
10007c18: 1000ab7c .word 0x1000ab7c
|
|
10007c1c: 1000aec4 .word 0x1000aec4
|
|
10007c20: 1000ac30 .word 0x1000ac30
|
|
10007c24: 000005a5 .word 0x000005a5
|
|
10007c28: 1000ae2c .word 0x1000ae2c
|
|
10007c2c: 0000059c .word 0x0000059c
|
|
10007c30: 1000ae38 .word 0x1000ae38
|
|
|
|
10007c34 <xQueueSemaphoreTake>:
|
|
10007c34: b570 push {r4, r5, r6, lr}
|
|
10007c36: b084 sub sp, #16
|
|
10007c38: 1e04 subs r4, r0, #0
|
|
10007c3a: 9101 str r1, [sp, #4]
|
|
10007c3c: d00b beq.n 10007c56 <xQueueSemaphoreTake+0x22>
|
|
10007c3e: 6c03 ldr r3, [r0, #64] @ 0x40
|
|
10007c40: 2b00 cmp r3, #0
|
|
10007c42: d10e bne.n 10007c62 <xQueueSemaphoreTake+0x2e>
|
|
10007c44: f000 ff06 bl 10008a54 <xTaskGetSchedulerState>
|
|
10007c48: 1e06 subs r6, r0, #0
|
|
10007c4a: d116 bne.n 10007c7a <xQueueSemaphoreTake+0x46>
|
|
10007c4c: 9b01 ldr r3, [sp, #4]
|
|
10007c4e: 2b00 cmp r3, #0
|
|
10007c50: d10d bne.n 10007c6e <xQueueSemaphoreTake+0x3a>
|
|
10007c52: 0005 movs r5, r0
|
|
10007c54: e058 b.n 10007d08 <xQueueSemaphoreTake+0xd4>
|
|
10007c56: 4b51 ldr r3, [pc, #324] @ (10007d9c <xQueueSemaphoreTake+0x168>)
|
|
10007c58: 4a51 ldr r2, [pc, #324] @ (10007da0 <xQueueSemaphoreTake+0x16c>)
|
|
10007c5a: 4852 ldr r0, [pc, #328] @ (10007da4 <xQueueSemaphoreTake+0x170>)
|
|
10007c5c: 4952 ldr r1, [pc, #328] @ (10007da8 <xQueueSemaphoreTake+0x174>)
|
|
10007c5e: f7fa fc11 bl 10002484 <__assert_func>
|
|
10007c62: 4b52 ldr r3, [pc, #328] @ (10007dac <xQueueSemaphoreTake+0x178>)
|
|
10007c64: 4a4e ldr r2, [pc, #312] @ (10007da0 <xQueueSemaphoreTake+0x16c>)
|
|
10007c66: 484f ldr r0, [pc, #316] @ (10007da4 <xQueueSemaphoreTake+0x170>)
|
|
10007c68: 4951 ldr r1, [pc, #324] @ (10007db0 <xQueueSemaphoreTake+0x17c>)
|
|
10007c6a: f7fa fc0b bl 10002484 <__assert_func>
|
|
10007c6e: 4b51 ldr r3, [pc, #324] @ (10007db4 <xQueueSemaphoreTake+0x180>)
|
|
10007c70: 4a4b ldr r2, [pc, #300] @ (10007da0 <xQueueSemaphoreTake+0x16c>)
|
|
10007c72: 484c ldr r0, [pc, #304] @ (10007da4 <xQueueSemaphoreTake+0x170>)
|
|
10007c74: 4950 ldr r1, [pc, #320] @ (10007db8 <xQueueSemaphoreTake+0x184>)
|
|
10007c76: f7fa fc05 bl 10002484 <__assert_func>
|
|
10007c7a: 2500 movs r5, #0
|
|
10007c7c: 2600 movs r6, #0
|
|
10007c7e: e043 b.n 10007d08 <xQueueSemaphoreTake+0xd4>
|
|
10007c80: 3b01 subs r3, #1
|
|
10007c82: 63a3 str r3, [r4, #56] @ 0x38
|
|
10007c84: 6823 ldr r3, [r4, #0]
|
|
10007c86: 2b00 cmp r3, #0
|
|
10007c88: d007 beq.n 10007c9a <xQueueSemaphoreTake+0x66>
|
|
10007c8a: 6923 ldr r3, [r4, #16]
|
|
10007c8c: 2b00 cmp r3, #0
|
|
10007c8e: d108 bne.n 10007ca2 <xQueueSemaphoreTake+0x6e>
|
|
10007c90: f7ff f8be bl 10006e10 <vPortExitCritical>
|
|
10007c94: 2001 movs r0, #1
|
|
10007c96: b004 add sp, #16
|
|
10007c98: bd70 pop {r4, r5, r6, pc}
|
|
10007c9a: f001 f819 bl 10008cd0 <pvTaskIncrementMutexHeldCount>
|
|
10007c9e: 60a0 str r0, [r4, #8]
|
|
10007ca0: e7f3 b.n 10007c8a <xQueueSemaphoreTake+0x56>
|
|
10007ca2: 0020 movs r0, r4
|
|
10007ca4: 3010 adds r0, #16
|
|
10007ca6: f000 fd69 bl 1000877c <xTaskRemoveFromEventList>
|
|
10007caa: 2800 cmp r0, #0
|
|
10007cac: d0f0 beq.n 10007c90 <xQueueSemaphoreTake+0x5c>
|
|
10007cae: f7ff f86f bl 10006d90 <vPortYield>
|
|
10007cb2: e7ed b.n 10007c90 <xQueueSemaphoreTake+0x5c>
|
|
10007cb4: f7ff f8ac bl 10006e10 <vPortExitCritical>
|
|
10007cb8: 2000 movs r0, #0
|
|
10007cba: e7ec b.n 10007c96 <xQueueSemaphoreTake+0x62>
|
|
10007cbc: a802 add r0, sp, #8
|
|
10007cbe: f000 fe57 bl 10008970 <vTaskInternalSetTimeOutState>
|
|
10007cc2: 3601 adds r6, #1
|
|
10007cc4: e02a b.n 10007d1c <xQueueSemaphoreTake+0xe8>
|
|
10007cc6: 2344 movs r3, #68 @ 0x44
|
|
10007cc8: 2200 movs r2, #0
|
|
10007cca: 54e2 strb r2, [r4, r3]
|
|
10007ccc: e031 b.n 10007d32 <xQueueSemaphoreTake+0xfe>
|
|
10007cce: 2345 movs r3, #69 @ 0x45
|
|
10007cd0: 2200 movs r2, #0
|
|
10007cd2: 54e2 strb r2, [r4, r3]
|
|
10007cd4: e032 b.n 10007d3c <xQueueSemaphoreTake+0x108>
|
|
10007cd6: f7ff f87b bl 10006dd0 <vPortEnterCritical>
|
|
10007cda: 68a0 ldr r0, [r4, #8]
|
|
10007cdc: f000 fecc bl 10008a78 <xTaskPriorityInherit>
|
|
10007ce0: 0005 movs r5, r0
|
|
10007ce2: f7ff f895 bl 10006e10 <vPortExitCritical>
|
|
10007ce6: e039 b.n 10007d5c <xQueueSemaphoreTake+0x128>
|
|
10007ce8: 0020 movs r0, r4
|
|
10007cea: f7ff fc75 bl 100075d8 <prvUnlockQueue>
|
|
10007cee: f000 fb91 bl 10008414 <xTaskResumeAll>
|
|
10007cf2: e009 b.n 10007d08 <xQueueSemaphoreTake+0xd4>
|
|
10007cf4: 0020 movs r0, r4
|
|
10007cf6: f7ff fc6f bl 100075d8 <prvUnlockQueue>
|
|
10007cfa: f000 fb8b bl 10008414 <xTaskResumeAll>
|
|
10007cfe: 0020 movs r0, r4
|
|
10007d00: f7ff fbb6 bl 10007470 <prvIsQueueEmpty>
|
|
10007d04: 2800 cmp r0, #0
|
|
10007d06: d138 bne.n 10007d7a <xQueueSemaphoreTake+0x146>
|
|
10007d08: f7ff f862 bl 10006dd0 <vPortEnterCritical>
|
|
10007d0c: 6ba3 ldr r3, [r4, #56] @ 0x38
|
|
10007d0e: 2b00 cmp r3, #0
|
|
10007d10: d1b6 bne.n 10007c80 <xQueueSemaphoreTake+0x4c>
|
|
10007d12: 9b01 ldr r3, [sp, #4]
|
|
10007d14: 2b00 cmp r3, #0
|
|
10007d16: d0cd beq.n 10007cb4 <xQueueSemaphoreTake+0x80>
|
|
10007d18: 2e00 cmp r6, #0
|
|
10007d1a: d0cf beq.n 10007cbc <xQueueSemaphoreTake+0x88>
|
|
10007d1c: f7ff f878 bl 10006e10 <vPortExitCritical>
|
|
10007d20: f000 faa6 bl 10008270 <vTaskSuspendAll>
|
|
10007d24: f7ff f854 bl 10006dd0 <vPortEnterCritical>
|
|
10007d28: 2344 movs r3, #68 @ 0x44
|
|
10007d2a: 5ce3 ldrb r3, [r4, r3]
|
|
10007d2c: b25b sxtb r3, r3
|
|
10007d2e: 3301 adds r3, #1
|
|
10007d30: d0c9 beq.n 10007cc6 <xQueueSemaphoreTake+0x92>
|
|
10007d32: 2345 movs r3, #69 @ 0x45
|
|
10007d34: 5ce3 ldrb r3, [r4, r3]
|
|
10007d36: b25b sxtb r3, r3
|
|
10007d38: 3301 adds r3, #1
|
|
10007d3a: d0c8 beq.n 10007cce <xQueueSemaphoreTake+0x9a>
|
|
10007d3c: f7ff f868 bl 10006e10 <vPortExitCritical>
|
|
10007d40: a901 add r1, sp, #4
|
|
10007d42: a802 add r0, sp, #8
|
|
10007d44: f000 fe20 bl 10008988 <xTaskCheckForTimeOut>
|
|
10007d48: 2800 cmp r0, #0
|
|
10007d4a: d1d3 bne.n 10007cf4 <xQueueSemaphoreTake+0xc0>
|
|
10007d4c: 0020 movs r0, r4
|
|
10007d4e: f7ff fb8f bl 10007470 <prvIsQueueEmpty>
|
|
10007d52: 2800 cmp r0, #0
|
|
10007d54: d0c8 beq.n 10007ce8 <xQueueSemaphoreTake+0xb4>
|
|
10007d56: 6823 ldr r3, [r4, #0]
|
|
10007d58: 2b00 cmp r3, #0
|
|
10007d5a: d0bc beq.n 10007cd6 <xQueueSemaphoreTake+0xa2>
|
|
10007d5c: 9901 ldr r1, [sp, #4]
|
|
10007d5e: 0020 movs r0, r4
|
|
10007d60: 3024 adds r0, #36 @ 0x24
|
|
10007d62: f000 fc7d bl 10008660 <vTaskPlaceOnEventList>
|
|
10007d66: 0020 movs r0, r4
|
|
10007d68: f7ff fc36 bl 100075d8 <prvUnlockQueue>
|
|
10007d6c: f000 fb52 bl 10008414 <xTaskResumeAll>
|
|
10007d70: 2800 cmp r0, #0
|
|
10007d72: d1c9 bne.n 10007d08 <xQueueSemaphoreTake+0xd4>
|
|
10007d74: f7ff f80c bl 10006d90 <vPortYield>
|
|
10007d78: e7c6 b.n 10007d08 <xQueueSemaphoreTake+0xd4>
|
|
10007d7a: 2d00 cmp r5, #0
|
|
10007d7c: d101 bne.n 10007d82 <xQueueSemaphoreTake+0x14e>
|
|
10007d7e: 2000 movs r0, #0
|
|
10007d80: e789 b.n 10007c96 <xQueueSemaphoreTake+0x62>
|
|
10007d82: f7ff f825 bl 10006dd0 <vPortEnterCritical>
|
|
10007d86: 0020 movs r0, r4
|
|
10007d88: f7ff fb5a bl 10007440 <prvGetDisinheritPriorityAfterTimeout>
|
|
10007d8c: 0001 movs r1, r0
|
|
10007d8e: 68a0 ldr r0, [r4, #8]
|
|
10007d90: f000 ff2c bl 10008bec <vTaskPriorityDisinheritAfterTimeout>
|
|
10007d94: f7ff f83c bl 10006e10 <vPortExitCritical>
|
|
10007d98: e7f1 b.n 10007d7e <xQueueSemaphoreTake+0x14a>
|
|
10007d9a: 46c0 nop @ (mov r8, r8)
|
|
10007d9c: 1000ae2c .word 0x1000ae2c
|
|
10007da0: 1000aeb0 .word 0x1000aeb0
|
|
10007da4: 1000ac30 .word 0x1000ac30
|
|
10007da8: 0000062e .word 0x0000062e
|
|
10007dac: 1000adac .word 0x1000adac
|
|
10007db0: 00000632 .word 0x00000632
|
|
10007db4: 1000ab7c .word 0x1000ab7c
|
|
10007db8: 00000637 .word 0x00000637
|
|
|
|
10007dbc <vQueueAddToRegistry>:
|
|
10007dbc: b570 push {r4, r5, r6, lr}
|
|
10007dbe: 2800 cmp r0, #0
|
|
10007dc0: d004 beq.n 10007dcc <vQueueAddToRegistry+0x10>
|
|
10007dc2: 2900 cmp r1, #0
|
|
10007dc4: d022 beq.n 10007e0c <vQueueAddToRegistry+0x50>
|
|
10007dc6: 2400 movs r4, #0
|
|
10007dc8: 2200 movs r2, #0
|
|
10007dca: e009 b.n 10007de0 <vQueueAddToRegistry+0x24>
|
|
10007dcc: 4b10 ldr r3, [pc, #64] @ (10007e10 <vQueueAddToRegistry+0x54>)
|
|
10007dce: 4a11 ldr r2, [pc, #68] @ (10007e14 <vQueueAddToRegistry+0x58>)
|
|
10007dd0: 4811 ldr r0, [pc, #68] @ (10007e18 <vQueueAddToRegistry+0x5c>)
|
|
10007dd2: 4912 ldr r1, [pc, #72] @ (10007e1c <vQueueAddToRegistry+0x60>)
|
|
10007dd4: f7fa fb56 bl 10002484 <__assert_func>
|
|
10007dd8: 4b11 ldr r3, [pc, #68] @ (10007e20 <vQueueAddToRegistry+0x64>)
|
|
10007dda: 18ec adds r4, r5, r3
|
|
10007ddc: e014 b.n 10007e08 <vQueueAddToRegistry+0x4c>
|
|
10007dde: 3201 adds r2, #1
|
|
10007de0: 2a07 cmp r2, #7
|
|
10007de2: d80f bhi.n 10007e04 <vQueueAddToRegistry+0x48>
|
|
10007de4: 4b0e ldr r3, [pc, #56] @ (10007e20 <vQueueAddToRegistry+0x64>)
|
|
10007de6: 00d5 lsls r5, r2, #3
|
|
10007de8: 195b adds r3, r3, r5
|
|
10007dea: 685b ldr r3, [r3, #4]
|
|
10007dec: 4283 cmp r3, r0
|
|
10007dee: d0f3 beq.n 10007dd8 <vQueueAddToRegistry+0x1c>
|
|
10007df0: 2c00 cmp r4, #0
|
|
10007df2: d1f4 bne.n 10007dde <vQueueAddToRegistry+0x22>
|
|
10007df4: 4b0a ldr r3, [pc, #40] @ (10007e20 <vQueueAddToRegistry+0x64>)
|
|
10007df6: 00d5 lsls r5, r2, #3
|
|
10007df8: 58eb ldr r3, [r5, r3]
|
|
10007dfa: 2b00 cmp r3, #0
|
|
10007dfc: d1ef bne.n 10007dde <vQueueAddToRegistry+0x22>
|
|
10007dfe: 4b08 ldr r3, [pc, #32] @ (10007e20 <vQueueAddToRegistry+0x64>)
|
|
10007e00: 18ec adds r4, r5, r3
|
|
10007e02: e7ec b.n 10007dde <vQueueAddToRegistry+0x22>
|
|
10007e04: 2c00 cmp r4, #0
|
|
10007e06: d001 beq.n 10007e0c <vQueueAddToRegistry+0x50>
|
|
10007e08: 6021 str r1, [r4, #0]
|
|
10007e0a: 6060 str r0, [r4, #4]
|
|
10007e0c: bd70 pop {r4, r5, r6, pc}
|
|
10007e0e: 46c0 nop @ (mov r8, r8)
|
|
10007e10: 1000ae94 .word 0x1000ae94
|
|
10007e14: 1000ae9c .word 0x1000ae9c
|
|
10007e18: 1000ac30 .word 0x1000ac30
|
|
10007e1c: 00000b15 .word 0x00000b15
|
|
10007e20: 20021cb8 .word 0x20021cb8
|
|
|
|
10007e24 <vQueueWaitForMessageRestricted>:
|
|
10007e24: b570 push {r4, r5, r6, lr}
|
|
10007e26: 0004 movs r4, r0
|
|
10007e28: 000d movs r5, r1
|
|
10007e2a: 0016 movs r6, r2
|
|
10007e2c: f7fe ffd0 bl 10006dd0 <vPortEnterCritical>
|
|
10007e30: 2344 movs r3, #68 @ 0x44
|
|
10007e32: 5ce3 ldrb r3, [r4, r3]
|
|
10007e34: b25b sxtb r3, r3
|
|
10007e36: 3301 adds r3, #1
|
|
10007e38: d00d beq.n 10007e56 <vQueueWaitForMessageRestricted+0x32>
|
|
10007e3a: 2345 movs r3, #69 @ 0x45
|
|
10007e3c: 5ce3 ldrb r3, [r4, r3]
|
|
10007e3e: b25b sxtb r3, r3
|
|
10007e40: 3301 adds r3, #1
|
|
10007e42: d00c beq.n 10007e5e <vQueueWaitForMessageRestricted+0x3a>
|
|
10007e44: f7fe ffe4 bl 10006e10 <vPortExitCritical>
|
|
10007e48: 6ba3 ldr r3, [r4, #56] @ 0x38
|
|
10007e4a: 2b00 cmp r3, #0
|
|
10007e4c: d00b beq.n 10007e66 <vQueueWaitForMessageRestricted+0x42>
|
|
10007e4e: 0020 movs r0, r4
|
|
10007e50: f7ff fbc2 bl 100075d8 <prvUnlockQueue>
|
|
10007e54: bd70 pop {r4, r5, r6, pc}
|
|
10007e56: 2344 movs r3, #68 @ 0x44
|
|
10007e58: 2200 movs r2, #0
|
|
10007e5a: 54e2 strb r2, [r4, r3]
|
|
10007e5c: e7ed b.n 10007e3a <vQueueWaitForMessageRestricted+0x16>
|
|
10007e5e: 2345 movs r3, #69 @ 0x45
|
|
10007e60: 2200 movs r2, #0
|
|
10007e62: 54e2 strb r2, [r4, r3]
|
|
10007e64: e7ee b.n 10007e44 <vQueueWaitForMessageRestricted+0x20>
|
|
10007e66: 0020 movs r0, r4
|
|
10007e68: 3024 adds r0, #36 @ 0x24
|
|
10007e6a: 0032 movs r2, r6
|
|
10007e6c: 0029 movs r1, r5
|
|
10007e6e: f000 fc55 bl 1000871c <vTaskPlaceOnEventListRestricted>
|
|
10007e72: e7ec b.n 10007e4e <vQueueWaitForMessageRestricted+0x2a>
|
|
|
|
10007e74 <prvResetNextTaskUnblockTime>:
|
|
10007e74: 4b08 ldr r3, [pc, #32] @ (10007e98 <prvResetNextTaskUnblockTime+0x24>)
|
|
10007e76: 681b ldr r3, [r3, #0]
|
|
10007e78: 681b ldr r3, [r3, #0]
|
|
10007e7a: 2b00 cmp r3, #0
|
|
10007e7c: d104 bne.n 10007e88 <prvResetNextTaskUnblockTime+0x14>
|
|
10007e7e: 4b07 ldr r3, [pc, #28] @ (10007e9c <prvResetNextTaskUnblockTime+0x28>)
|
|
10007e80: 2201 movs r2, #1
|
|
10007e82: 4252 negs r2, r2
|
|
10007e84: 601a str r2, [r3, #0]
|
|
10007e86: 4770 bx lr
|
|
10007e88: 4b03 ldr r3, [pc, #12] @ (10007e98 <prvResetNextTaskUnblockTime+0x24>)
|
|
10007e8a: 681b ldr r3, [r3, #0]
|
|
10007e8c: 68db ldr r3, [r3, #12]
|
|
10007e8e: 681a ldr r2, [r3, #0]
|
|
10007e90: 4b02 ldr r3, [pc, #8] @ (10007e9c <prvResetNextTaskUnblockTime+0x28>)
|
|
10007e92: 601a str r2, [r3, #0]
|
|
10007e94: e7f7 b.n 10007e86 <prvResetNextTaskUnblockTime+0x12>
|
|
10007e96: 46c0 nop @ (mov r8, r8)
|
|
10007e98: 20001740 .word 0x20001740
|
|
10007e9c: 20021c90 .word 0x20021c90
|
|
|
|
10007ea0 <prvDeleteTCB>:
|
|
10007ea0: b510 push {r4, lr}
|
|
10007ea2: 0004 movs r4, r0
|
|
10007ea4: 6b00 ldr r0, [r0, #48] @ 0x30
|
|
10007ea6: f7fe fe69 bl 10006b7c <vPortFree>
|
|
10007eaa: 0020 movs r0, r4
|
|
10007eac: f7fe fe66 bl 10006b7c <vPortFree>
|
|
10007eb0: bd10 pop {r4, pc}
|
|
...
|
|
|
|
10007eb4 <prvInitialiseNewTask>:
|
|
10007eb4: b5f0 push {r4, r5, r6, r7, lr}
|
|
10007eb6: 46de mov lr, fp
|
|
10007eb8: 4657 mov r7, sl
|
|
10007eba: 4646 mov r6, r8
|
|
10007ebc: b5c0 push {r6, r7, lr}
|
|
10007ebe: 4682 mov sl, r0
|
|
10007ec0: 000f movs r7, r1
|
|
10007ec2: 0014 movs r4, r2
|
|
10007ec4: 469b mov fp, r3
|
|
10007ec6: 9e08 ldr r6, [sp, #32]
|
|
10007ec8: 9d0a ldr r5, [sp, #40] @ 0x28
|
|
10007eca: 6b28 ldr r0, [r5, #48] @ 0x30
|
|
10007ecc: 0092 lsls r2, r2, #2
|
|
10007ece: 21a5 movs r1, #165 @ 0xa5
|
|
10007ed0: f7fc f91e bl 10004110 <__wrap_memset>
|
|
10007ed4: 6b2b ldr r3, [r5, #48] @ 0x30
|
|
10007ed6: 4a1e ldr r2, [pc, #120] @ (10007f50 <prvInitialiseNewTask+0x9c>)
|
|
10007ed8: 4694 mov ip, r2
|
|
10007eda: 4464 add r4, ip
|
|
10007edc: 00a4 lsls r4, r4, #2
|
|
10007ede: 191b adds r3, r3, r4
|
|
10007ee0: 2207 movs r2, #7
|
|
10007ee2: 4393 bics r3, r2
|
|
10007ee4: 4698 mov r8, r3
|
|
10007ee6: 2f00 cmp r7, #0
|
|
10007ee8: d00d beq.n 10007f06 <prvInitialiseNewTask+0x52>
|
|
10007eea: 2400 movs r4, #0
|
|
10007eec: 2c0f cmp r4, #15
|
|
10007eee: d807 bhi.n 10007f00 <prvInitialiseNewTask+0x4c>
|
|
10007ef0: 5d3a ldrb r2, [r7, r4]
|
|
10007ef2: 192b adds r3, r5, r4
|
|
10007ef4: 3334 adds r3, #52 @ 0x34
|
|
10007ef6: 701a strb r2, [r3, #0]
|
|
10007ef8: 2a00 cmp r2, #0
|
|
10007efa: d001 beq.n 10007f00 <prvInitialiseNewTask+0x4c>
|
|
10007efc: 3401 adds r4, #1
|
|
10007efe: e7f5 b.n 10007eec <prvInitialiseNewTask+0x38>
|
|
10007f00: 2343 movs r3, #67 @ 0x43
|
|
10007f02: 2200 movs r2, #0
|
|
10007f04: 54ea strb r2, [r5, r3]
|
|
10007f06: 2e1f cmp r6, #31
|
|
10007f08: d81c bhi.n 10007f44 <prvInitialiseNewTask+0x90>
|
|
10007f0a: 62ee str r6, [r5, #44] @ 0x2c
|
|
10007f0c: 64ee str r6, [r5, #76] @ 0x4c
|
|
10007f0e: 1d28 adds r0, r5, #4
|
|
10007f10: f7ff fa69 bl 100073e6 <vListInitialiseItem>
|
|
10007f14: 0028 movs r0, r5
|
|
10007f16: 3018 adds r0, #24
|
|
10007f18: f7ff fa65 bl 100073e6 <vListInitialiseItem>
|
|
10007f1c: 612d str r5, [r5, #16]
|
|
10007f1e: 2320 movs r3, #32
|
|
10007f20: 1b9b subs r3, r3, r6
|
|
10007f22: 61ab str r3, [r5, #24]
|
|
10007f24: 626d str r5, [r5, #36] @ 0x24
|
|
10007f26: 465a mov r2, fp
|
|
10007f28: 4651 mov r1, sl
|
|
10007f2a: 4640 mov r0, r8
|
|
10007f2c: f7fe ff1e bl 10006d6c <pxPortInitialiseStack>
|
|
10007f30: 6028 str r0, [r5, #0]
|
|
10007f32: 9b09 ldr r3, [sp, #36] @ 0x24
|
|
10007f34: 2b00 cmp r3, #0
|
|
10007f36: d000 beq.n 10007f3a <prvInitialiseNewTask+0x86>
|
|
10007f38: 601d str r5, [r3, #0]
|
|
10007f3a: bce0 pop {r5, r6, r7}
|
|
10007f3c: 46bb mov fp, r7
|
|
10007f3e: 46b2 mov sl, r6
|
|
10007f40: 46a8 mov r8, r5
|
|
10007f42: bdf0 pop {r4, r5, r6, r7, pc}
|
|
10007f44: 4b03 ldr r3, [pc, #12] @ (10007f54 <prvInitialiseNewTask+0xa0>)
|
|
10007f46: 4a04 ldr r2, [pc, #16] @ (10007f58 <prvInitialiseNewTask+0xa4>)
|
|
10007f48: 4804 ldr r0, [pc, #16] @ (10007f5c <prvInitialiseNewTask+0xa8>)
|
|
10007f4a: 4905 ldr r1, [pc, #20] @ (10007f60 <prvInitialiseNewTask+0xac>)
|
|
10007f4c: f7fa fa9a bl 10002484 <__assert_func>
|
|
10007f50: 3fffffff .word 0x3fffffff
|
|
10007f54: 1000af80 .word 0x1000af80
|
|
10007f58: 1000b250 .word 0x1000b250
|
|
10007f5c: 1000af50 .word 0x1000af50
|
|
10007f60: 00000396 .word 0x00000396
|
|
|
|
10007f64 <prvInitialiseTaskLists>:
|
|
10007f64: b570 push {r4, r5, r6, lr}
|
|
10007f66: 2400 movs r4, #0
|
|
10007f68: e007 b.n 10007f7a <prvInitialiseTaskLists+0x16>
|
|
10007f6a: 00a3 lsls r3, r4, #2
|
|
10007f6c: 191b adds r3, r3, r4
|
|
10007f6e: 0098 lsls r0, r3, #2
|
|
10007f70: 4b0e ldr r3, [pc, #56] @ (10007fac <prvInitialiseTaskLists+0x48>)
|
|
10007f72: 18c0 adds r0, r0, r3
|
|
10007f74: f7ff fa2c bl 100073d0 <vListInitialise>
|
|
10007f78: 3401 adds r4, #1
|
|
10007f7a: 2c1f cmp r4, #31
|
|
10007f7c: d9f5 bls.n 10007f6a <prvInitialiseTaskLists+0x6>
|
|
10007f7e: 4d0c ldr r5, [pc, #48] @ (10007fb0 <prvInitialiseTaskLists+0x4c>)
|
|
10007f80: 0028 movs r0, r5
|
|
10007f82: f7ff fa25 bl 100073d0 <vListInitialise>
|
|
10007f86: 4c0b ldr r4, [pc, #44] @ (10007fb4 <prvInitialiseTaskLists+0x50>)
|
|
10007f88: 0020 movs r0, r4
|
|
10007f8a: f7ff fa21 bl 100073d0 <vListInitialise>
|
|
10007f8e: 480a ldr r0, [pc, #40] @ (10007fb8 <prvInitialiseTaskLists+0x54>)
|
|
10007f90: f7ff fa1e bl 100073d0 <vListInitialise>
|
|
10007f94: 4809 ldr r0, [pc, #36] @ (10007fbc <prvInitialiseTaskLists+0x58>)
|
|
10007f96: f7ff fa1b bl 100073d0 <vListInitialise>
|
|
10007f9a: 4809 ldr r0, [pc, #36] @ (10007fc0 <prvInitialiseTaskLists+0x5c>)
|
|
10007f9c: f7ff fa18 bl 100073d0 <vListInitialise>
|
|
10007fa0: 4b08 ldr r3, [pc, #32] @ (10007fc4 <prvInitialiseTaskLists+0x60>)
|
|
10007fa2: 601d str r5, [r3, #0]
|
|
10007fa4: 4b08 ldr r3, [pc, #32] @ (10007fc8 <prvInitialiseTaskLists+0x64>)
|
|
10007fa6: 601c str r4, [r3, #0]
|
|
10007fa8: bd70 pop {r4, r5, r6, pc}
|
|
10007faa: 46c0 nop @ (mov r8, r8)
|
|
10007fac: 20001750 .word 0x20001750
|
|
10007fb0: 20021c54 .word 0x20021c54
|
|
10007fb4: 20021c68 .word 0x20021c68
|
|
10007fb8: 20021ca4 .word 0x20021ca4
|
|
10007fbc: 20021d18 .word 0x20021d18
|
|
10007fc0: 20021d04 .word 0x20021d04
|
|
10007fc4: 20001740 .word 0x20001740
|
|
10007fc8: 20001748 .word 0x20001748
|
|
|
|
10007fcc <prvAddNewTaskToReadyList>:
|
|
10007fcc: b510 push {r4, lr}
|
|
10007fce: 0004 movs r4, r0
|
|
10007fd0: f7fe fefe bl 10006dd0 <vPortEnterCritical>
|
|
10007fd4: 4a28 ldr r2, [pc, #160] @ (10008078 <prvAddNewTaskToReadyList+0xac>)
|
|
10007fd6: 6813 ldr r3, [r2, #0]
|
|
10007fd8: 3301 adds r3, #1
|
|
10007fda: 6013 str r3, [r2, #0]
|
|
10007fdc: 4b27 ldr r3, [pc, #156] @ (1000807c <prvAddNewTaskToReadyList+0xb0>)
|
|
10007fde: 681b ldr r3, [r3, #0]
|
|
10007fe0: 2b00 cmp r3, #0
|
|
10007fe2: d00c beq.n 10007ffe <prvAddNewTaskToReadyList+0x32>
|
|
10007fe4: 4b26 ldr r3, [pc, #152] @ (10008080 <prvAddNewTaskToReadyList+0xb4>)
|
|
10007fe6: 681b ldr r3, [r3, #0]
|
|
10007fe8: 2b00 cmp r3, #0
|
|
10007fea: d10d bne.n 10008008 <prvAddNewTaskToReadyList+0x3c>
|
|
10007fec: 4b23 ldr r3, [pc, #140] @ (1000807c <prvAddNewTaskToReadyList+0xb0>)
|
|
10007fee: 681b ldr r3, [r3, #0]
|
|
10007ff0: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
10007ff2: 6ae3 ldr r3, [r4, #44] @ 0x2c
|
|
10007ff4: 429a cmp r2, r3
|
|
10007ff6: d807 bhi.n 10008008 <prvAddNewTaskToReadyList+0x3c>
|
|
10007ff8: 4b20 ldr r3, [pc, #128] @ (1000807c <prvAddNewTaskToReadyList+0xb0>)
|
|
10007ffa: 601c str r4, [r3, #0]
|
|
10007ffc: e004 b.n 10008008 <prvAddNewTaskToReadyList+0x3c>
|
|
10007ffe: 4b1f ldr r3, [pc, #124] @ (1000807c <prvAddNewTaskToReadyList+0xb0>)
|
|
10008000: 601c str r4, [r3, #0]
|
|
10008002: 6813 ldr r3, [r2, #0]
|
|
10008004: 2b01 cmp r3, #1
|
|
10008006: d031 beq.n 1000806c <prvAddNewTaskToReadyList+0xa0>
|
|
10008008: 4a1e ldr r2, [pc, #120] @ (10008084 <prvAddNewTaskToReadyList+0xb8>)
|
|
1000800a: 6813 ldr r3, [r2, #0]
|
|
1000800c: 3301 adds r3, #1
|
|
1000800e: 6013 str r3, [r2, #0]
|
|
10008010: 6463 str r3, [r4, #68] @ 0x44
|
|
10008012: 6ae1 ldr r1, [r4, #44] @ 0x2c
|
|
10008014: 4b1c ldr r3, [pc, #112] @ (10008088 <prvAddNewTaskToReadyList+0xbc>)
|
|
10008016: 681b ldr r3, [r3, #0]
|
|
10008018: 4299 cmp r1, r3
|
|
1000801a: d901 bls.n 10008020 <prvAddNewTaskToReadyList+0x54>
|
|
1000801c: 4b1a ldr r3, [pc, #104] @ (10008088 <prvAddNewTaskToReadyList+0xbc>)
|
|
1000801e: 6019 str r1, [r3, #0]
|
|
10008020: 4a1a ldr r2, [pc, #104] @ (1000808c <prvAddNewTaskToReadyList+0xc0>)
|
|
10008022: 008b lsls r3, r1, #2
|
|
10008024: 185b adds r3, r3, r1
|
|
10008026: 009b lsls r3, r3, #2
|
|
10008028: 18d3 adds r3, r2, r3
|
|
1000802a: 685b ldr r3, [r3, #4]
|
|
1000802c: 60a3 str r3, [r4, #8]
|
|
1000802e: 6898 ldr r0, [r3, #8]
|
|
10008030: 60e0 str r0, [r4, #12]
|
|
10008032: 1d21 adds r1, r4, #4
|
|
10008034: 6041 str r1, [r0, #4]
|
|
10008036: 6099 str r1, [r3, #8]
|
|
10008038: 6ae0 ldr r0, [r4, #44] @ 0x2c
|
|
1000803a: 0083 lsls r3, r0, #2
|
|
1000803c: 1819 adds r1, r3, r0
|
|
1000803e: 0089 lsls r1, r1, #2
|
|
10008040: 1889 adds r1, r1, r2
|
|
10008042: 6161 str r1, [r4, #20]
|
|
10008044: 1819 adds r1, r3, r0
|
|
10008046: 0089 lsls r1, r1, #2
|
|
10008048: 5889 ldr r1, [r1, r2]
|
|
1000804a: 3101 adds r1, #1
|
|
1000804c: 181b adds r3, r3, r0
|
|
1000804e: 009b lsls r3, r3, #2
|
|
10008050: 5099 str r1, [r3, r2]
|
|
10008052: f7fe fedd bl 10006e10 <vPortExitCritical>
|
|
10008056: 4b0a ldr r3, [pc, #40] @ (10008080 <prvAddNewTaskToReadyList+0xb4>)
|
|
10008058: 681b ldr r3, [r3, #0]
|
|
1000805a: 2b00 cmp r3, #0
|
|
1000805c: d005 beq.n 1000806a <prvAddNewTaskToReadyList+0x9e>
|
|
1000805e: 4b07 ldr r3, [pc, #28] @ (1000807c <prvAddNewTaskToReadyList+0xb0>)
|
|
10008060: 681b ldr r3, [r3, #0]
|
|
10008062: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
10008064: 6ae3 ldr r3, [r4, #44] @ 0x2c
|
|
10008066: 429a cmp r2, r3
|
|
10008068: d303 bcc.n 10008072 <prvAddNewTaskToReadyList+0xa6>
|
|
1000806a: bd10 pop {r4, pc}
|
|
1000806c: f7ff ff7a bl 10007f64 <prvInitialiseTaskLists>
|
|
10008070: e7ca b.n 10008008 <prvAddNewTaskToReadyList+0x3c>
|
|
10008072: f7fe fe8d bl 10006d90 <vPortYield>
|
|
10008076: e7f8 b.n 1000806a <prvAddNewTaskToReadyList+0x9e>
|
|
10008078: 20021c18 .word 0x20021c18
|
|
1000807c: 20001738 .word 0x20001738
|
|
10008080: 20021cf8 .word 0x20021cf8
|
|
10008084: 20021c24 .word 0x20021c24
|
|
10008088: 20021c28 .word 0x20021c28
|
|
1000808c: 20001750 .word 0x20001750
|
|
|
|
10008090 <prvCheckTasksWaitingTermination>:
|
|
10008090: b510 push {r4, lr}
|
|
10008092: e014 b.n 100080be <prvCheckTasksWaitingTermination+0x2e>
|
|
10008094: f7fe fe9c bl 10006dd0 <vPortEnterCritical>
|
|
10008098: 4b0b ldr r3, [pc, #44] @ (100080c8 <prvCheckTasksWaitingTermination+0x38>)
|
|
1000809a: 68db ldr r3, [r3, #12]
|
|
1000809c: 68dc ldr r4, [r3, #12]
|
|
1000809e: 1d20 adds r0, r4, #4
|
|
100080a0: f7ff f9bb bl 1000741a <uxListRemove>
|
|
100080a4: 4a09 ldr r2, [pc, #36] @ (100080cc <prvCheckTasksWaitingTermination+0x3c>)
|
|
100080a6: 6813 ldr r3, [r2, #0]
|
|
100080a8: 3b01 subs r3, #1
|
|
100080aa: 6013 str r3, [r2, #0]
|
|
100080ac: 4a08 ldr r2, [pc, #32] @ (100080d0 <prvCheckTasksWaitingTermination+0x40>)
|
|
100080ae: 6813 ldr r3, [r2, #0]
|
|
100080b0: 3b01 subs r3, #1
|
|
100080b2: 6013 str r3, [r2, #0]
|
|
100080b4: f7fe feac bl 10006e10 <vPortExitCritical>
|
|
100080b8: 0020 movs r0, r4
|
|
100080ba: f7ff fef1 bl 10007ea0 <prvDeleteTCB>
|
|
100080be: 4b04 ldr r3, [pc, #16] @ (100080d0 <prvCheckTasksWaitingTermination+0x40>)
|
|
100080c0: 681b ldr r3, [r3, #0]
|
|
100080c2: 2b00 cmp r3, #0
|
|
100080c4: d1e6 bne.n 10008094 <prvCheckTasksWaitingTermination+0x4>
|
|
100080c6: bd10 pop {r4, pc}
|
|
100080c8: 20021d18 .word 0x20021d18
|
|
100080cc: 20021c18 .word 0x20021c18
|
|
100080d0: 20021c1c .word 0x20021c1c
|
|
|
|
100080d4 <prvIdleTask>:
|
|
100080d4: b510 push {r4, lr}
|
|
100080d6: f7ff ffdb bl 10008090 <prvCheckTasksWaitingTermination>
|
|
100080da: 4b03 ldr r3, [pc, #12] @ (100080e8 <prvIdleTask+0x14>)
|
|
100080dc: 681b ldr r3, [r3, #0]
|
|
100080de: 2b01 cmp r3, #1
|
|
100080e0: d9f9 bls.n 100080d6 <prvIdleTask+0x2>
|
|
100080e2: f7fe fe55 bl 10006d90 <vPortYield>
|
|
100080e6: e7f6 b.n 100080d6 <prvIdleTask+0x2>
|
|
100080e8: 20001750 .word 0x20001750
|
|
|
|
100080ec <prvAddCurrentTaskToDelayedList>:
|
|
100080ec: b570 push {r4, r5, r6, lr}
|
|
100080ee: 0004 movs r4, r0
|
|
100080f0: 000d movs r5, r1
|
|
100080f2: 4b1f ldr r3, [pc, #124] @ (10008170 <prvAddCurrentTaskToDelayedList+0x84>)
|
|
100080f4: 681e ldr r6, [r3, #0]
|
|
100080f6: 4b1f ldr r3, [pc, #124] @ (10008174 <prvAddCurrentTaskToDelayedList+0x88>)
|
|
100080f8: 6819 ldr r1, [r3, #0]
|
|
100080fa: 226d movs r2, #109 @ 0x6d
|
|
100080fc: 2000 movs r0, #0
|
|
100080fe: 5488 strb r0, [r1, r2]
|
|
10008100: 6818 ldr r0, [r3, #0]
|
|
10008102: 3004 adds r0, #4
|
|
10008104: f7ff f989 bl 1000741a <uxListRemove>
|
|
10008108: 1c63 adds r3, r4, #1
|
|
1000810a: d00d beq.n 10008128 <prvAddCurrentTaskToDelayedList+0x3c>
|
|
1000810c: 1934 adds r4, r6, r4
|
|
1000810e: 4b19 ldr r3, [pc, #100] @ (10008174 <prvAddCurrentTaskToDelayedList+0x88>)
|
|
10008110: 681b ldr r3, [r3, #0]
|
|
10008112: 605c str r4, [r3, #4]
|
|
10008114: 42a6 cmp r6, r4
|
|
10008116: d91d bls.n 10008154 <prvAddCurrentTaskToDelayedList+0x68>
|
|
10008118: 4b17 ldr r3, [pc, #92] @ (10008178 <prvAddCurrentTaskToDelayedList+0x8c>)
|
|
1000811a: 6818 ldr r0, [r3, #0]
|
|
1000811c: 4b15 ldr r3, [pc, #84] @ (10008174 <prvAddCurrentTaskToDelayedList+0x88>)
|
|
1000811e: 6819 ldr r1, [r3, #0]
|
|
10008120: 3104 adds r1, #4
|
|
10008122: f7ff f963 bl 100073ec <vListInsert>
|
|
10008126: bd70 pop {r4, r5, r6, pc}
|
|
10008128: 2d00 cmp r5, #0
|
|
1000812a: d0ef beq.n 1000810c <prvAddCurrentTaskToDelayedList+0x20>
|
|
1000812c: 4a13 ldr r2, [pc, #76] @ (1000817c <prvAddCurrentTaskToDelayedList+0x90>)
|
|
1000812e: 6851 ldr r1, [r2, #4]
|
|
10008130: 4b10 ldr r3, [pc, #64] @ (10008174 <prvAddCurrentTaskToDelayedList+0x88>)
|
|
10008132: 6818 ldr r0, [r3, #0]
|
|
10008134: 6081 str r1, [r0, #8]
|
|
10008136: 6818 ldr r0, [r3, #0]
|
|
10008138: 688c ldr r4, [r1, #8]
|
|
1000813a: 60c4 str r4, [r0, #12]
|
|
1000813c: 6818 ldr r0, [r3, #0]
|
|
1000813e: 3004 adds r0, #4
|
|
10008140: 6060 str r0, [r4, #4]
|
|
10008142: 6818 ldr r0, [r3, #0]
|
|
10008144: 3004 adds r0, #4
|
|
10008146: 6088 str r0, [r1, #8]
|
|
10008148: 681b ldr r3, [r3, #0]
|
|
1000814a: 615a str r2, [r3, #20]
|
|
1000814c: 6813 ldr r3, [r2, #0]
|
|
1000814e: 3301 adds r3, #1
|
|
10008150: 6013 str r3, [r2, #0]
|
|
10008152: e7e8 b.n 10008126 <prvAddCurrentTaskToDelayedList+0x3a>
|
|
10008154: 4b0a ldr r3, [pc, #40] @ (10008180 <prvAddCurrentTaskToDelayedList+0x94>)
|
|
10008156: 6818 ldr r0, [r3, #0]
|
|
10008158: 4b06 ldr r3, [pc, #24] @ (10008174 <prvAddCurrentTaskToDelayedList+0x88>)
|
|
1000815a: 6819 ldr r1, [r3, #0]
|
|
1000815c: 3104 adds r1, #4
|
|
1000815e: f7ff f945 bl 100073ec <vListInsert>
|
|
10008162: 4b08 ldr r3, [pc, #32] @ (10008184 <prvAddCurrentTaskToDelayedList+0x98>)
|
|
10008164: 681b ldr r3, [r3, #0]
|
|
10008166: 42a3 cmp r3, r4
|
|
10008168: d9dd bls.n 10008126 <prvAddCurrentTaskToDelayedList+0x3a>
|
|
1000816a: 4b06 ldr r3, [pc, #24] @ (10008184 <prvAddCurrentTaskToDelayedList+0x98>)
|
|
1000816c: 601c str r4, [r3, #0]
|
|
1000816e: e7da b.n 10008126 <prvAddCurrentTaskToDelayedList+0x3a>
|
|
10008170: 20021d2c .word 0x20021d2c
|
|
10008174: 20001738 .word 0x20001738
|
|
10008178: 20001748 .word 0x20001748
|
|
1000817c: 20021d04 .word 0x20021d04
|
|
10008180: 20001740 .word 0x20001740
|
|
10008184: 20021c90 .word 0x20021c90
|
|
|
|
10008188 <xTaskCreate>:
|
|
10008188: b5f0 push {r4, r5, r6, r7, lr}
|
|
1000818a: b087 sub sp, #28
|
|
1000818c: 9004 str r0, [sp, #16]
|
|
1000818e: 9105 str r1, [sp, #20]
|
|
10008190: 0016 movs r6, r2
|
|
10008192: 001f movs r7, r3
|
|
10008194: 0090 lsls r0, r2, #2
|
|
10008196: f7fe fc69 bl 10006a6c <pvPortMalloc>
|
|
1000819a: 1e04 subs r4, r0, #0
|
|
1000819c: d021 beq.n 100081e2 <xTaskCreate+0x5a>
|
|
1000819e: 2070 movs r0, #112 @ 0x70
|
|
100081a0: f7fe fc64 bl 10006a6c <pvPortMalloc>
|
|
100081a4: 1e05 subs r5, r0, #0
|
|
100081a6: d016 beq.n 100081d6 <xTaskCreate+0x4e>
|
|
100081a8: 2270 movs r2, #112 @ 0x70
|
|
100081aa: 2100 movs r1, #0
|
|
100081ac: f7fb ffb0 bl 10004110 <__wrap_memset>
|
|
100081b0: 632c str r4, [r5, #48] @ 0x30
|
|
100081b2: 2300 movs r3, #0
|
|
100081b4: 9303 str r3, [sp, #12]
|
|
100081b6: 9502 str r5, [sp, #8]
|
|
100081b8: 9b0d ldr r3, [sp, #52] @ 0x34
|
|
100081ba: 9301 str r3, [sp, #4]
|
|
100081bc: 9b0c ldr r3, [sp, #48] @ 0x30
|
|
100081be: 9300 str r3, [sp, #0]
|
|
100081c0: 003b movs r3, r7
|
|
100081c2: 0032 movs r2, r6
|
|
100081c4: 9905 ldr r1, [sp, #20]
|
|
100081c6: 9804 ldr r0, [sp, #16]
|
|
100081c8: f7ff fe74 bl 10007eb4 <prvInitialiseNewTask>
|
|
100081cc: 0028 movs r0, r5
|
|
100081ce: f7ff fefd bl 10007fcc <prvAddNewTaskToReadyList>
|
|
100081d2: 2001 movs r0, #1
|
|
100081d4: e007 b.n 100081e6 <xTaskCreate+0x5e>
|
|
100081d6: 0020 movs r0, r4
|
|
100081d8: f7fe fcd0 bl 10006b7c <vPortFree>
|
|
100081dc: 2001 movs r0, #1
|
|
100081de: 4240 negs r0, r0
|
|
100081e0: e001 b.n 100081e6 <xTaskCreate+0x5e>
|
|
100081e2: 2001 movs r0, #1
|
|
100081e4: 4240 negs r0, r0
|
|
100081e6: b007 add sp, #28
|
|
100081e8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
...
|
|
|
|
100081ec <vTaskStartScheduler>:
|
|
100081ec: b500 push {lr}
|
|
100081ee: b083 sub sp, #12
|
|
100081f0: 2280 movs r2, #128 @ 0x80
|
|
100081f2: 4915 ldr r1, [pc, #84] @ (10008248 <vTaskStartScheduler+0x5c>)
|
|
100081f4: 4815 ldr r0, [pc, #84] @ (1000824c <vTaskStartScheduler+0x60>)
|
|
100081f6: 4b16 ldr r3, [pc, #88] @ (10008250 <vTaskStartScheduler+0x64>)
|
|
100081f8: 9301 str r3, [sp, #4]
|
|
100081fa: 2300 movs r3, #0
|
|
100081fc: 9300 str r3, [sp, #0]
|
|
100081fe: 0052 lsls r2, r2, #1
|
|
10008200: f7ff ffc2 bl 10008188 <xTaskCreate>
|
|
10008204: 2801 cmp r0, #1
|
|
10008206: d005 beq.n 10008214 <vTaskStartScheduler+0x28>
|
|
10008208: 3001 adds r0, #1
|
|
1000820a: d015 beq.n 10008238 <vTaskStartScheduler+0x4c>
|
|
1000820c: 4b11 ldr r3, [pc, #68] @ (10008254 <vTaskStartScheduler+0x68>)
|
|
1000820e: 681b ldr r3, [r3, #0]
|
|
10008210: b003 add sp, #12
|
|
10008212: bd00 pop {pc}
|
|
10008214: f000 fef4 bl 10009000 <xTimerCreateTimerTask>
|
|
10008218: 2801 cmp r0, #1
|
|
1000821a: d1f5 bne.n 10008208 <vTaskStartScheduler+0x1c>
|
|
1000821c: b672 cpsid i
|
|
1000821e: 4b0e ldr r3, [pc, #56] @ (10008258 <vTaskStartScheduler+0x6c>)
|
|
10008220: 2201 movs r2, #1
|
|
10008222: 4252 negs r2, r2
|
|
10008224: 601a str r2, [r3, #0]
|
|
10008226: 4b0d ldr r3, [pc, #52] @ (1000825c <vTaskStartScheduler+0x70>)
|
|
10008228: 3202 adds r2, #2
|
|
1000822a: 601a str r2, [r3, #0]
|
|
1000822c: 4b0c ldr r3, [pc, #48] @ (10008260 <vTaskStartScheduler+0x74>)
|
|
1000822e: 2200 movs r2, #0
|
|
10008230: 601a str r2, [r3, #0]
|
|
10008232: f7fe fe3f bl 10006eb4 <xPortStartScheduler>
|
|
10008236: e7e9 b.n 1000820c <vTaskStartScheduler+0x20>
|
|
10008238: 4b0a ldr r3, [pc, #40] @ (10008264 <vTaskStartScheduler+0x78>)
|
|
1000823a: 4a0b ldr r2, [pc, #44] @ (10008268 <vTaskStartScheduler+0x7c>)
|
|
1000823c: 2182 movs r1, #130 @ 0x82
|
|
1000823e: 480b ldr r0, [pc, #44] @ (1000826c <vTaskStartScheduler+0x80>)
|
|
10008240: 0109 lsls r1, r1, #4
|
|
10008242: f7fa f91f bl 10002484 <__assert_func>
|
|
10008246: 46c0 nop @ (mov r8, r8)
|
|
10008248: 1000afbc .word 0x1000afbc
|
|
1000824c: 100080d5 .word 0x100080d5
|
|
10008250: 20021c84 .word 0x20021c84
|
|
10008254: 20000bc0 .word 0x20000bc0
|
|
10008258: 20021c90 .word 0x20021c90
|
|
1000825c: 20021cf8 .word 0x20021cf8
|
|
10008260: 20021d2c .word 0x20021d2c
|
|
10008264: 1000afc4 .word 0x1000afc4
|
|
10008268: 1000b230 .word 0x1000b230
|
|
1000826c: 1000af50 .word 0x1000af50
|
|
|
|
10008270 <vTaskSuspendAll>:
|
|
10008270: 4a02 ldr r2, [pc, #8] @ (1000827c <vTaskSuspendAll+0xc>)
|
|
10008272: 6813 ldr r3, [r2, #0]
|
|
10008274: 3301 adds r3, #1
|
|
10008276: 6013 str r3, [r2, #0]
|
|
10008278: 4770 bx lr
|
|
1000827a: 46c0 nop @ (mov r8, r8)
|
|
1000827c: 20021c20 .word 0x20021c20
|
|
|
|
10008280 <xTaskGetTickCount>:
|
|
10008280: 4b01 ldr r3, [pc, #4] @ (10008288 <xTaskGetTickCount+0x8>)
|
|
10008282: 6818 ldr r0, [r3, #0]
|
|
10008284: 4770 bx lr
|
|
10008286: 46c0 nop @ (mov r8, r8)
|
|
10008288: 20021d2c .word 0x20021d2c
|
|
|
|
1000828c <uxTaskGetNumberOfTasks>:
|
|
1000828c: 4b01 ldr r3, [pc, #4] @ (10008294 <uxTaskGetNumberOfTasks+0x8>)
|
|
1000828e: 6818 ldr r0, [r3, #0]
|
|
10008290: 4770 bx lr
|
|
10008292: 46c0 nop @ (mov r8, r8)
|
|
10008294: 20021c18 .word 0x20021c18
|
|
|
|
10008298 <xTaskIncrementTick>:
|
|
10008298: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000829a: 4b4f ldr r3, [pc, #316] @ (100083d8 <xTaskIncrementTick+0x140>)
|
|
1000829c: 681b ldr r3, [r3, #0]
|
|
1000829e: 2b00 cmp r3, #0
|
|
100082a0: d000 beq.n 100082a4 <xTaskIncrementTick+0xc>
|
|
100082a2: e093 b.n 100083cc <xTaskIncrementTick+0x134>
|
|
100082a4: 4b4d ldr r3, [pc, #308] @ (100083dc <xTaskIncrementTick+0x144>)
|
|
100082a6: 681e ldr r6, [r3, #0]
|
|
100082a8: 3601 adds r6, #1
|
|
100082aa: 601e str r6, [r3, #0]
|
|
100082ac: 2e00 cmp r6, #0
|
|
100082ae: d110 bne.n 100082d2 <xTaskIncrementTick+0x3a>
|
|
100082b0: 4b4b ldr r3, [pc, #300] @ (100083e0 <xTaskIncrementTick+0x148>)
|
|
100082b2: 681b ldr r3, [r3, #0]
|
|
100082b4: 681b ldr r3, [r3, #0]
|
|
100082b6: 2b00 cmp r3, #0
|
|
100082b8: d121 bne.n 100082fe <xTaskIncrementTick+0x66>
|
|
100082ba: 4a49 ldr r2, [pc, #292] @ (100083e0 <xTaskIncrementTick+0x148>)
|
|
100082bc: 6811 ldr r1, [r2, #0]
|
|
100082be: 4b49 ldr r3, [pc, #292] @ (100083e4 <xTaskIncrementTick+0x14c>)
|
|
100082c0: 6818 ldr r0, [r3, #0]
|
|
100082c2: 6010 str r0, [r2, #0]
|
|
100082c4: 6019 str r1, [r3, #0]
|
|
100082c6: 4a48 ldr r2, [pc, #288] @ (100083e8 <xTaskIncrementTick+0x150>)
|
|
100082c8: 6813 ldr r3, [r2, #0]
|
|
100082ca: 3301 adds r3, #1
|
|
100082cc: 6013 str r3, [r2, #0]
|
|
100082ce: f7ff fdd1 bl 10007e74 <prvResetNextTaskUnblockTime>
|
|
100082d2: 4b46 ldr r3, [pc, #280] @ (100083ec <xTaskIncrementTick+0x154>)
|
|
100082d4: 681b ldr r3, [r3, #0]
|
|
100082d6: 42b3 cmp r3, r6
|
|
100082d8: d917 bls.n 1000830a <xTaskIncrementTick+0x72>
|
|
100082da: 2000 movs r0, #0
|
|
100082dc: 4b44 ldr r3, [pc, #272] @ (100083f0 <xTaskIncrementTick+0x158>)
|
|
100082de: 681b ldr r3, [r3, #0]
|
|
100082e0: 6ad9 ldr r1, [r3, #44] @ 0x2c
|
|
100082e2: 4a44 ldr r2, [pc, #272] @ (100083f4 <xTaskIncrementTick+0x15c>)
|
|
100082e4: 008b lsls r3, r1, #2
|
|
100082e6: 185b adds r3, r3, r1
|
|
100082e8: 0099 lsls r1, r3, #2
|
|
100082ea: 588b ldr r3, [r1, r2]
|
|
100082ec: 2b01 cmp r3, #1
|
|
100082ee: d900 bls.n 100082f2 <xTaskIncrementTick+0x5a>
|
|
100082f0: 2001 movs r0, #1
|
|
100082f2: 4b41 ldr r3, [pc, #260] @ (100083f8 <xTaskIncrementTick+0x160>)
|
|
100082f4: 681b ldr r3, [r3, #0]
|
|
100082f6: 2b00 cmp r3, #0
|
|
100082f8: d06d beq.n 100083d6 <xTaskIncrementTick+0x13e>
|
|
100082fa: 2001 movs r0, #1
|
|
100082fc: e06b b.n 100083d6 <xTaskIncrementTick+0x13e>
|
|
100082fe: 4b3f ldr r3, [pc, #252] @ (100083fc <xTaskIncrementTick+0x164>)
|
|
10008300: 4a3f ldr r2, [pc, #252] @ (10008400 <xTaskIncrementTick+0x168>)
|
|
10008302: 4840 ldr r0, [pc, #256] @ (10008404 <xTaskIncrementTick+0x16c>)
|
|
10008304: 4940 ldr r1, [pc, #256] @ (10008408 <xTaskIncrementTick+0x170>)
|
|
10008306: f7fa f8bd bl 10002484 <__assert_func>
|
|
1000830a: 2000 movs r0, #0
|
|
1000830c: e033 b.n 10008376 <xTaskIncrementTick+0xde>
|
|
1000830e: 4b37 ldr r3, [pc, #220] @ (100083ec <xTaskIncrementTick+0x154>)
|
|
10008310: 2201 movs r2, #1
|
|
10008312: 4252 negs r2, r2
|
|
10008314: 601a str r2, [r3, #0]
|
|
10008316: e7e1 b.n 100082dc <xTaskIncrementTick+0x44>
|
|
10008318: 4b34 ldr r3, [pc, #208] @ (100083ec <xTaskIncrementTick+0x154>)
|
|
1000831a: 601a str r2, [r3, #0]
|
|
1000831c: e7de b.n 100082dc <xTaskIncrementTick+0x44>
|
|
1000831e: 68d9 ldr r1, [r3, #12]
|
|
10008320: 6051 str r1, [r2, #4]
|
|
10008322: e03e b.n 100083a2 <xTaskIncrementTick+0x10a>
|
|
10008324: 2100 movs r1, #0
|
|
10008326: 6299 str r1, [r3, #40] @ 0x28
|
|
10008328: 6811 ldr r1, [r2, #0]
|
|
1000832a: 3901 subs r1, #1
|
|
1000832c: 6011 str r1, [r2, #0]
|
|
1000832e: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
10008330: 4936 ldr r1, [pc, #216] @ (1000840c <xTaskIncrementTick+0x174>)
|
|
10008332: 6809 ldr r1, [r1, #0]
|
|
10008334: 428a cmp r2, r1
|
|
10008336: d901 bls.n 1000833c <xTaskIncrementTick+0xa4>
|
|
10008338: 4934 ldr r1, [pc, #208] @ (1000840c <xTaskIncrementTick+0x174>)
|
|
1000833a: 600a str r2, [r1, #0]
|
|
1000833c: 492d ldr r1, [pc, #180] @ (100083f4 <xTaskIncrementTick+0x15c>)
|
|
1000833e: 0094 lsls r4, r2, #2
|
|
10008340: 18a4 adds r4, r4, r2
|
|
10008342: 00a2 lsls r2, r4, #2
|
|
10008344: 188a adds r2, r1, r2
|
|
10008346: 6852 ldr r2, [r2, #4]
|
|
10008348: 609a str r2, [r3, #8]
|
|
1000834a: 6894 ldr r4, [r2, #8]
|
|
1000834c: 60dc str r4, [r3, #12]
|
|
1000834e: 6065 str r5, [r4, #4]
|
|
10008350: 6095 str r5, [r2, #8]
|
|
10008352: 6adc ldr r4, [r3, #44] @ 0x2c
|
|
10008354: 00a2 lsls r2, r4, #2
|
|
10008356: 1917 adds r7, r2, r4
|
|
10008358: 00bd lsls r5, r7, #2
|
|
1000835a: 186d adds r5, r5, r1
|
|
1000835c: 615d str r5, [r3, #20]
|
|
1000835e: 00bd lsls r5, r7, #2
|
|
10008360: 586d ldr r5, [r5, r1]
|
|
10008362: 3501 adds r5, #1
|
|
10008364: 00bc lsls r4, r7, #2
|
|
10008366: 5065 str r5, [r4, r1]
|
|
10008368: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
1000836a: 4b21 ldr r3, [pc, #132] @ (100083f0 <xTaskIncrementTick+0x158>)
|
|
1000836c: 681b ldr r3, [r3, #0]
|
|
1000836e: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008370: 429a cmp r2, r3
|
|
10008372: d900 bls.n 10008376 <xTaskIncrementTick+0xde>
|
|
10008374: 2001 movs r0, #1
|
|
10008376: 4b1a ldr r3, [pc, #104] @ (100083e0 <xTaskIncrementTick+0x148>)
|
|
10008378: 681b ldr r3, [r3, #0]
|
|
1000837a: 681b ldr r3, [r3, #0]
|
|
1000837c: 2b00 cmp r3, #0
|
|
1000837e: d0c6 beq.n 1000830e <xTaskIncrementTick+0x76>
|
|
10008380: 4b17 ldr r3, [pc, #92] @ (100083e0 <xTaskIncrementTick+0x148>)
|
|
10008382: 681b ldr r3, [r3, #0]
|
|
10008384: 68db ldr r3, [r3, #12]
|
|
10008386: 68db ldr r3, [r3, #12]
|
|
10008388: 685a ldr r2, [r3, #4]
|
|
1000838a: 4296 cmp r6, r2
|
|
1000838c: d3c4 bcc.n 10008318 <xTaskIncrementTick+0x80>
|
|
1000838e: 695a ldr r2, [r3, #20]
|
|
10008390: 689c ldr r4, [r3, #8]
|
|
10008392: 68d9 ldr r1, [r3, #12]
|
|
10008394: 60a1 str r1, [r4, #8]
|
|
10008396: 689c ldr r4, [r3, #8]
|
|
10008398: 604c str r4, [r1, #4]
|
|
1000839a: 6851 ldr r1, [r2, #4]
|
|
1000839c: 1d1d adds r5, r3, #4
|
|
1000839e: 42a9 cmp r1, r5
|
|
100083a0: d0bd beq.n 1000831e <xTaskIncrementTick+0x86>
|
|
100083a2: 2100 movs r1, #0
|
|
100083a4: 6159 str r1, [r3, #20]
|
|
100083a6: 6811 ldr r1, [r2, #0]
|
|
100083a8: 3901 subs r1, #1
|
|
100083aa: 6011 str r1, [r2, #0]
|
|
100083ac: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
100083ae: 2a00 cmp r2, #0
|
|
100083b0: d0bd beq.n 1000832e <xTaskIncrementTick+0x96>
|
|
100083b2: 69dc ldr r4, [r3, #28]
|
|
100083b4: 6a19 ldr r1, [r3, #32]
|
|
100083b6: 60a1 str r1, [r4, #8]
|
|
100083b8: 69dc ldr r4, [r3, #28]
|
|
100083ba: 604c str r4, [r1, #4]
|
|
100083bc: 6854 ldr r4, [r2, #4]
|
|
100083be: 0019 movs r1, r3
|
|
100083c0: 3118 adds r1, #24
|
|
100083c2: 428c cmp r4, r1
|
|
100083c4: d1ae bne.n 10008324 <xTaskIncrementTick+0x8c>
|
|
100083c6: 6a19 ldr r1, [r3, #32]
|
|
100083c8: 6051 str r1, [r2, #4]
|
|
100083ca: e7ab b.n 10008324 <xTaskIncrementTick+0x8c>
|
|
100083cc: 4a10 ldr r2, [pc, #64] @ (10008410 <xTaskIncrementTick+0x178>)
|
|
100083ce: 6813 ldr r3, [r2, #0]
|
|
100083d0: 3301 adds r3, #1
|
|
100083d2: 6013 str r3, [r2, #0]
|
|
100083d4: 2000 movs r0, #0
|
|
100083d6: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100083d8: 20021c20 .word 0x20021c20
|
|
100083dc: 20021d2c .word 0x20021d2c
|
|
100083e0: 20001740 .word 0x20001740
|
|
100083e4: 20001748 .word 0x20001748
|
|
100083e8: 20021c94 .word 0x20021c94
|
|
100083ec: 20021c90 .word 0x20021c90
|
|
100083f0: 20001738 .word 0x20001738
|
|
100083f4: 20001750 .word 0x20001750
|
|
100083f8: 20021d38 .word 0x20021d38
|
|
100083fc: 1000afd8 .word 0x1000afd8
|
|
10008400: 1000b20c .word 0x1000b20c
|
|
10008404: 1000af50 .word 0x1000af50
|
|
10008408: 00000af4 .word 0x00000af4
|
|
1000840c: 20021c28 .word 0x20021c28
|
|
10008410: 20021ca0 .word 0x20021ca0
|
|
|
|
10008414 <xTaskResumeAll>:
|
|
10008414: b510 push {r4, lr}
|
|
10008416: 4b4a ldr r3, [pc, #296] @ (10008540 <xTaskResumeAll+0x12c>)
|
|
10008418: 681b ldr r3, [r3, #0]
|
|
1000841a: 2b00 cmp r3, #0
|
|
1000841c: d00f beq.n 1000843e <xTaskResumeAll+0x2a>
|
|
1000841e: f7fe fcd7 bl 10006dd0 <vPortEnterCritical>
|
|
10008422: 4b47 ldr r3, [pc, #284] @ (10008540 <xTaskResumeAll+0x12c>)
|
|
10008424: 681a ldr r2, [r3, #0]
|
|
10008426: 3a01 subs r2, #1
|
|
10008428: 601a str r2, [r3, #0]
|
|
1000842a: 681b ldr r3, [r3, #0]
|
|
1000842c: 2b00 cmp r3, #0
|
|
1000842e: d000 beq.n 10008432 <xTaskResumeAll+0x1e>
|
|
10008430: e080 b.n 10008534 <xTaskResumeAll+0x120>
|
|
10008432: 4b44 ldr r3, [pc, #272] @ (10008544 <xTaskResumeAll+0x130>)
|
|
10008434: 681b ldr r3, [r3, #0]
|
|
10008436: 2b00 cmp r3, #0
|
|
10008438: d10d bne.n 10008456 <xTaskResumeAll+0x42>
|
|
1000843a: 2400 movs r4, #0
|
|
1000843c: e07b b.n 10008536 <xTaskResumeAll+0x122>
|
|
1000843e: 4b42 ldr r3, [pc, #264] @ (10008548 <xTaskResumeAll+0x134>)
|
|
10008440: 4a42 ldr r2, [pc, #264] @ (1000854c <xTaskResumeAll+0x138>)
|
|
10008442: 4843 ldr r0, [pc, #268] @ (10008550 <xTaskResumeAll+0x13c>)
|
|
10008444: 4943 ldr r1, [pc, #268] @ (10008554 <xTaskResumeAll+0x140>)
|
|
10008446: f7fa f81d bl 10002484 <__assert_func>
|
|
1000844a: 6a19 ldr r1, [r3, #32]
|
|
1000844c: 6051 str r1, [r2, #4]
|
|
1000844e: e015 b.n 1000847c <xTaskResumeAll+0x68>
|
|
10008450: 68d9 ldr r1, [r3, #12]
|
|
10008452: 6051 str r1, [r2, #4]
|
|
10008454: e021 b.n 1000849a <xTaskResumeAll+0x86>
|
|
10008456: 2300 movs r3, #0
|
|
10008458: 4a3f ldr r2, [pc, #252] @ (10008558 <xTaskResumeAll+0x144>)
|
|
1000845a: 6812 ldr r2, [r2, #0]
|
|
1000845c: 2a00 cmp r2, #0
|
|
1000845e: d04a beq.n 100084f6 <xTaskResumeAll+0xe2>
|
|
10008460: 4b3d ldr r3, [pc, #244] @ (10008558 <xTaskResumeAll+0x144>)
|
|
10008462: 68db ldr r3, [r3, #12]
|
|
10008464: 68db ldr r3, [r3, #12]
|
|
10008466: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
10008468: 69d8 ldr r0, [r3, #28]
|
|
1000846a: 6a19 ldr r1, [r3, #32]
|
|
1000846c: 6081 str r1, [r0, #8]
|
|
1000846e: 69d8 ldr r0, [r3, #28]
|
|
10008470: 6048 str r0, [r1, #4]
|
|
10008472: 6850 ldr r0, [r2, #4]
|
|
10008474: 0019 movs r1, r3
|
|
10008476: 3118 adds r1, #24
|
|
10008478: 4288 cmp r0, r1
|
|
1000847a: d0e6 beq.n 1000844a <xTaskResumeAll+0x36>
|
|
1000847c: 2100 movs r1, #0
|
|
1000847e: 6299 str r1, [r3, #40] @ 0x28
|
|
10008480: 6811 ldr r1, [r2, #0]
|
|
10008482: 3901 subs r1, #1
|
|
10008484: 6011 str r1, [r2, #0]
|
|
10008486: 695a ldr r2, [r3, #20]
|
|
10008488: 6898 ldr r0, [r3, #8]
|
|
1000848a: 68d9 ldr r1, [r3, #12]
|
|
1000848c: 6081 str r1, [r0, #8]
|
|
1000848e: 6898 ldr r0, [r3, #8]
|
|
10008490: 6048 str r0, [r1, #4]
|
|
10008492: 6851 ldr r1, [r2, #4]
|
|
10008494: 1d1c adds r4, r3, #4
|
|
10008496: 42a1 cmp r1, r4
|
|
10008498: d0da beq.n 10008450 <xTaskResumeAll+0x3c>
|
|
1000849a: 2100 movs r1, #0
|
|
1000849c: 6159 str r1, [r3, #20]
|
|
1000849e: 6811 ldr r1, [r2, #0]
|
|
100084a0: 3901 subs r1, #1
|
|
100084a2: 6011 str r1, [r2, #0]
|
|
100084a4: 6ad8 ldr r0, [r3, #44] @ 0x2c
|
|
100084a6: 4a2d ldr r2, [pc, #180] @ (1000855c <xTaskResumeAll+0x148>)
|
|
100084a8: 6812 ldr r2, [r2, #0]
|
|
100084aa: 4290 cmp r0, r2
|
|
100084ac: d901 bls.n 100084b2 <xTaskResumeAll+0x9e>
|
|
100084ae: 4a2b ldr r2, [pc, #172] @ (1000855c <xTaskResumeAll+0x148>)
|
|
100084b0: 6010 str r0, [r2, #0]
|
|
100084b2: 492b ldr r1, [pc, #172] @ (10008560 <xTaskResumeAll+0x14c>)
|
|
100084b4: 0082 lsls r2, r0, #2
|
|
100084b6: 1812 adds r2, r2, r0
|
|
100084b8: 0092 lsls r2, r2, #2
|
|
100084ba: 188a adds r2, r1, r2
|
|
100084bc: 6852 ldr r2, [r2, #4]
|
|
100084be: 609a str r2, [r3, #8]
|
|
100084c0: 6890 ldr r0, [r2, #8]
|
|
100084c2: 60d8 str r0, [r3, #12]
|
|
100084c4: 6044 str r4, [r0, #4]
|
|
100084c6: 6094 str r4, [r2, #8]
|
|
100084c8: 6adc ldr r4, [r3, #44] @ 0x2c
|
|
100084ca: 00a2 lsls r2, r4, #2
|
|
100084cc: 1910 adds r0, r2, r4
|
|
100084ce: 0080 lsls r0, r0, #2
|
|
100084d0: 1840 adds r0, r0, r1
|
|
100084d2: 6158 str r0, [r3, #20]
|
|
100084d4: 1910 adds r0, r2, r4
|
|
100084d6: 0080 lsls r0, r0, #2
|
|
100084d8: 5840 ldr r0, [r0, r1]
|
|
100084da: 3001 adds r0, #1
|
|
100084dc: 1912 adds r2, r2, r4
|
|
100084de: 0092 lsls r2, r2, #2
|
|
100084e0: 5050 str r0, [r2, r1]
|
|
100084e2: 6ad9 ldr r1, [r3, #44] @ 0x2c
|
|
100084e4: 4a1f ldr r2, [pc, #124] @ (10008564 <xTaskResumeAll+0x150>)
|
|
100084e6: 6812 ldr r2, [r2, #0]
|
|
100084e8: 6ad2 ldr r2, [r2, #44] @ 0x2c
|
|
100084ea: 4291 cmp r1, r2
|
|
100084ec: d9b4 bls.n 10008458 <xTaskResumeAll+0x44>
|
|
100084ee: 4a1e ldr r2, [pc, #120] @ (10008568 <xTaskResumeAll+0x154>)
|
|
100084f0: 2101 movs r1, #1
|
|
100084f2: 6011 str r1, [r2, #0]
|
|
100084f4: e7b0 b.n 10008458 <xTaskResumeAll+0x44>
|
|
100084f6: 2b00 cmp r3, #0
|
|
100084f8: d001 beq.n 100084fe <xTaskResumeAll+0xea>
|
|
100084fa: f7ff fcbb bl 10007e74 <prvResetNextTaskUnblockTime>
|
|
100084fe: 4b1b ldr r3, [pc, #108] @ (1000856c <xTaskResumeAll+0x158>)
|
|
10008500: 681c ldr r4, [r3, #0]
|
|
10008502: 2c00 cmp r4, #0
|
|
10008504: d10a bne.n 1000851c <xTaskResumeAll+0x108>
|
|
10008506: 4b18 ldr r3, [pc, #96] @ (10008568 <xTaskResumeAll+0x154>)
|
|
10008508: 681c ldr r4, [r3, #0]
|
|
1000850a: 2c00 cmp r4, #0
|
|
1000850c: d013 beq.n 10008536 <xTaskResumeAll+0x122>
|
|
1000850e: f7fe fc3f bl 10006d90 <vPortYield>
|
|
10008512: 2401 movs r4, #1
|
|
10008514: e00f b.n 10008536 <xTaskResumeAll+0x122>
|
|
10008516: 3c01 subs r4, #1
|
|
10008518: 2c00 cmp r4, #0
|
|
1000851a: d007 beq.n 1000852c <xTaskResumeAll+0x118>
|
|
1000851c: f7ff febc bl 10008298 <xTaskIncrementTick>
|
|
10008520: 2800 cmp r0, #0
|
|
10008522: d0f8 beq.n 10008516 <xTaskResumeAll+0x102>
|
|
10008524: 4b10 ldr r3, [pc, #64] @ (10008568 <xTaskResumeAll+0x154>)
|
|
10008526: 2201 movs r2, #1
|
|
10008528: 601a str r2, [r3, #0]
|
|
1000852a: e7f4 b.n 10008516 <xTaskResumeAll+0x102>
|
|
1000852c: 4b0f ldr r3, [pc, #60] @ (1000856c <xTaskResumeAll+0x158>)
|
|
1000852e: 2200 movs r2, #0
|
|
10008530: 601a str r2, [r3, #0]
|
|
10008532: e7e8 b.n 10008506 <xTaskResumeAll+0xf2>
|
|
10008534: 2400 movs r4, #0
|
|
10008536: f7fe fc6b bl 10006e10 <vPortExitCritical>
|
|
1000853a: 0020 movs r0, r4
|
|
1000853c: bd10 pop {r4, pc}
|
|
1000853e: 46c0 nop @ (mov r8, r8)
|
|
10008540: 20021c20 .word 0x20021c20
|
|
10008544: 20021c18 .word 0x20021c18
|
|
10008548: 1000b050 .word 0x1000b050
|
|
1000854c: 1000b220 .word 0x1000b220
|
|
10008550: 1000af50 .word 0x1000af50
|
|
10008554: 00000893 .word 0x00000893
|
|
10008558: 20021ca4 .word 0x20021ca4
|
|
1000855c: 20021c28 .word 0x20021c28
|
|
10008560: 20001750 .word 0x20001750
|
|
10008564: 20001738 .word 0x20001738
|
|
10008568: 20021d38 .word 0x20021d38
|
|
1000856c: 20021ca0 .word 0x20021ca0
|
|
|
|
10008570 <vTaskDelay>:
|
|
10008570: b510 push {r4, lr}
|
|
10008572: 1e04 subs r4, r0, #0
|
|
10008574: d00d beq.n 10008592 <vTaskDelay+0x22>
|
|
10008576: 4b0c ldr r3, [pc, #48] @ (100085a8 <vTaskDelay+0x38>)
|
|
10008578: 681b ldr r3, [r3, #0]
|
|
1000857a: 2b00 cmp r3, #0
|
|
1000857c: d10c bne.n 10008598 <vTaskDelay+0x28>
|
|
1000857e: f7ff fe77 bl 10008270 <vTaskSuspendAll>
|
|
10008582: 2100 movs r1, #0
|
|
10008584: 0020 movs r0, r4
|
|
10008586: f7ff fdb1 bl 100080ec <prvAddCurrentTaskToDelayedList>
|
|
1000858a: f7ff ff43 bl 10008414 <xTaskResumeAll>
|
|
1000858e: 2800 cmp r0, #0
|
|
10008590: d101 bne.n 10008596 <vTaskDelay+0x26>
|
|
10008592: f7fe fbfd bl 10006d90 <vPortYield>
|
|
10008596: bd10 pop {r4, pc}
|
|
10008598: 4b04 ldr r3, [pc, #16] @ (100085ac <vTaskDelay+0x3c>)
|
|
1000859a: 4a05 ldr r2, [pc, #20] @ (100085b0 <vTaskDelay+0x40>)
|
|
1000859c: 21a4 movs r1, #164 @ 0xa4
|
|
1000859e: 4805 ldr r0, [pc, #20] @ (100085b4 <vTaskDelay+0x44>)
|
|
100085a0: 00c9 lsls r1, r1, #3
|
|
100085a2: f7f9 ff6f bl 10002484 <__assert_func>
|
|
100085a6: 46c0 nop @ (mov r8, r8)
|
|
100085a8: 20021c20 .word 0x20021c20
|
|
100085ac: 1000af90 .word 0x1000af90
|
|
100085b0: 1000b244 .word 0x1000b244
|
|
100085b4: 1000af50 .word 0x1000af50
|
|
|
|
100085b8 <vTaskSwitchContext>:
|
|
100085b8: b510 push {r4, lr}
|
|
100085ba: 4b20 ldr r3, [pc, #128] @ (1000863c <vTaskSwitchContext+0x84>)
|
|
100085bc: 681b ldr r3, [r3, #0]
|
|
100085be: 2b00 cmp r3, #0
|
|
100085c0: d003 beq.n 100085ca <vTaskSwitchContext+0x12>
|
|
100085c2: 4b1f ldr r3, [pc, #124] @ (10008640 <vTaskSwitchContext+0x88>)
|
|
100085c4: 2201 movs r2, #1
|
|
100085c6: 601a str r2, [r3, #0]
|
|
100085c8: bd10 pop {r4, pc}
|
|
100085ca: 4b1d ldr r3, [pc, #116] @ (10008640 <vTaskSwitchContext+0x88>)
|
|
100085cc: 2200 movs r2, #0
|
|
100085ce: 601a str r2, [r3, #0]
|
|
100085d0: 4b1c ldr r3, [pc, #112] @ (10008644 <vTaskSwitchContext+0x8c>)
|
|
100085d2: 681b ldr r3, [r3, #0]
|
|
100085d4: 491c ldr r1, [pc, #112] @ (10008648 <vTaskSwitchContext+0x90>)
|
|
100085d6: 009a lsls r2, r3, #2
|
|
100085d8: 18d2 adds r2, r2, r3
|
|
100085da: 0090 lsls r0, r2, #2
|
|
100085dc: 5842 ldr r2, [r0, r1]
|
|
100085de: 2a00 cmp r2, #0
|
|
100085e0: d109 bne.n 100085f6 <vTaskSwitchContext+0x3e>
|
|
100085e2: 2b00 cmp r3, #0
|
|
100085e4: d001 beq.n 100085ea <vTaskSwitchContext+0x32>
|
|
100085e6: 3b01 subs r3, #1
|
|
100085e8: e7f4 b.n 100085d4 <vTaskSwitchContext+0x1c>
|
|
100085ea: 4b18 ldr r3, [pc, #96] @ (1000864c <vTaskSwitchContext+0x94>)
|
|
100085ec: 4a18 ldr r2, [pc, #96] @ (10008650 <vTaskSwitchContext+0x98>)
|
|
100085ee: 4819 ldr r0, [pc, #100] @ (10008654 <vTaskSwitchContext+0x9c>)
|
|
100085f0: 4919 ldr r1, [pc, #100] @ (10008658 <vTaskSwitchContext+0xa0>)
|
|
100085f2: f7f9 ff47 bl 10002484 <__assert_func>
|
|
100085f6: 0008 movs r0, r1
|
|
100085f8: 0099 lsls r1, r3, #2
|
|
100085fa: 18cc adds r4, r1, r3
|
|
100085fc: 00a2 lsls r2, r4, #2
|
|
100085fe: 1882 adds r2, r0, r2
|
|
10008600: 6854 ldr r4, [r2, #4]
|
|
10008602: 6864 ldr r4, [r4, #4]
|
|
10008604: 6054 str r4, [r2, #4]
|
|
10008606: 18c9 adds r1, r1, r3
|
|
10008608: 008a lsls r2, r1, #2
|
|
1000860a: 3208 adds r2, #8
|
|
1000860c: 1812 adds r2, r2, r0
|
|
1000860e: 4294 cmp r4, r2
|
|
10008610: d00b beq.n 1000862a <vTaskSwitchContext+0x72>
|
|
10008612: 4a0d ldr r2, [pc, #52] @ (10008648 <vTaskSwitchContext+0x90>)
|
|
10008614: 0099 lsls r1, r3, #2
|
|
10008616: 18c9 adds r1, r1, r3
|
|
10008618: 0088 lsls r0, r1, #2
|
|
1000861a: 1812 adds r2, r2, r0
|
|
1000861c: 6852 ldr r2, [r2, #4]
|
|
1000861e: 68d1 ldr r1, [r2, #12]
|
|
10008620: 4a0e ldr r2, [pc, #56] @ (1000865c <vTaskSwitchContext+0xa4>)
|
|
10008622: 6011 str r1, [r2, #0]
|
|
10008624: 4a07 ldr r2, [pc, #28] @ (10008644 <vTaskSwitchContext+0x8c>)
|
|
10008626: 6013 str r3, [r2, #0]
|
|
10008628: e7ce b.n 100085c8 <vTaskSwitchContext+0x10>
|
|
1000862a: 0002 movs r2, r0
|
|
1000862c: 0099 lsls r1, r3, #2
|
|
1000862e: 18c9 adds r1, r1, r3
|
|
10008630: 0088 lsls r0, r1, #2
|
|
10008632: 1812 adds r2, r2, r0
|
|
10008634: 68d1 ldr r1, [r2, #12]
|
|
10008636: 6051 str r1, [r2, #4]
|
|
10008638: e7eb b.n 10008612 <vTaskSwitchContext+0x5a>
|
|
1000863a: 46c0 nop @ (mov r8, r8)
|
|
1000863c: 20021c20 .word 0x20021c20
|
|
10008640: 20021d38 .word 0x20021d38
|
|
10008644: 20021c28 .word 0x20021c28
|
|
10008648: 20001750 .word 0x20001750
|
|
1000864c: 1000b07c .word 0x1000b07c
|
|
10008650: 1000b1f8 .word 0x1000b1f8
|
|
10008654: 1000af50 .word 0x1000af50
|
|
10008658: 00000c33 .word 0x00000c33
|
|
1000865c: 20001738 .word 0x20001738
|
|
|
|
10008660 <vTaskPlaceOnEventList>:
|
|
10008660: b510 push {r4, lr}
|
|
10008662: 000c movs r4, r1
|
|
10008664: 2800 cmp r0, #0
|
|
10008666: d009 beq.n 1000867c <vTaskPlaceOnEventList+0x1c>
|
|
10008668: 4b07 ldr r3, [pc, #28] @ (10008688 <vTaskPlaceOnEventList+0x28>)
|
|
1000866a: 6819 ldr r1, [r3, #0]
|
|
1000866c: 3118 adds r1, #24
|
|
1000866e: f7fe febd bl 100073ec <vListInsert>
|
|
10008672: 2101 movs r1, #1
|
|
10008674: 0020 movs r0, r4
|
|
10008676: f7ff fd39 bl 100080ec <prvAddCurrentTaskToDelayedList>
|
|
1000867a: bd10 pop {r4, pc}
|
|
1000867c: 4b03 ldr r3, [pc, #12] @ (1000868c <vTaskPlaceOnEventList+0x2c>)
|
|
1000867e: 4a04 ldr r2, [pc, #16] @ (10008690 <vTaskPlaceOnEventList+0x30>)
|
|
10008680: 4804 ldr r0, [pc, #16] @ (10008694 <vTaskPlaceOnEventList+0x34>)
|
|
10008682: 4905 ldr r1, [pc, #20] @ (10008698 <vTaskPlaceOnEventList+0x38>)
|
|
10008684: f7f9 fefe bl 10002484 <__assert_func>
|
|
10008688: 20001738 .word 0x20001738
|
|
1000868c: 1000b08c .word 0x1000b08c
|
|
10008690: 1000b1e0 .word 0x1000b1e0
|
|
10008694: 1000af50 .word 0x1000af50
|
|
10008698: 00000c4b .word 0x00000c4b
|
|
|
|
1000869c <vTaskPlaceOnUnorderedEventList>:
|
|
1000869c: b570 push {r4, r5, r6, lr}
|
|
1000869e: 0003 movs r3, r0
|
|
100086a0: 0010 movs r0, r2
|
|
100086a2: 2b00 cmp r3, #0
|
|
100086a4: d01e beq.n 100086e4 <vTaskPlaceOnUnorderedEventList+0x48>
|
|
100086a6: 4a15 ldr r2, [pc, #84] @ (100086fc <vTaskPlaceOnUnorderedEventList+0x60>)
|
|
100086a8: 6812 ldr r2, [r2, #0]
|
|
100086aa: 2a00 cmp r2, #0
|
|
100086ac: d020 beq.n 100086f0 <vTaskPlaceOnUnorderedEventList+0x54>
|
|
100086ae: 4c14 ldr r4, [pc, #80] @ (10008700 <vTaskPlaceOnUnorderedEventList+0x64>)
|
|
100086b0: 6825 ldr r5, [r4, #0]
|
|
100086b2: 2280 movs r2, #128 @ 0x80
|
|
100086b4: 0612 lsls r2, r2, #24
|
|
100086b6: 430a orrs r2, r1
|
|
100086b8: 61aa str r2, [r5, #24]
|
|
100086ba: 685a ldr r2, [r3, #4]
|
|
100086bc: 6821 ldr r1, [r4, #0]
|
|
100086be: 61ca str r2, [r1, #28]
|
|
100086c0: 6821 ldr r1, [r4, #0]
|
|
100086c2: 6895 ldr r5, [r2, #8]
|
|
100086c4: 620d str r5, [r1, #32]
|
|
100086c6: 6821 ldr r1, [r4, #0]
|
|
100086c8: 3118 adds r1, #24
|
|
100086ca: 6069 str r1, [r5, #4]
|
|
100086cc: 6821 ldr r1, [r4, #0]
|
|
100086ce: 3118 adds r1, #24
|
|
100086d0: 6091 str r1, [r2, #8]
|
|
100086d2: 6822 ldr r2, [r4, #0]
|
|
100086d4: 6293 str r3, [r2, #40] @ 0x28
|
|
100086d6: 681a ldr r2, [r3, #0]
|
|
100086d8: 3201 adds r2, #1
|
|
100086da: 601a str r2, [r3, #0]
|
|
100086dc: 2101 movs r1, #1
|
|
100086de: f7ff fd05 bl 100080ec <prvAddCurrentTaskToDelayedList>
|
|
100086e2: bd70 pop {r4, r5, r6, pc}
|
|
100086e4: 4b07 ldr r3, [pc, #28] @ (10008704 <vTaskPlaceOnUnorderedEventList+0x68>)
|
|
100086e6: 4a08 ldr r2, [pc, #32] @ (10008708 <vTaskPlaceOnUnorderedEventList+0x6c>)
|
|
100086e8: 4808 ldr r0, [pc, #32] @ (1000870c <vTaskPlaceOnUnorderedEventList+0x70>)
|
|
100086ea: 4909 ldr r1, [pc, #36] @ (10008710 <vTaskPlaceOnUnorderedEventList+0x74>)
|
|
100086ec: f7f9 feca bl 10002484 <__assert_func>
|
|
100086f0: 4b08 ldr r3, [pc, #32] @ (10008714 <vTaskPlaceOnUnorderedEventList+0x78>)
|
|
100086f2: 4a05 ldr r2, [pc, #20] @ (10008708 <vTaskPlaceOnUnorderedEventList+0x6c>)
|
|
100086f4: 4805 ldr r0, [pc, #20] @ (1000870c <vTaskPlaceOnUnorderedEventList+0x70>)
|
|
100086f6: 4908 ldr r1, [pc, #32] @ (10008718 <vTaskPlaceOnUnorderedEventList+0x7c>)
|
|
100086f8: f7f9 fec4 bl 10002484 <__assert_func>
|
|
100086fc: 20021c20 .word 0x20021c20
|
|
10008700: 20001738 .word 0x20001738
|
|
10008704: 1000b08c .word 0x1000b08c
|
|
10008708: 1000b1c0 .word 0x1000b1c0
|
|
1000870c: 1000af50 .word 0x1000af50
|
|
10008710: 00000c65 .word 0x00000c65
|
|
10008714: 1000b050 .word 0x1000b050
|
|
10008718: 00000c69 .word 0x00000c69
|
|
|
|
1000871c <vTaskPlaceOnEventListRestricted>:
|
|
1000871c: b570 push {r4, r5, r6, lr}
|
|
1000871e: 0003 movs r3, r0
|
|
10008720: 0008 movs r0, r1
|
|
10008722: 0011 movs r1, r2
|
|
10008724: 2b00 cmp r3, #0
|
|
10008726: d018 beq.n 1000875a <vTaskPlaceOnEventListRestricted+0x3e>
|
|
10008728: 685a ldr r2, [r3, #4]
|
|
1000872a: 4c0f ldr r4, [pc, #60] @ (10008768 <vTaskPlaceOnEventListRestricted+0x4c>)
|
|
1000872c: 6825 ldr r5, [r4, #0]
|
|
1000872e: 61ea str r2, [r5, #28]
|
|
10008730: 6825 ldr r5, [r4, #0]
|
|
10008732: 6896 ldr r6, [r2, #8]
|
|
10008734: 622e str r6, [r5, #32]
|
|
10008736: 6825 ldr r5, [r4, #0]
|
|
10008738: 3518 adds r5, #24
|
|
1000873a: 6075 str r5, [r6, #4]
|
|
1000873c: 6825 ldr r5, [r4, #0]
|
|
1000873e: 3518 adds r5, #24
|
|
10008740: 6095 str r5, [r2, #8]
|
|
10008742: 6822 ldr r2, [r4, #0]
|
|
10008744: 6293 str r3, [r2, #40] @ 0x28
|
|
10008746: 681a ldr r2, [r3, #0]
|
|
10008748: 3201 adds r2, #1
|
|
1000874a: 601a str r2, [r3, #0]
|
|
1000874c: 2900 cmp r1, #0
|
|
1000874e: d001 beq.n 10008754 <vTaskPlaceOnEventListRestricted+0x38>
|
|
10008750: 2001 movs r0, #1
|
|
10008752: 4240 negs r0, r0
|
|
10008754: f7ff fcca bl 100080ec <prvAddCurrentTaskToDelayedList>
|
|
10008758: bd70 pop {r4, r5, r6, pc}
|
|
1000875a: 4b04 ldr r3, [pc, #16] @ (1000876c <vTaskPlaceOnEventListRestricted+0x50>)
|
|
1000875c: 4a04 ldr r2, [pc, #16] @ (10008770 <vTaskPlaceOnEventListRestricted+0x54>)
|
|
1000875e: 4805 ldr r0, [pc, #20] @ (10008774 <vTaskPlaceOnEventListRestricted+0x58>)
|
|
10008760: 4905 ldr r1, [pc, #20] @ (10008778 <vTaskPlaceOnEventListRestricted+0x5c>)
|
|
10008762: f7f9 fe8f bl 10002484 <__assert_func>
|
|
10008766: 46c0 nop @ (mov r8, r8)
|
|
10008768: 20001738 .word 0x20001738
|
|
1000876c: 1000b08c .word 0x1000b08c
|
|
10008770: 1000b1a0 .word 0x1000b1a0
|
|
10008774: 1000af50 .word 0x1000af50
|
|
10008778: 00000c81 .word 0x00000c81
|
|
|
|
1000877c <xTaskRemoveFromEventList>:
|
|
1000877c: b510 push {r4, lr}
|
|
1000877e: 68c3 ldr r3, [r0, #12]
|
|
10008780: 68db ldr r3, [r3, #12]
|
|
10008782: 2b00 cmp r3, #0
|
|
10008784: d04c beq.n 10008820 <xTaskRemoveFromEventList+0xa4>
|
|
10008786: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
10008788: 69d8 ldr r0, [r3, #28]
|
|
1000878a: 6a19 ldr r1, [r3, #32]
|
|
1000878c: 6081 str r1, [r0, #8]
|
|
1000878e: 69d8 ldr r0, [r3, #28]
|
|
10008790: 6048 str r0, [r1, #4]
|
|
10008792: 6851 ldr r1, [r2, #4]
|
|
10008794: 0018 movs r0, r3
|
|
10008796: 3018 adds r0, #24
|
|
10008798: 4281 cmp r1, r0
|
|
1000879a: d047 beq.n 1000882c <xTaskRemoveFromEventList+0xb0>
|
|
1000879c: 2100 movs r1, #0
|
|
1000879e: 6299 str r1, [r3, #40] @ 0x28
|
|
100087a0: 6811 ldr r1, [r2, #0]
|
|
100087a2: 3901 subs r1, #1
|
|
100087a4: 6011 str r1, [r2, #0]
|
|
100087a6: 4a2b ldr r2, [pc, #172] @ (10008854 <xTaskRemoveFromEventList+0xd8>)
|
|
100087a8: 6812 ldr r2, [r2, #0]
|
|
100087aa: 2a00 cmp r2, #0
|
|
100087ac: d144 bne.n 10008838 <xTaskRemoveFromEventList+0xbc>
|
|
100087ae: 695a ldr r2, [r3, #20]
|
|
100087b0: 6898 ldr r0, [r3, #8]
|
|
100087b2: 68d9 ldr r1, [r3, #12]
|
|
100087b4: 6081 str r1, [r0, #8]
|
|
100087b6: 6898 ldr r0, [r3, #8]
|
|
100087b8: 6048 str r0, [r1, #4]
|
|
100087ba: 6851 ldr r1, [r2, #4]
|
|
100087bc: 1d1c adds r4, r3, #4
|
|
100087be: 42a1 cmp r1, r4
|
|
100087c0: d037 beq.n 10008832 <xTaskRemoveFromEventList+0xb6>
|
|
100087c2: 2100 movs r1, #0
|
|
100087c4: 6159 str r1, [r3, #20]
|
|
100087c6: 6811 ldr r1, [r2, #0]
|
|
100087c8: 3901 subs r1, #1
|
|
100087ca: 6011 str r1, [r2, #0]
|
|
100087cc: 6ad8 ldr r0, [r3, #44] @ 0x2c
|
|
100087ce: 4a22 ldr r2, [pc, #136] @ (10008858 <xTaskRemoveFromEventList+0xdc>)
|
|
100087d0: 6812 ldr r2, [r2, #0]
|
|
100087d2: 4290 cmp r0, r2
|
|
100087d4: d901 bls.n 100087da <xTaskRemoveFromEventList+0x5e>
|
|
100087d6: 4a20 ldr r2, [pc, #128] @ (10008858 <xTaskRemoveFromEventList+0xdc>)
|
|
100087d8: 6010 str r0, [r2, #0]
|
|
100087da: 4920 ldr r1, [pc, #128] @ (1000885c <xTaskRemoveFromEventList+0xe0>)
|
|
100087dc: 0082 lsls r2, r0, #2
|
|
100087de: 1812 adds r2, r2, r0
|
|
100087e0: 0092 lsls r2, r2, #2
|
|
100087e2: 188a adds r2, r1, r2
|
|
100087e4: 6852 ldr r2, [r2, #4]
|
|
100087e6: 609a str r2, [r3, #8]
|
|
100087e8: 6890 ldr r0, [r2, #8]
|
|
100087ea: 60d8 str r0, [r3, #12]
|
|
100087ec: 6044 str r4, [r0, #4]
|
|
100087ee: 6094 str r4, [r2, #8]
|
|
100087f0: 6adc ldr r4, [r3, #44] @ 0x2c
|
|
100087f2: 00a2 lsls r2, r4, #2
|
|
100087f4: 1910 adds r0, r2, r4
|
|
100087f6: 0080 lsls r0, r0, #2
|
|
100087f8: 1840 adds r0, r0, r1
|
|
100087fa: 6158 str r0, [r3, #20]
|
|
100087fc: 1910 adds r0, r2, r4
|
|
100087fe: 0080 lsls r0, r0, #2
|
|
10008800: 5840 ldr r0, [r0, r1]
|
|
10008802: 3001 adds r0, #1
|
|
10008804: 1912 adds r2, r2, r4
|
|
10008806: 0092 lsls r2, r2, #2
|
|
10008808: 5050 str r0, [r2, r1]
|
|
1000880a: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
1000880c: 4b14 ldr r3, [pc, #80] @ (10008860 <xTaskRemoveFromEventList+0xe4>)
|
|
1000880e: 681b ldr r3, [r3, #0]
|
|
10008810: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008812: 429a cmp r2, r3
|
|
10008814: d91c bls.n 10008850 <xTaskRemoveFromEventList+0xd4>
|
|
10008816: 4b13 ldr r3, [pc, #76] @ (10008864 <xTaskRemoveFromEventList+0xe8>)
|
|
10008818: 2201 movs r2, #1
|
|
1000881a: 601a str r2, [r3, #0]
|
|
1000881c: 2001 movs r0, #1
|
|
1000881e: e018 b.n 10008852 <xTaskRemoveFromEventList+0xd6>
|
|
10008820: 4b11 ldr r3, [pc, #68] @ (10008868 <xTaskRemoveFromEventList+0xec>)
|
|
10008822: 4a12 ldr r2, [pc, #72] @ (1000886c <xTaskRemoveFromEventList+0xf0>)
|
|
10008824: 4812 ldr r0, [pc, #72] @ (10008870 <xTaskRemoveFromEventList+0xf4>)
|
|
10008826: 4913 ldr r1, [pc, #76] @ (10008874 <xTaskRemoveFromEventList+0xf8>)
|
|
10008828: f7f9 fe2c bl 10002484 <__assert_func>
|
|
1000882c: 6a19 ldr r1, [r3, #32]
|
|
1000882e: 6051 str r1, [r2, #4]
|
|
10008830: e7b4 b.n 1000879c <xTaskRemoveFromEventList+0x20>
|
|
10008832: 68d9 ldr r1, [r3, #12]
|
|
10008834: 6051 str r1, [r2, #4]
|
|
10008836: e7c4 b.n 100087c2 <xTaskRemoveFromEventList+0x46>
|
|
10008838: 4a0f ldr r2, [pc, #60] @ (10008878 <xTaskRemoveFromEventList+0xfc>)
|
|
1000883a: 6851 ldr r1, [r2, #4]
|
|
1000883c: 61d9 str r1, [r3, #28]
|
|
1000883e: 688c ldr r4, [r1, #8]
|
|
10008840: 621c str r4, [r3, #32]
|
|
10008842: 6060 str r0, [r4, #4]
|
|
10008844: 6088 str r0, [r1, #8]
|
|
10008846: 629a str r2, [r3, #40] @ 0x28
|
|
10008848: 6811 ldr r1, [r2, #0]
|
|
1000884a: 3101 adds r1, #1
|
|
1000884c: 6011 str r1, [r2, #0]
|
|
1000884e: e7dc b.n 1000880a <xTaskRemoveFromEventList+0x8e>
|
|
10008850: 2000 movs r0, #0
|
|
10008852: bd10 pop {r4, pc}
|
|
10008854: 20021c20 .word 0x20021c20
|
|
10008858: 20021c28 .word 0x20021c28
|
|
1000885c: 20001750 .word 0x20001750
|
|
10008860: 20001738 .word 0x20001738
|
|
10008864: 20021d38 .word 0x20021d38
|
|
10008868: 1000b098 .word 0x1000b098
|
|
1000886c: 1000b184 .word 0x1000b184
|
|
10008870: 1000af50 .word 0x1000af50
|
|
10008874: 00000cb1 .word 0x00000cb1
|
|
10008878: 20021ca4 .word 0x20021ca4
|
|
|
|
1000887c <vTaskRemoveFromUnorderedEventList>:
|
|
1000887c: b510 push {r4, lr}
|
|
1000887e: 4b31 ldr r3, [pc, #196] @ (10008944 <vTaskRemoveFromUnorderedEventList+0xc8>)
|
|
10008880: 681b ldr r3, [r3, #0]
|
|
10008882: 2b00 cmp r3, #0
|
|
10008884: d04c beq.n 10008920 <vTaskRemoveFromUnorderedEventList+0xa4>
|
|
10008886: 2380 movs r3, #128 @ 0x80
|
|
10008888: 061b lsls r3, r3, #24
|
|
1000888a: 430b orrs r3, r1
|
|
1000888c: 6003 str r3, [r0, #0]
|
|
1000888e: 68c3 ldr r3, [r0, #12]
|
|
10008890: 2b00 cmp r3, #0
|
|
10008892: d04b beq.n 1000892c <vTaskRemoveFromUnorderedEventList+0xb0>
|
|
10008894: 6902 ldr r2, [r0, #16]
|
|
10008896: 6844 ldr r4, [r0, #4]
|
|
10008898: 6881 ldr r1, [r0, #8]
|
|
1000889a: 60a1 str r1, [r4, #8]
|
|
1000889c: 6844 ldr r4, [r0, #4]
|
|
1000889e: 604c str r4, [r1, #4]
|
|
100088a0: 6851 ldr r1, [r2, #4]
|
|
100088a2: 4281 cmp r1, r0
|
|
100088a4: d048 beq.n 10008938 <vTaskRemoveFromUnorderedEventList+0xbc>
|
|
100088a6: 2100 movs r1, #0
|
|
100088a8: 6101 str r1, [r0, #16]
|
|
100088aa: 6811 ldr r1, [r2, #0]
|
|
100088ac: 3901 subs r1, #1
|
|
100088ae: 6011 str r1, [r2, #0]
|
|
100088b0: 695a ldr r2, [r3, #20]
|
|
100088b2: 6898 ldr r0, [r3, #8]
|
|
100088b4: 68d9 ldr r1, [r3, #12]
|
|
100088b6: 6081 str r1, [r0, #8]
|
|
100088b8: 6898 ldr r0, [r3, #8]
|
|
100088ba: 6048 str r0, [r1, #4]
|
|
100088bc: 6851 ldr r1, [r2, #4]
|
|
100088be: 1d1c adds r4, r3, #4
|
|
100088c0: 42a1 cmp r1, r4
|
|
100088c2: d03c beq.n 1000893e <vTaskRemoveFromUnorderedEventList+0xc2>
|
|
100088c4: 2100 movs r1, #0
|
|
100088c6: 6159 str r1, [r3, #20]
|
|
100088c8: 6811 ldr r1, [r2, #0]
|
|
100088ca: 3901 subs r1, #1
|
|
100088cc: 6011 str r1, [r2, #0]
|
|
100088ce: 6ad8 ldr r0, [r3, #44] @ 0x2c
|
|
100088d0: 4a1d ldr r2, [pc, #116] @ (10008948 <vTaskRemoveFromUnorderedEventList+0xcc>)
|
|
100088d2: 6812 ldr r2, [r2, #0]
|
|
100088d4: 4290 cmp r0, r2
|
|
100088d6: d901 bls.n 100088dc <vTaskRemoveFromUnorderedEventList+0x60>
|
|
100088d8: 4a1b ldr r2, [pc, #108] @ (10008948 <vTaskRemoveFromUnorderedEventList+0xcc>)
|
|
100088da: 6010 str r0, [r2, #0]
|
|
100088dc: 491b ldr r1, [pc, #108] @ (1000894c <vTaskRemoveFromUnorderedEventList+0xd0>)
|
|
100088de: 0082 lsls r2, r0, #2
|
|
100088e0: 1812 adds r2, r2, r0
|
|
100088e2: 0092 lsls r2, r2, #2
|
|
100088e4: 188a adds r2, r1, r2
|
|
100088e6: 6852 ldr r2, [r2, #4]
|
|
100088e8: 609a str r2, [r3, #8]
|
|
100088ea: 6890 ldr r0, [r2, #8]
|
|
100088ec: 60d8 str r0, [r3, #12]
|
|
100088ee: 6044 str r4, [r0, #4]
|
|
100088f0: 6094 str r4, [r2, #8]
|
|
100088f2: 6adc ldr r4, [r3, #44] @ 0x2c
|
|
100088f4: 00a2 lsls r2, r4, #2
|
|
100088f6: 1910 adds r0, r2, r4
|
|
100088f8: 0080 lsls r0, r0, #2
|
|
100088fa: 1840 adds r0, r0, r1
|
|
100088fc: 6158 str r0, [r3, #20]
|
|
100088fe: 1910 adds r0, r2, r4
|
|
10008900: 0080 lsls r0, r0, #2
|
|
10008902: 5840 ldr r0, [r0, r1]
|
|
10008904: 3001 adds r0, #1
|
|
10008906: 1912 adds r2, r2, r4
|
|
10008908: 0092 lsls r2, r2, #2
|
|
1000890a: 5050 str r0, [r2, r1]
|
|
1000890c: 6ada ldr r2, [r3, #44] @ 0x2c
|
|
1000890e: 4b10 ldr r3, [pc, #64] @ (10008950 <vTaskRemoveFromUnorderedEventList+0xd4>)
|
|
10008910: 681b ldr r3, [r3, #0]
|
|
10008912: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008914: 429a cmp r2, r3
|
|
10008916: d902 bls.n 1000891e <vTaskRemoveFromUnorderedEventList+0xa2>
|
|
10008918: 4b0e ldr r3, [pc, #56] @ (10008954 <vTaskRemoveFromUnorderedEventList+0xd8>)
|
|
1000891a: 2201 movs r2, #1
|
|
1000891c: 601a str r2, [r3, #0]
|
|
1000891e: bd10 pop {r4, pc}
|
|
10008920: 4b0d ldr r3, [pc, #52] @ (10008958 <vTaskRemoveFromUnorderedEventList+0xdc>)
|
|
10008922: 4a0e ldr r2, [pc, #56] @ (1000895c <vTaskRemoveFromUnorderedEventList+0xe0>)
|
|
10008924: 480e ldr r0, [pc, #56] @ (10008960 <vTaskRemoveFromUnorderedEventList+0xe4>)
|
|
10008926: 490f ldr r1, [pc, #60] @ (10008964 <vTaskRemoveFromUnorderedEventList+0xe8>)
|
|
10008928: f7f9 fdac bl 10002484 <__assert_func>
|
|
1000892c: 4b0e ldr r3, [pc, #56] @ (10008968 <vTaskRemoveFromUnorderedEventList+0xec>)
|
|
1000892e: 4a0b ldr r2, [pc, #44] @ (1000895c <vTaskRemoveFromUnorderedEventList+0xe0>)
|
|
10008930: 480b ldr r0, [pc, #44] @ (10008960 <vTaskRemoveFromUnorderedEventList+0xe4>)
|
|
10008932: 490e ldr r1, [pc, #56] @ (1000896c <vTaskRemoveFromUnorderedEventList+0xf0>)
|
|
10008934: f7f9 fda6 bl 10002484 <__assert_func>
|
|
10008938: 6881 ldr r1, [r0, #8]
|
|
1000893a: 6051 str r1, [r2, #4]
|
|
1000893c: e7b3 b.n 100088a6 <vTaskRemoveFromUnorderedEventList+0x2a>
|
|
1000893e: 68d9 ldr r1, [r3, #12]
|
|
10008940: 6051 str r1, [r2, #4]
|
|
10008942: e7bf b.n 100088c4 <vTaskRemoveFromUnorderedEventList+0x48>
|
|
10008944: 20021c20 .word 0x20021c20
|
|
10008948: 20021c28 .word 0x20021c28
|
|
1000894c: 20001750 .word 0x20001750
|
|
10008950: 20001738 .word 0x20001738
|
|
10008954: 20021d38 .word 0x20021d38
|
|
10008958: 1000b050 .word 0x1000b050
|
|
1000895c: 1000b160 .word 0x1000b160
|
|
10008960: 1000af50 .word 0x1000af50
|
|
10008964: 00000ce9 .word 0x00000ce9
|
|
10008968: 1000b098 .word 0x1000b098
|
|
1000896c: 00000cf1 .word 0x00000cf1
|
|
|
|
10008970 <vTaskInternalSetTimeOutState>:
|
|
10008970: 4b03 ldr r3, [pc, #12] @ (10008980 <vTaskInternalSetTimeOutState+0x10>)
|
|
10008972: 681b ldr r3, [r3, #0]
|
|
10008974: 6003 str r3, [r0, #0]
|
|
10008976: 4b03 ldr r3, [pc, #12] @ (10008984 <vTaskInternalSetTimeOutState+0x14>)
|
|
10008978: 681b ldr r3, [r3, #0]
|
|
1000897a: 6043 str r3, [r0, #4]
|
|
1000897c: 4770 bx lr
|
|
1000897e: 46c0 nop @ (mov r8, r8)
|
|
10008980: 20021c94 .word 0x20021c94
|
|
10008984: 20021d2c .word 0x20021d2c
|
|
|
|
10008988 <xTaskCheckForTimeOut>:
|
|
10008988: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
1000898a: 0004 movs r4, r0
|
|
1000898c: 000d movs r5, r1
|
|
1000898e: 2800 cmp r0, #0
|
|
10008990: d017 beq.n 100089c2 <xTaskCheckForTimeOut+0x3a>
|
|
10008992: 2900 cmp r1, #0
|
|
10008994: d01b beq.n 100089ce <xTaskCheckForTimeOut+0x46>
|
|
10008996: f7fe fa1b bl 10006dd0 <vPortEnterCritical>
|
|
1000899a: 4b1f ldr r3, [pc, #124] @ (10008a18 <xTaskCheckForTimeOut+0x90>)
|
|
1000899c: 681a ldr r2, [r3, #0]
|
|
1000899e: 6863 ldr r3, [r4, #4]
|
|
100089a0: 1ad6 subs r6, r2, r3
|
|
100089a2: 491e ldr r1, [pc, #120] @ (10008a1c <xTaskCheckForTimeOut+0x94>)
|
|
100089a4: 6808 ldr r0, [r1, #0]
|
|
100089a6: 216d movs r1, #109 @ 0x6d
|
|
100089a8: 5c41 ldrb r1, [r0, r1]
|
|
100089aa: 2900 cmp r1, #0
|
|
100089ac: d015 beq.n 100089da <xTaskCheckForTimeOut+0x52>
|
|
100089ae: 4b1b ldr r3, [pc, #108] @ (10008a1c <xTaskCheckForTimeOut+0x94>)
|
|
100089b0: 681a ldr r2, [r3, #0]
|
|
100089b2: 236d movs r3, #109 @ 0x6d
|
|
100089b4: 2100 movs r1, #0
|
|
100089b6: 54d1 strb r1, [r2, r3]
|
|
100089b8: 2401 movs r4, #1
|
|
100089ba: f7fe fa29 bl 10006e10 <vPortExitCritical>
|
|
100089be: 0020 movs r0, r4
|
|
100089c0: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
100089c2: 4b17 ldr r3, [pc, #92] @ (10008a20 <xTaskCheckForTimeOut+0x98>)
|
|
100089c4: 4a17 ldr r2, [pc, #92] @ (10008a24 <xTaskCheckForTimeOut+0x9c>)
|
|
100089c6: 4818 ldr r0, [pc, #96] @ (10008a28 <xTaskCheckForTimeOut+0xa0>)
|
|
100089c8: 4918 ldr r1, [pc, #96] @ (10008a2c <xTaskCheckForTimeOut+0xa4>)
|
|
100089ca: f7f9 fd5b bl 10002484 <__assert_func>
|
|
100089ce: 4b18 ldr r3, [pc, #96] @ (10008a30 <xTaskCheckForTimeOut+0xa8>)
|
|
100089d0: 4a14 ldr r2, [pc, #80] @ (10008a24 <xTaskCheckForTimeOut+0x9c>)
|
|
100089d2: 4815 ldr r0, [pc, #84] @ (10008a28 <xTaskCheckForTimeOut+0xa0>)
|
|
100089d4: 4917 ldr r1, [pc, #92] @ (10008a34 <xTaskCheckForTimeOut+0xac>)
|
|
100089d6: f7f9 fd55 bl 10002484 <__assert_func>
|
|
100089da: 6829 ldr r1, [r5, #0]
|
|
100089dc: 1c48 adds r0, r1, #1
|
|
100089de: d018 beq.n 10008a12 <xTaskCheckForTimeOut+0x8a>
|
|
100089e0: 6827 ldr r7, [r4, #0]
|
|
100089e2: 4815 ldr r0, [pc, #84] @ (10008a38 <xTaskCheckForTimeOut+0xb0>)
|
|
100089e4: 6800 ldr r0, [r0, #0]
|
|
100089e6: 4287 cmp r7, r0
|
|
100089e8: d005 beq.n 100089f6 <xTaskCheckForTimeOut+0x6e>
|
|
100089ea: 4293 cmp r3, r2
|
|
100089ec: d803 bhi.n 100089f6 <xTaskCheckForTimeOut+0x6e>
|
|
100089ee: 2300 movs r3, #0
|
|
100089f0: 602b str r3, [r5, #0]
|
|
100089f2: 2401 movs r4, #1
|
|
100089f4: e7e1 b.n 100089ba <xTaskCheckForTimeOut+0x32>
|
|
100089f6: 42b1 cmp r1, r6
|
|
100089f8: d803 bhi.n 10008a02 <xTaskCheckForTimeOut+0x7a>
|
|
100089fa: 2300 movs r3, #0
|
|
100089fc: 602b str r3, [r5, #0]
|
|
100089fe: 2401 movs r4, #1
|
|
10008a00: e7db b.n 100089ba <xTaskCheckForTimeOut+0x32>
|
|
10008a02: 1a9b subs r3, r3, r2
|
|
10008a04: 185b adds r3, r3, r1
|
|
10008a06: 602b str r3, [r5, #0]
|
|
10008a08: 0020 movs r0, r4
|
|
10008a0a: f7ff ffb1 bl 10008970 <vTaskInternalSetTimeOutState>
|
|
10008a0e: 2400 movs r4, #0
|
|
10008a10: e7d3 b.n 100089ba <xTaskCheckForTimeOut+0x32>
|
|
10008a12: 2400 movs r4, #0
|
|
10008a14: e7d1 b.n 100089ba <xTaskCheckForTimeOut+0x32>
|
|
10008a16: 46c0 nop @ (mov r8, r8)
|
|
10008a18: 20021d2c .word 0x20021d2c
|
|
10008a1c: 20001738 .word 0x20001738
|
|
10008a20: 1000b0a8 .word 0x1000b0a8
|
|
10008a24: 1000b148 .word 0x1000b148
|
|
10008a28: 1000af50 .word 0x1000af50
|
|
10008a2c: 00000d2c .word 0x00000d2c
|
|
10008a30: 1000b0b4 .word 0x1000b0b4
|
|
10008a34: 00000d2d .word 0x00000d2d
|
|
10008a38: 20021c94 .word 0x20021c94
|
|
|
|
10008a3c <vTaskMissedYield>:
|
|
10008a3c: 4b01 ldr r3, [pc, #4] @ (10008a44 <vTaskMissedYield+0x8>)
|
|
10008a3e: 2201 movs r2, #1
|
|
10008a40: 601a str r2, [r3, #0]
|
|
10008a42: 4770 bx lr
|
|
10008a44: 20021d38 .word 0x20021d38
|
|
|
|
10008a48 <xTaskGetCurrentTaskHandle>:
|
|
10008a48: 4b01 ldr r3, [pc, #4] @ (10008a50 <xTaskGetCurrentTaskHandle+0x8>)
|
|
10008a4a: 6818 ldr r0, [r3, #0]
|
|
10008a4c: 4770 bx lr
|
|
10008a4e: 46c0 nop @ (mov r8, r8)
|
|
10008a50: 20001738 .word 0x20001738
|
|
|
|
10008a54 <xTaskGetSchedulerState>:
|
|
10008a54: 4b06 ldr r3, [pc, #24] @ (10008a70 <xTaskGetSchedulerState+0x1c>)
|
|
10008a56: 681b ldr r3, [r3, #0]
|
|
10008a58: 2b00 cmp r3, #0
|
|
10008a5a: d007 beq.n 10008a6c <xTaskGetSchedulerState+0x18>
|
|
10008a5c: 4b05 ldr r3, [pc, #20] @ (10008a74 <xTaskGetSchedulerState+0x20>)
|
|
10008a5e: 681b ldr r3, [r3, #0]
|
|
10008a60: 2b00 cmp r3, #0
|
|
10008a62: d001 beq.n 10008a68 <xTaskGetSchedulerState+0x14>
|
|
10008a64: 2000 movs r0, #0
|
|
10008a66: e002 b.n 10008a6e <xTaskGetSchedulerState+0x1a>
|
|
10008a68: 2002 movs r0, #2
|
|
10008a6a: e000 b.n 10008a6e <xTaskGetSchedulerState+0x1a>
|
|
10008a6c: 2001 movs r0, #1
|
|
10008a6e: 4770 bx lr
|
|
10008a70: 20021cf8 .word 0x20021cf8
|
|
10008a74: 20021c20 .word 0x20021c20
|
|
|
|
10008a78 <xTaskPriorityInherit>:
|
|
10008a78: b570 push {r4, r5, r6, lr}
|
|
10008a7a: 1e04 subs r4, r0, #0
|
|
10008a7c: d04c beq.n 10008b18 <xTaskPriorityInherit+0xa0>
|
|
10008a7e: 6ac2 ldr r2, [r0, #44] @ 0x2c
|
|
10008a80: 4b27 ldr r3, [pc, #156] @ (10008b20 <xTaskPriorityInherit+0xa8>)
|
|
10008a82: 681b ldr r3, [r3, #0]
|
|
10008a84: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008a86: 429a cmp r2, r3
|
|
10008a88: d23e bcs.n 10008b08 <xTaskPriorityInherit+0x90>
|
|
10008a8a: 6983 ldr r3, [r0, #24]
|
|
10008a8c: 2b00 cmp r3, #0
|
|
10008a8e: db05 blt.n 10008a9c <xTaskPriorityInherit+0x24>
|
|
10008a90: 4b23 ldr r3, [pc, #140] @ (10008b20 <xTaskPriorityInherit+0xa8>)
|
|
10008a92: 681b ldr r3, [r3, #0]
|
|
10008a94: 6ad9 ldr r1, [r3, #44] @ 0x2c
|
|
10008a96: 2320 movs r3, #32
|
|
10008a98: 1a5b subs r3, r3, r1
|
|
10008a9a: 6183 str r3, [r0, #24]
|
|
10008a9c: 6961 ldr r1, [r4, #20]
|
|
10008a9e: 0093 lsls r3, r2, #2
|
|
10008aa0: 189b adds r3, r3, r2
|
|
10008aa2: 009b lsls r3, r3, #2
|
|
10008aa4: 4a1f ldr r2, [pc, #124] @ (10008b24 <xTaskPriorityInherit+0xac>)
|
|
10008aa6: 189b adds r3, r3, r2
|
|
10008aa8: 4299 cmp r1, r3
|
|
10008aaa: d005 beq.n 10008ab8 <xTaskPriorityInherit+0x40>
|
|
10008aac: 4b1c ldr r3, [pc, #112] @ (10008b20 <xTaskPriorityInherit+0xa8>)
|
|
10008aae: 681b ldr r3, [r3, #0]
|
|
10008ab0: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008ab2: 62e3 str r3, [r4, #44] @ 0x2c
|
|
10008ab4: 2001 movs r0, #1
|
|
10008ab6: e030 b.n 10008b1a <xTaskPriorityInherit+0xa2>
|
|
10008ab8: 1d25 adds r5, r4, #4
|
|
10008aba: 0028 movs r0, r5
|
|
10008abc: f7fe fcad bl 1000741a <uxListRemove>
|
|
10008ac0: 4b17 ldr r3, [pc, #92] @ (10008b20 <xTaskPriorityInherit+0xa8>)
|
|
10008ac2: 681b ldr r3, [r3, #0]
|
|
10008ac4: 6ad9 ldr r1, [r3, #44] @ 0x2c
|
|
10008ac6: 62e1 str r1, [r4, #44] @ 0x2c
|
|
10008ac8: 4b17 ldr r3, [pc, #92] @ (10008b28 <xTaskPriorityInherit+0xb0>)
|
|
10008aca: 681b ldr r3, [r3, #0]
|
|
10008acc: 4299 cmp r1, r3
|
|
10008ace: d901 bls.n 10008ad4 <xTaskPriorityInherit+0x5c>
|
|
10008ad0: 4b15 ldr r3, [pc, #84] @ (10008b28 <xTaskPriorityInherit+0xb0>)
|
|
10008ad2: 6019 str r1, [r3, #0]
|
|
10008ad4: 4a13 ldr r2, [pc, #76] @ (10008b24 <xTaskPriorityInherit+0xac>)
|
|
10008ad6: 008b lsls r3, r1, #2
|
|
10008ad8: 185b adds r3, r3, r1
|
|
10008ada: 009b lsls r3, r3, #2
|
|
10008adc: 18d3 adds r3, r2, r3
|
|
10008ade: 685b ldr r3, [r3, #4]
|
|
10008ae0: 60a3 str r3, [r4, #8]
|
|
10008ae2: 6899 ldr r1, [r3, #8]
|
|
10008ae4: 60e1 str r1, [r4, #12]
|
|
10008ae6: 604d str r5, [r1, #4]
|
|
10008ae8: 609d str r5, [r3, #8]
|
|
10008aea: 6ae0 ldr r0, [r4, #44] @ 0x2c
|
|
10008aec: 0083 lsls r3, r0, #2
|
|
10008aee: 1819 adds r1, r3, r0
|
|
10008af0: 0089 lsls r1, r1, #2
|
|
10008af2: 1889 adds r1, r1, r2
|
|
10008af4: 6161 str r1, [r4, #20]
|
|
10008af6: 1819 adds r1, r3, r0
|
|
10008af8: 0089 lsls r1, r1, #2
|
|
10008afa: 5889 ldr r1, [r1, r2]
|
|
10008afc: 3101 adds r1, #1
|
|
10008afe: 181b adds r3, r3, r0
|
|
10008b00: 009b lsls r3, r3, #2
|
|
10008b02: 5099 str r1, [r3, r2]
|
|
10008b04: 2001 movs r0, #1
|
|
10008b06: e008 b.n 10008b1a <xTaskPriorityInherit+0xa2>
|
|
10008b08: 6cc2 ldr r2, [r0, #76] @ 0x4c
|
|
10008b0a: 4b05 ldr r3, [pc, #20] @ (10008b20 <xTaskPriorityInherit+0xa8>)
|
|
10008b0c: 681b ldr r3, [r3, #0]
|
|
10008b0e: 6adb ldr r3, [r3, #44] @ 0x2c
|
|
10008b10: 429a cmp r2, r3
|
|
10008b12: d303 bcc.n 10008b1c <xTaskPriorityInherit+0xa4>
|
|
10008b14: 2000 movs r0, #0
|
|
10008b16: e000 b.n 10008b1a <xTaskPriorityInherit+0xa2>
|
|
10008b18: 2000 movs r0, #0
|
|
10008b1a: bd70 pop {r4, r5, r6, pc}
|
|
10008b1c: 2001 movs r0, #1
|
|
10008b1e: e7fc b.n 10008b1a <xTaskPriorityInherit+0xa2>
|
|
10008b20: 20001738 .word 0x20001738
|
|
10008b24: 20001750 .word 0x20001750
|
|
10008b28: 20021c28 .word 0x20021c28
|
|
|
|
10008b2c <xTaskPriorityDisinherit>:
|
|
10008b2c: b570 push {r4, r5, r6, lr}
|
|
10008b2e: 1e04 subs r4, r0, #0
|
|
10008b30: d045 beq.n 10008bbe <xTaskPriorityDisinherit+0x92>
|
|
10008b32: 4b25 ldr r3, [pc, #148] @ (10008bc8 <xTaskPriorityDisinherit+0x9c>)
|
|
10008b34: 681b ldr r3, [r3, #0]
|
|
10008b36: 4283 cmp r3, r0
|
|
10008b38: d10c bne.n 10008b54 <xTaskPriorityDisinherit+0x28>
|
|
10008b3a: 6d03 ldr r3, [r0, #80] @ 0x50
|
|
10008b3c: 2b00 cmp r3, #0
|
|
10008b3e: d00f beq.n 10008b60 <xTaskPriorityDisinherit+0x34>
|
|
10008b40: 3b01 subs r3, #1
|
|
10008b42: 6503 str r3, [r0, #80] @ 0x50
|
|
10008b44: 6ac1 ldr r1, [r0, #44] @ 0x2c
|
|
10008b46: 6cc2 ldr r2, [r0, #76] @ 0x4c
|
|
10008b48: 4291 cmp r1, r2
|
|
10008b4a: d03a beq.n 10008bc2 <xTaskPriorityDisinherit+0x96>
|
|
10008b4c: 2b00 cmp r3, #0
|
|
10008b4e: d00d beq.n 10008b6c <xTaskPriorityDisinherit+0x40>
|
|
10008b50: 2000 movs r0, #0
|
|
10008b52: bd70 pop {r4, r5, r6, pc}
|
|
10008b54: 4b1d ldr r3, [pc, #116] @ (10008bcc <xTaskPriorityDisinherit+0xa0>)
|
|
10008b56: 4a1e ldr r2, [pc, #120] @ (10008bd0 <xTaskPriorityDisinherit+0xa4>)
|
|
10008b58: 481e ldr r0, [pc, #120] @ (10008bd4 <xTaskPriorityDisinherit+0xa8>)
|
|
10008b5a: 491f ldr r1, [pc, #124] @ (10008bd8 <xTaskPriorityDisinherit+0xac>)
|
|
10008b5c: f7f9 fc92 bl 10002484 <__assert_func>
|
|
10008b60: 4b1e ldr r3, [pc, #120] @ (10008bdc <xTaskPriorityDisinherit+0xb0>)
|
|
10008b62: 4a1b ldr r2, [pc, #108] @ (10008bd0 <xTaskPriorityDisinherit+0xa4>)
|
|
10008b64: 481b ldr r0, [pc, #108] @ (10008bd4 <xTaskPriorityDisinherit+0xa8>)
|
|
10008b66: 491e ldr r1, [pc, #120] @ (10008be0 <xTaskPriorityDisinherit+0xb4>)
|
|
10008b68: f7f9 fc8c bl 10002484 <__assert_func>
|
|
10008b6c: 1d05 adds r5, r0, #4
|
|
10008b6e: 0028 movs r0, r5
|
|
10008b70: f7fe fc53 bl 1000741a <uxListRemove>
|
|
10008b74: 6ce1 ldr r1, [r4, #76] @ 0x4c
|
|
10008b76: 62e1 str r1, [r4, #44] @ 0x2c
|
|
10008b78: 2320 movs r3, #32
|
|
10008b7a: 1a5b subs r3, r3, r1
|
|
10008b7c: 61a3 str r3, [r4, #24]
|
|
10008b7e: 4b19 ldr r3, [pc, #100] @ (10008be4 <xTaskPriorityDisinherit+0xb8>)
|
|
10008b80: 681b ldr r3, [r3, #0]
|
|
10008b82: 4299 cmp r1, r3
|
|
10008b84: d901 bls.n 10008b8a <xTaskPriorityDisinherit+0x5e>
|
|
10008b86: 4b17 ldr r3, [pc, #92] @ (10008be4 <xTaskPriorityDisinherit+0xb8>)
|
|
10008b88: 6019 str r1, [r3, #0]
|
|
10008b8a: 4a17 ldr r2, [pc, #92] @ (10008be8 <xTaskPriorityDisinherit+0xbc>)
|
|
10008b8c: 008b lsls r3, r1, #2
|
|
10008b8e: 185b adds r3, r3, r1
|
|
10008b90: 009b lsls r3, r3, #2
|
|
10008b92: 18d3 adds r3, r2, r3
|
|
10008b94: 685b ldr r3, [r3, #4]
|
|
10008b96: 60a3 str r3, [r4, #8]
|
|
10008b98: 6899 ldr r1, [r3, #8]
|
|
10008b9a: 60e1 str r1, [r4, #12]
|
|
10008b9c: 604d str r5, [r1, #4]
|
|
10008b9e: 609d str r5, [r3, #8]
|
|
10008ba0: 6ae0 ldr r0, [r4, #44] @ 0x2c
|
|
10008ba2: 0083 lsls r3, r0, #2
|
|
10008ba4: 1819 adds r1, r3, r0
|
|
10008ba6: 0089 lsls r1, r1, #2
|
|
10008ba8: 1889 adds r1, r1, r2
|
|
10008baa: 6161 str r1, [r4, #20]
|
|
10008bac: 1819 adds r1, r3, r0
|
|
10008bae: 0089 lsls r1, r1, #2
|
|
10008bb0: 5889 ldr r1, [r1, r2]
|
|
10008bb2: 3101 adds r1, #1
|
|
10008bb4: 181b adds r3, r3, r0
|
|
10008bb6: 009b lsls r3, r3, #2
|
|
10008bb8: 5099 str r1, [r3, r2]
|
|
10008bba: 2001 movs r0, #1
|
|
10008bbc: e7c9 b.n 10008b52 <xTaskPriorityDisinherit+0x26>
|
|
10008bbe: 2000 movs r0, #0
|
|
10008bc0: e7c7 b.n 10008b52 <xTaskPriorityDisinherit+0x26>
|
|
10008bc2: 2000 movs r0, #0
|
|
10008bc4: e7c5 b.n 10008b52 <xTaskPriorityDisinherit+0x26>
|
|
10008bc6: 46c0 nop @ (mov r8, r8)
|
|
10008bc8: 20001738 .word 0x20001738
|
|
10008bcc: 1000b0c4 .word 0x1000b0c4
|
|
10008bd0: 1000b130 .word 0x1000b130
|
|
10008bd4: 1000af50 .word 0x1000af50
|
|
10008bd8: 0000108c .word 0x0000108c
|
|
10008bdc: 1000b0dc .word 0x1000b0dc
|
|
10008be0: 0000108d .word 0x0000108d
|
|
10008be4: 20021c28 .word 0x20021c28
|
|
10008be8: 20001750 .word 0x20001750
|
|
|
|
10008bec <vTaskPriorityDisinheritAfterTimeout>:
|
|
10008bec: b570 push {r4, r5, r6, lr}
|
|
10008bee: 1e04 subs r4, r0, #0
|
|
10008bf0: d00b beq.n 10008c0a <vTaskPriorityDisinheritAfterTimeout+0x1e>
|
|
10008bf2: 6d02 ldr r2, [r0, #80] @ 0x50
|
|
10008bf4: 2a00 cmp r2, #0
|
|
10008bf6: d009 beq.n 10008c0c <vTaskPriorityDisinheritAfterTimeout+0x20>
|
|
10008bf8: 6cc3 ldr r3, [r0, #76] @ 0x4c
|
|
10008bfa: 428b cmp r3, r1
|
|
10008bfc: d200 bcs.n 10008c00 <vTaskPriorityDisinheritAfterTimeout+0x14>
|
|
10008bfe: 000b movs r3, r1
|
|
10008c00: 6ae1 ldr r1, [r4, #44] @ 0x2c
|
|
10008c02: 4299 cmp r1, r3
|
|
10008c04: d001 beq.n 10008c0a <vTaskPriorityDisinheritAfterTimeout+0x1e>
|
|
10008c06: 2a01 cmp r2, #1
|
|
10008c08: d006 beq.n 10008c18 <vTaskPriorityDisinheritAfterTimeout+0x2c>
|
|
10008c0a: bd70 pop {r4, r5, r6, pc}
|
|
10008c0c: 4b21 ldr r3, [pc, #132] @ (10008c94 <vTaskPriorityDisinheritAfterTimeout+0xa8>)
|
|
10008c0e: 4a22 ldr r2, [pc, #136] @ (10008c98 <vTaskPriorityDisinheritAfterTimeout+0xac>)
|
|
10008c10: 4822 ldr r0, [pc, #136] @ (10008c9c <vTaskPriorityDisinheritAfterTimeout+0xb0>)
|
|
10008c12: 4923 ldr r1, [pc, #140] @ (10008ca0 <vTaskPriorityDisinheritAfterTimeout+0xb4>)
|
|
10008c14: f7f9 fc36 bl 10002484 <__assert_func>
|
|
10008c18: 4a22 ldr r2, [pc, #136] @ (10008ca4 <vTaskPriorityDisinheritAfterTimeout+0xb8>)
|
|
10008c1a: 6812 ldr r2, [r2, #0]
|
|
10008c1c: 42a2 cmp r2, r4
|
|
10008c1e: d032 beq.n 10008c86 <vTaskPriorityDisinheritAfterTimeout+0x9a>
|
|
10008c20: 62e3 str r3, [r4, #44] @ 0x2c
|
|
10008c22: 69a2 ldr r2, [r4, #24]
|
|
10008c24: 2a00 cmp r2, #0
|
|
10008c26: db02 blt.n 10008c2e <vTaskPriorityDisinheritAfterTimeout+0x42>
|
|
10008c28: 2220 movs r2, #32
|
|
10008c2a: 1ad3 subs r3, r2, r3
|
|
10008c2c: 61a3 str r3, [r4, #24]
|
|
10008c2e: 6962 ldr r2, [r4, #20]
|
|
10008c30: 008b lsls r3, r1, #2
|
|
10008c32: 185b adds r3, r3, r1
|
|
10008c34: 009b lsls r3, r3, #2
|
|
10008c36: 491c ldr r1, [pc, #112] @ (10008ca8 <vTaskPriorityDisinheritAfterTimeout+0xbc>)
|
|
10008c38: 185b adds r3, r3, r1
|
|
10008c3a: 429a cmp r2, r3
|
|
10008c3c: d1e5 bne.n 10008c0a <vTaskPriorityDisinheritAfterTimeout+0x1e>
|
|
10008c3e: 1d25 adds r5, r4, #4
|
|
10008c40: 0028 movs r0, r5
|
|
10008c42: f7fe fbea bl 1000741a <uxListRemove>
|
|
10008c46: 6ae1 ldr r1, [r4, #44] @ 0x2c
|
|
10008c48: 4b18 ldr r3, [pc, #96] @ (10008cac <vTaskPriorityDisinheritAfterTimeout+0xc0>)
|
|
10008c4a: 681b ldr r3, [r3, #0]
|
|
10008c4c: 4299 cmp r1, r3
|
|
10008c4e: d901 bls.n 10008c54 <vTaskPriorityDisinheritAfterTimeout+0x68>
|
|
10008c50: 4b16 ldr r3, [pc, #88] @ (10008cac <vTaskPriorityDisinheritAfterTimeout+0xc0>)
|
|
10008c52: 6019 str r1, [r3, #0]
|
|
10008c54: 4a14 ldr r2, [pc, #80] @ (10008ca8 <vTaskPriorityDisinheritAfterTimeout+0xbc>)
|
|
10008c56: 008b lsls r3, r1, #2
|
|
10008c58: 185b adds r3, r3, r1
|
|
10008c5a: 009b lsls r3, r3, #2
|
|
10008c5c: 18d3 adds r3, r2, r3
|
|
10008c5e: 685b ldr r3, [r3, #4]
|
|
10008c60: 60a3 str r3, [r4, #8]
|
|
10008c62: 6899 ldr r1, [r3, #8]
|
|
10008c64: 60e1 str r1, [r4, #12]
|
|
10008c66: 604d str r5, [r1, #4]
|
|
10008c68: 609d str r5, [r3, #8]
|
|
10008c6a: 6ae0 ldr r0, [r4, #44] @ 0x2c
|
|
10008c6c: 0083 lsls r3, r0, #2
|
|
10008c6e: 1819 adds r1, r3, r0
|
|
10008c70: 0089 lsls r1, r1, #2
|
|
10008c72: 1889 adds r1, r1, r2
|
|
10008c74: 6161 str r1, [r4, #20]
|
|
10008c76: 1819 adds r1, r3, r0
|
|
10008c78: 0089 lsls r1, r1, #2
|
|
10008c7a: 5889 ldr r1, [r1, r2]
|
|
10008c7c: 3101 adds r1, #1
|
|
10008c7e: 181b adds r3, r3, r0
|
|
10008c80: 009b lsls r3, r3, #2
|
|
10008c82: 5099 str r1, [r3, r2]
|
|
10008c84: e7c1 b.n 10008c0a <vTaskPriorityDisinheritAfterTimeout+0x1e>
|
|
10008c86: 4b0a ldr r3, [pc, #40] @ (10008cb0 <vTaskPriorityDisinheritAfterTimeout+0xc4>)
|
|
10008c88: 4a03 ldr r2, [pc, #12] @ (10008c98 <vTaskPriorityDisinheritAfterTimeout+0xac>)
|
|
10008c8a: 4804 ldr r0, [pc, #16] @ (10008c9c <vTaskPriorityDisinheritAfterTimeout+0xb0>)
|
|
10008c8c: 4909 ldr r1, [pc, #36] @ (10008cb4 <vTaskPriorityDisinheritAfterTimeout+0xc8>)
|
|
10008c8e: f7f9 fbf9 bl 10002484 <__assert_func>
|
|
10008c92: 46c0 nop @ (mov r8, r8)
|
|
10008c94: 1000b0dc .word 0x1000b0dc
|
|
10008c98: 1000b10c .word 0x1000b10c
|
|
10008c9c: 1000af50 .word 0x1000af50
|
|
10008ca0: 000010dc .word 0x000010dc
|
|
10008ca4: 20001738 .word 0x20001738
|
|
10008ca8: 20001750 .word 0x20001750
|
|
10008cac: 20021c28 .word 0x20021c28
|
|
10008cb0: 1000b0f4 .word 0x1000b0f4
|
|
10008cb4: 000010f7 .word 0x000010f7
|
|
|
|
10008cb8 <uxTaskResetEventItemValue>:
|
|
10008cb8: 4b04 ldr r3, [pc, #16] @ (10008ccc <uxTaskResetEventItemValue+0x14>)
|
|
10008cba: 681a ldr r2, [r3, #0]
|
|
10008cbc: 6990 ldr r0, [r2, #24]
|
|
10008cbe: 681a ldr r2, [r3, #0]
|
|
10008cc0: 6ad1 ldr r1, [r2, #44] @ 0x2c
|
|
10008cc2: 681a ldr r2, [r3, #0]
|
|
10008cc4: 2320 movs r3, #32
|
|
10008cc6: 1a5b subs r3, r3, r1
|
|
10008cc8: 6193 str r3, [r2, #24]
|
|
10008cca: 4770 bx lr
|
|
10008ccc: 20001738 .word 0x20001738
|
|
|
|
10008cd0 <pvTaskIncrementMutexHeldCount>:
|
|
10008cd0: 4b05 ldr r3, [pc, #20] @ (10008ce8 <pvTaskIncrementMutexHeldCount+0x18>)
|
|
10008cd2: 681b ldr r3, [r3, #0]
|
|
10008cd4: 2b00 cmp r3, #0
|
|
10008cd6: d004 beq.n 10008ce2 <pvTaskIncrementMutexHeldCount+0x12>
|
|
10008cd8: 4b03 ldr r3, [pc, #12] @ (10008ce8 <pvTaskIncrementMutexHeldCount+0x18>)
|
|
10008cda: 681a ldr r2, [r3, #0]
|
|
10008cdc: 6d13 ldr r3, [r2, #80] @ 0x50
|
|
10008cde: 3301 adds r3, #1
|
|
10008ce0: 6513 str r3, [r2, #80] @ 0x50
|
|
10008ce2: 4b01 ldr r3, [pc, #4] @ (10008ce8 <pvTaskIncrementMutexHeldCount+0x18>)
|
|
10008ce4: 6818 ldr r0, [r3, #0]
|
|
10008ce6: 4770 bx lr
|
|
10008ce8: 20001738 .word 0x20001738
|
|
|
|
10008cec <prvGetNextExpireTime>:
|
|
10008cec: 4b07 ldr r3, [pc, #28] @ (10008d0c <prvGetNextExpireTime+0x20>)
|
|
10008cee: 681a ldr r2, [r3, #0]
|
|
10008cf0: 6813 ldr r3, [r2, #0]
|
|
10008cf2: 2b00 cmp r3, #0
|
|
10008cf4: d106 bne.n 10008d04 <prvGetNextExpireTime+0x18>
|
|
10008cf6: 3301 adds r3, #1
|
|
10008cf8: 6003 str r3, [r0, #0]
|
|
10008cfa: 2b00 cmp r3, #0
|
|
10008cfc: d104 bne.n 10008d08 <prvGetNextExpireTime+0x1c>
|
|
10008cfe: 68d3 ldr r3, [r2, #12]
|
|
10008d00: 6818 ldr r0, [r3, #0]
|
|
10008d02: 4770 bx lr
|
|
10008d04: 2300 movs r3, #0
|
|
10008d06: e7f7 b.n 10008cf8 <prvGetNextExpireTime+0xc>
|
|
10008d08: 2000 movs r0, #0
|
|
10008d0a: e7fa b.n 10008d02 <prvGetNextExpireTime+0x16>
|
|
10008d0c: 2000173c .word 0x2000173c
|
|
|
|
10008d10 <prvInsertTimerInActiveList>:
|
|
10008d10: b510 push {r4, lr}
|
|
10008d12: 6041 str r1, [r0, #4]
|
|
10008d14: 6100 str r0, [r0, #16]
|
|
10008d16: 4291 cmp r1, r2
|
|
10008d18: d80c bhi.n 10008d34 <prvInsertTimerInActiveList+0x24>
|
|
10008d1a: 1ad2 subs r2, r2, r3
|
|
10008d1c: 6983 ldr r3, [r0, #24]
|
|
10008d1e: 429a cmp r2, r3
|
|
10008d20: d301 bcc.n 10008d26 <prvInsertTimerInActiveList+0x16>
|
|
10008d22: 2001 movs r0, #1
|
|
10008d24: bd10 pop {r4, pc}
|
|
10008d26: 1d01 adds r1, r0, #4
|
|
10008d28: 4b09 ldr r3, [pc, #36] @ (10008d50 <prvInsertTimerInActiveList+0x40>)
|
|
10008d2a: 6818 ldr r0, [r3, #0]
|
|
10008d2c: f7fe fb5e bl 100073ec <vListInsert>
|
|
10008d30: 2000 movs r0, #0
|
|
10008d32: e7f7 b.n 10008d24 <prvInsertTimerInActiveList+0x14>
|
|
10008d34: 429a cmp r2, r3
|
|
10008d36: d201 bcs.n 10008d3c <prvInsertTimerInActiveList+0x2c>
|
|
10008d38: 4299 cmp r1, r3
|
|
10008d3a: d206 bcs.n 10008d4a <prvInsertTimerInActiveList+0x3a>
|
|
10008d3c: 1d01 adds r1, r0, #4
|
|
10008d3e: 4b05 ldr r3, [pc, #20] @ (10008d54 <prvInsertTimerInActiveList+0x44>)
|
|
10008d40: 6818 ldr r0, [r3, #0]
|
|
10008d42: f7fe fb53 bl 100073ec <vListInsert>
|
|
10008d46: 2000 movs r0, #0
|
|
10008d48: e7ec b.n 10008d24 <prvInsertTimerInActiveList+0x14>
|
|
10008d4a: 2001 movs r0, #1
|
|
10008d4c: e7ea b.n 10008d24 <prvInsertTimerInActiveList+0x14>
|
|
10008d4e: 46c0 nop @ (mov r8, r8)
|
|
10008d50: 2000174c .word 0x2000174c
|
|
10008d54: 2000173c .word 0x2000173c
|
|
|
|
10008d58 <prvReloadTimer>:
|
|
10008d58: b570 push {r4, r5, r6, lr}
|
|
10008d5a: 0004 movs r4, r0
|
|
10008d5c: 000d movs r5, r1
|
|
10008d5e: 0016 movs r6, r2
|
|
10008d60: e004 b.n 10008d6c <prvReloadTimer+0x14>
|
|
10008d62: 69a3 ldr r3, [r4, #24]
|
|
10008d64: 18ed adds r5, r5, r3
|
|
10008d66: 6a23 ldr r3, [r4, #32]
|
|
10008d68: 0020 movs r0, r4
|
|
10008d6a: 4798 blx r3
|
|
10008d6c: 69a1 ldr r1, [r4, #24]
|
|
10008d6e: 1949 adds r1, r1, r5
|
|
10008d70: 002b movs r3, r5
|
|
10008d72: 0032 movs r2, r6
|
|
10008d74: 0020 movs r0, r4
|
|
10008d76: f7ff ffcb bl 10008d10 <prvInsertTimerInActiveList>
|
|
10008d7a: 2800 cmp r0, #0
|
|
10008d7c: d1f1 bne.n 10008d62 <prvReloadTimer+0xa>
|
|
10008d7e: bd70 pop {r4, r5, r6, pc}
|
|
|
|
10008d80 <prvProcessExpiredTimer>:
|
|
10008d80: b570 push {r4, r5, r6, lr}
|
|
10008d82: 0005 movs r5, r0
|
|
10008d84: 000e movs r6, r1
|
|
10008d86: 4b0c ldr r3, [pc, #48] @ (10008db8 <prvProcessExpiredTimer+0x38>)
|
|
10008d88: 681b ldr r3, [r3, #0]
|
|
10008d8a: 68db ldr r3, [r3, #12]
|
|
10008d8c: 68dc ldr r4, [r3, #12]
|
|
10008d8e: 1d20 adds r0, r4, #4
|
|
10008d90: f7fe fb43 bl 1000741a <uxListRemove>
|
|
10008d94: 2328 movs r3, #40 @ 0x28
|
|
10008d96: 5ce3 ldrb r3, [r4, r3]
|
|
10008d98: 075a lsls r2, r3, #29
|
|
10008d9a: d407 bmi.n 10008dac <prvProcessExpiredTimer+0x2c>
|
|
10008d9c: 2201 movs r2, #1
|
|
10008d9e: 4393 bics r3, r2
|
|
10008da0: 3227 adds r2, #39 @ 0x27
|
|
10008da2: 54a3 strb r3, [r4, r2]
|
|
10008da4: 6a23 ldr r3, [r4, #32]
|
|
10008da6: 0020 movs r0, r4
|
|
10008da8: 4798 blx r3
|
|
10008daa: bd70 pop {r4, r5, r6, pc}
|
|
10008dac: 0032 movs r2, r6
|
|
10008dae: 0029 movs r1, r5
|
|
10008db0: 0020 movs r0, r4
|
|
10008db2: f7ff ffd1 bl 10008d58 <prvReloadTimer>
|
|
10008db6: e7f5 b.n 10008da4 <prvProcessExpiredTimer+0x24>
|
|
10008db8: 2000173c .word 0x2000173c
|
|
|
|
10008dbc <prvSwitchTimerLists>:
|
|
10008dbc: b510 push {r4, lr}
|
|
10008dbe: e005 b.n 10008dcc <prvSwitchTimerLists+0x10>
|
|
10008dc0: 68db ldr r3, [r3, #12]
|
|
10008dc2: 6818 ldr r0, [r3, #0]
|
|
10008dc4: 2101 movs r1, #1
|
|
10008dc6: 4249 negs r1, r1
|
|
10008dc8: f7ff ffda bl 10008d80 <prvProcessExpiredTimer>
|
|
10008dcc: 4b05 ldr r3, [pc, #20] @ (10008de4 <prvSwitchTimerLists+0x28>)
|
|
10008dce: 681b ldr r3, [r3, #0]
|
|
10008dd0: 681a ldr r2, [r3, #0]
|
|
10008dd2: 2a00 cmp r2, #0
|
|
10008dd4: d1f4 bne.n 10008dc0 <prvSwitchTimerLists+0x4>
|
|
10008dd6: 4a03 ldr r2, [pc, #12] @ (10008de4 <prvSwitchTimerLists+0x28>)
|
|
10008dd8: 4903 ldr r1, [pc, #12] @ (10008de8 <prvSwitchTimerLists+0x2c>)
|
|
10008dda: 6808 ldr r0, [r1, #0]
|
|
10008ddc: 6010 str r0, [r2, #0]
|
|
10008dde: 600b str r3, [r1, #0]
|
|
10008de0: bd10 pop {r4, pc}
|
|
10008de2: 46c0 nop @ (mov r8, r8)
|
|
10008de4: 2000173c .word 0x2000173c
|
|
10008de8: 2000174c .word 0x2000174c
|
|
|
|
10008dec <prvSampleTimeNow>:
|
|
10008dec: b570 push {r4, r5, r6, lr}
|
|
10008dee: 0005 movs r5, r0
|
|
10008df0: f7ff fa46 bl 10008280 <xTaskGetTickCount>
|
|
10008df4: 0004 movs r4, r0
|
|
10008df6: 4b07 ldr r3, [pc, #28] @ (10008e14 <prvSampleTimeNow+0x28>)
|
|
10008df8: 681b ldr r3, [r3, #0]
|
|
10008dfa: 4283 cmp r3, r0
|
|
10008dfc: d805 bhi.n 10008e0a <prvSampleTimeNow+0x1e>
|
|
10008dfe: 2300 movs r3, #0
|
|
10008e00: 602b str r3, [r5, #0]
|
|
10008e02: 4b04 ldr r3, [pc, #16] @ (10008e14 <prvSampleTimeNow+0x28>)
|
|
10008e04: 601c str r4, [r3, #0]
|
|
10008e06: 0020 movs r0, r4
|
|
10008e08: bd70 pop {r4, r5, r6, pc}
|
|
10008e0a: f7ff ffd7 bl 10008dbc <prvSwitchTimerLists>
|
|
10008e0e: 2301 movs r3, #1
|
|
10008e10: 602b str r3, [r5, #0]
|
|
10008e12: e7f6 b.n 10008e02 <prvSampleTimeNow+0x16>
|
|
10008e14: 20021c88 .word 0x20021c88
|
|
|
|
10008e18 <prvProcessTimerOrBlockTask>:
|
|
10008e18: b570 push {r4, r5, r6, lr}
|
|
10008e1a: b082 sub sp, #8
|
|
10008e1c: 0004 movs r4, r0
|
|
10008e1e: 000d movs r5, r1
|
|
10008e20: f7ff fa26 bl 10008270 <vTaskSuspendAll>
|
|
10008e24: a801 add r0, sp, #4
|
|
10008e26: f7ff ffe1 bl 10008dec <prvSampleTimeNow>
|
|
10008e2a: 0006 movs r6, r0
|
|
10008e2c: 9b01 ldr r3, [sp, #4]
|
|
10008e2e: 2b00 cmp r3, #0
|
|
10008e30: d122 bne.n 10008e78 <prvProcessTimerOrBlockTask+0x60>
|
|
10008e32: 2d00 cmp r5, #0
|
|
10008e34: d114 bne.n 10008e60 <prvProcessTimerOrBlockTask+0x48>
|
|
10008e36: 42a0 cmp r0, r4
|
|
10008e38: d20b bcs.n 10008e52 <prvProcessTimerOrBlockTask+0x3a>
|
|
10008e3a: 1ba1 subs r1, r4, r6
|
|
10008e3c: 4b10 ldr r3, [pc, #64] @ (10008e80 <prvProcessTimerOrBlockTask+0x68>)
|
|
10008e3e: 6818 ldr r0, [r3, #0]
|
|
10008e40: 002a movs r2, r5
|
|
10008e42: f7fe ffef bl 10007e24 <vQueueWaitForMessageRestricted>
|
|
10008e46: f7ff fae5 bl 10008414 <xTaskResumeAll>
|
|
10008e4a: 2800 cmp r0, #0
|
|
10008e4c: d011 beq.n 10008e72 <prvProcessTimerOrBlockTask+0x5a>
|
|
10008e4e: b002 add sp, #8
|
|
10008e50: bd70 pop {r4, r5, r6, pc}
|
|
10008e52: f7ff fadf bl 10008414 <xTaskResumeAll>
|
|
10008e56: 0031 movs r1, r6
|
|
10008e58: 0020 movs r0, r4
|
|
10008e5a: f7ff ff91 bl 10008d80 <prvProcessExpiredTimer>
|
|
10008e5e: e7f6 b.n 10008e4e <prvProcessTimerOrBlockTask+0x36>
|
|
10008e60: 4a08 ldr r2, [pc, #32] @ (10008e84 <prvProcessTimerOrBlockTask+0x6c>)
|
|
10008e62: 6812 ldr r2, [r2, #0]
|
|
10008e64: 6812 ldr r2, [r2, #0]
|
|
10008e66: 2a00 cmp r2, #0
|
|
10008e68: d101 bne.n 10008e6e <prvProcessTimerOrBlockTask+0x56>
|
|
10008e6a: 2501 movs r5, #1
|
|
10008e6c: e7e5 b.n 10008e3a <prvProcessTimerOrBlockTask+0x22>
|
|
10008e6e: 001d movs r5, r3
|
|
10008e70: e7e3 b.n 10008e3a <prvProcessTimerOrBlockTask+0x22>
|
|
10008e72: f7fd ff8d bl 10006d90 <vPortYield>
|
|
10008e76: e7ea b.n 10008e4e <prvProcessTimerOrBlockTask+0x36>
|
|
10008e78: f7ff facc bl 10008414 <xTaskResumeAll>
|
|
10008e7c: e7e7 b.n 10008e4e <prvProcessTimerOrBlockTask+0x36>
|
|
10008e7e: 46c0 nop @ (mov r8, r8)
|
|
10008e80: 20021d30 .word 0x20021d30
|
|
10008e84: 2000174c .word 0x2000174c
|
|
|
|
10008e88 <prvProcessReceivedCommands>:
|
|
10008e88: b530 push {r4, r5, lr}
|
|
10008e8a: b087 sub sp, #28
|
|
10008e8c: e002 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008e8e: 9b02 ldr r3, [sp, #8]
|
|
10008e90: 2b00 cmp r3, #0
|
|
10008e92: da0f bge.n 10008eb4 <prvProcessReceivedCommands+0x2c>
|
|
10008e94: 4b37 ldr r3, [pc, #220] @ (10008f74 <prvProcessReceivedCommands+0xec>)
|
|
10008e96: 6818 ldr r0, [r3, #0]
|
|
10008e98: 2200 movs r2, #0
|
|
10008e9a: a902 add r1, sp, #8
|
|
10008e9c: f7fe fe24 bl 10007ae8 <xQueueReceive>
|
|
10008ea0: 2800 cmp r0, #0
|
|
10008ea2: d065 beq.n 10008f70 <prvProcessReceivedCommands+0xe8>
|
|
10008ea4: 9b02 ldr r3, [sp, #8]
|
|
10008ea6: 2b00 cmp r3, #0
|
|
10008ea8: daf1 bge.n 10008e8e <prvProcessReceivedCommands+0x6>
|
|
10008eaa: 9b03 ldr r3, [sp, #12]
|
|
10008eac: 9804 ldr r0, [sp, #16]
|
|
10008eae: 9905 ldr r1, [sp, #20]
|
|
10008eb0: 4798 blx r3
|
|
10008eb2: e7ec b.n 10008e8e <prvProcessReceivedCommands+0x6>
|
|
10008eb4: 9c04 ldr r4, [sp, #16]
|
|
10008eb6: 6963 ldr r3, [r4, #20]
|
|
10008eb8: 2b00 cmp r3, #0
|
|
10008eba: d002 beq.n 10008ec2 <prvProcessReceivedCommands+0x3a>
|
|
10008ebc: 1d20 adds r0, r4, #4
|
|
10008ebe: f7fe faac bl 1000741a <uxListRemove>
|
|
10008ec2: a801 add r0, sp, #4
|
|
10008ec4: f7ff ff92 bl 10008dec <prvSampleTimeNow>
|
|
10008ec8: 0005 movs r5, r0
|
|
10008eca: 9902 ldr r1, [sp, #8]
|
|
10008ecc: 2909 cmp r1, #9
|
|
10008ece: d8e1 bhi.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008ed0: 0089 lsls r1, r1, #2
|
|
10008ed2: 4b29 ldr r3, [pc, #164] @ (10008f78 <prvProcessReceivedCommands+0xf0>)
|
|
10008ed4: 5859 ldr r1, [r3, r1]
|
|
10008ed6: 468f mov pc, r1
|
|
10008ed8: 2228 movs r2, #40 @ 0x28
|
|
10008eda: 5ca3 ldrb r3, [r4, r2]
|
|
10008edc: 2101 movs r1, #1
|
|
10008ede: 430b orrs r3, r1
|
|
10008ee0: 54a3 strb r3, [r4, r2]
|
|
10008ee2: 9b03 ldr r3, [sp, #12]
|
|
10008ee4: 69a1 ldr r1, [r4, #24]
|
|
10008ee6: 1859 adds r1, r3, r1
|
|
10008ee8: 0002 movs r2, r0
|
|
10008eea: 0020 movs r0, r4
|
|
10008eec: f7ff ff10 bl 10008d10 <prvInsertTimerInActiveList>
|
|
10008ef0: 2800 cmp r0, #0
|
|
10008ef2: d0cf beq.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008ef4: 2328 movs r3, #40 @ 0x28
|
|
10008ef6: 5ce3 ldrb r3, [r4, r3]
|
|
10008ef8: 075a lsls r2, r3, #29
|
|
10008efa: d407 bmi.n 10008f0c <prvProcessReceivedCommands+0x84>
|
|
10008efc: 2201 movs r2, #1
|
|
10008efe: 4393 bics r3, r2
|
|
10008f00: 3227 adds r2, #39 @ 0x27
|
|
10008f02: 54a3 strb r3, [r4, r2]
|
|
10008f04: 6a23 ldr r3, [r4, #32]
|
|
10008f06: 0020 movs r0, r4
|
|
10008f08: 4798 blx r3
|
|
10008f0a: e7c3 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008f0c: 9903 ldr r1, [sp, #12]
|
|
10008f0e: 69a3 ldr r3, [r4, #24]
|
|
10008f10: 18c9 adds r1, r1, r3
|
|
10008f12: 002a movs r2, r5
|
|
10008f14: 0020 movs r0, r4
|
|
10008f16: f7ff ff1f bl 10008d58 <prvReloadTimer>
|
|
10008f1a: e7f3 b.n 10008f04 <prvProcessReceivedCommands+0x7c>
|
|
10008f1c: 2228 movs r2, #40 @ 0x28
|
|
10008f1e: 5ca3 ldrb r3, [r4, r2]
|
|
10008f20: 2101 movs r1, #1
|
|
10008f22: 438b bics r3, r1
|
|
10008f24: 54a3 strb r3, [r4, r2]
|
|
10008f26: e7b5 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008f28: 2228 movs r2, #40 @ 0x28
|
|
10008f2a: 5ca3 ldrb r3, [r4, r2]
|
|
10008f2c: 2101 movs r1, #1
|
|
10008f2e: 430b orrs r3, r1
|
|
10008f30: 54a3 strb r3, [r4, r2]
|
|
10008f32: 9903 ldr r1, [sp, #12]
|
|
10008f34: 61a1 str r1, [r4, #24]
|
|
10008f36: 2900 cmp r1, #0
|
|
10008f38: d006 beq.n 10008f48 <prvProcessReceivedCommands+0xc0>
|
|
10008f3a: 1809 adds r1, r1, r0
|
|
10008f3c: 0003 movs r3, r0
|
|
10008f3e: 0002 movs r2, r0
|
|
10008f40: 0020 movs r0, r4
|
|
10008f42: f7ff fee5 bl 10008d10 <prvInsertTimerInActiveList>
|
|
10008f46: e7a5 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008f48: 4b0c ldr r3, [pc, #48] @ (10008f7c <prvProcessReceivedCommands+0xf4>)
|
|
10008f4a: 4a0d ldr r2, [pc, #52] @ (10008f80 <prvProcessReceivedCommands+0xf8>)
|
|
10008f4c: 31dd adds r1, #221 @ 0xdd
|
|
10008f4e: 480d ldr r0, [pc, #52] @ (10008f84 <prvProcessReceivedCommands+0xfc>)
|
|
10008f50: 0089 lsls r1, r1, #2
|
|
10008f52: f7f9 fa97 bl 10002484 <__assert_func>
|
|
10008f56: 2328 movs r3, #40 @ 0x28
|
|
10008f58: 5ce3 ldrb r3, [r4, r3]
|
|
10008f5a: 079a lsls r2, r3, #30
|
|
10008f5c: d504 bpl.n 10008f68 <prvProcessReceivedCommands+0xe0>
|
|
10008f5e: 2201 movs r2, #1
|
|
10008f60: 4393 bics r3, r2
|
|
10008f62: 3227 adds r2, #39 @ 0x27
|
|
10008f64: 54a3 strb r3, [r4, r2]
|
|
10008f66: e795 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008f68: 0020 movs r0, r4
|
|
10008f6a: f7fd fe07 bl 10006b7c <vPortFree>
|
|
10008f6e: e791 b.n 10008e94 <prvProcessReceivedCommands+0xc>
|
|
10008f70: b007 add sp, #28
|
|
10008f72: bd30 pop {r4, r5, pc}
|
|
10008f74: 20021d30 .word 0x20021d30
|
|
10008f78: 1000b2c0 .word 0x1000b2c0
|
|
10008f7c: 1000b268 .word 0x1000b268
|
|
10008f80: 1000b300 .word 0x1000b300
|
|
10008f84: 1000b290 .word 0x1000b290
|
|
|
|
10008f88 <prvTimerTask>:
|
|
10008f88: b500 push {lr}
|
|
10008f8a: b083 sub sp, #12
|
|
10008f8c: a801 add r0, sp, #4
|
|
10008f8e: f7ff fead bl 10008cec <prvGetNextExpireTime>
|
|
10008f92: 9901 ldr r1, [sp, #4]
|
|
10008f94: f7ff ff40 bl 10008e18 <prvProcessTimerOrBlockTask>
|
|
10008f98: f7ff ff76 bl 10008e88 <prvProcessReceivedCommands>
|
|
10008f9c: e7f6 b.n 10008f8c <prvTimerTask+0x4>
|
|
...
|
|
|
|
10008fa0 <prvCheckForValidListAndQueue>:
|
|
10008fa0: b570 push {r4, r5, r6, lr}
|
|
10008fa2: f7fd ff15 bl 10006dd0 <vPortEnterCritical>
|
|
10008fa6: 4b10 ldr r3, [pc, #64] @ (10008fe8 <prvCheckForValidListAndQueue+0x48>)
|
|
10008fa8: 681b ldr r3, [r3, #0]
|
|
10008faa: 2b00 cmp r3, #0
|
|
10008fac: d002 beq.n 10008fb4 <prvCheckForValidListAndQueue+0x14>
|
|
10008fae: f7fd ff2f bl 10006e10 <vPortExitCritical>
|
|
10008fb2: bd70 pop {r4, r5, r6, pc}
|
|
10008fb4: 4d0d ldr r5, [pc, #52] @ (10008fec <prvCheckForValidListAndQueue+0x4c>)
|
|
10008fb6: 0028 movs r0, r5
|
|
10008fb8: f7fe fa0a bl 100073d0 <vListInitialise>
|
|
10008fbc: 4c0c ldr r4, [pc, #48] @ (10008ff0 <prvCheckForValidListAndQueue+0x50>)
|
|
10008fbe: 0020 movs r0, r4
|
|
10008fc0: f7fe fa06 bl 100073d0 <vListInitialise>
|
|
10008fc4: 4b0b ldr r3, [pc, #44] @ (10008ff4 <prvCheckForValidListAndQueue+0x54>)
|
|
10008fc6: 601d str r5, [r3, #0]
|
|
10008fc8: 4b0b ldr r3, [pc, #44] @ (10008ff8 <prvCheckForValidListAndQueue+0x58>)
|
|
10008fca: 601c str r4, [r3, #0]
|
|
10008fcc: 2200 movs r2, #0
|
|
10008fce: 2110 movs r1, #16
|
|
10008fd0: 200a movs r0, #10
|
|
10008fd2: f7fe fbc5 bl 10007760 <xQueueGenericCreate>
|
|
10008fd6: 4b04 ldr r3, [pc, #16] @ (10008fe8 <prvCheckForValidListAndQueue+0x48>)
|
|
10008fd8: 6018 str r0, [r3, #0]
|
|
10008fda: 2800 cmp r0, #0
|
|
10008fdc: d0e7 beq.n 10008fae <prvCheckForValidListAndQueue+0xe>
|
|
10008fde: 4907 ldr r1, [pc, #28] @ (10008ffc <prvCheckForValidListAndQueue+0x5c>)
|
|
10008fe0: f7fe feec bl 10007dbc <vQueueAddToRegistry>
|
|
10008fe4: e7e3 b.n 10008fae <prvCheckForValidListAndQueue+0xe>
|
|
10008fe6: 46c0 nop @ (mov r8, r8)
|
|
10008fe8: 20021d30 .word 0x20021d30
|
|
10008fec: 20021c2c .word 0x20021c2c
|
|
10008ff0: 20021c40 .word 0x20021c40
|
|
10008ff4: 2000173c .word 0x2000173c
|
|
10008ff8: 2000174c .word 0x2000174c
|
|
10008ffc: 1000b2e8 .word 0x1000b2e8
|
|
|
|
10009000 <xTimerCreateTimerTask>:
|
|
10009000: b500 push {lr}
|
|
10009002: b083 sub sp, #12
|
|
10009004: f7ff ffcc bl 10008fa0 <prvCheckForValidListAndQueue>
|
|
10009008: 4b0c ldr r3, [pc, #48] @ (1000903c <xTimerCreateTimerTask+0x3c>)
|
|
1000900a: 681b ldr r3, [r3, #0]
|
|
1000900c: 2b00 cmp r3, #0
|
|
1000900e: d00e beq.n 1000902e <xTimerCreateTimerTask+0x2e>
|
|
10009010: 2280 movs r2, #128 @ 0x80
|
|
10009012: 490b ldr r1, [pc, #44] @ (10009040 <xTimerCreateTimerTask+0x40>)
|
|
10009014: 480b ldr r0, [pc, #44] @ (10009044 <xTimerCreateTimerTask+0x44>)
|
|
10009016: 4b0c ldr r3, [pc, #48] @ (10009048 <xTimerCreateTimerTask+0x48>)
|
|
10009018: 9301 str r3, [sp, #4]
|
|
1000901a: 231f movs r3, #31
|
|
1000901c: 9300 str r3, [sp, #0]
|
|
1000901e: 2300 movs r3, #0
|
|
10009020: 00d2 lsls r2, r2, #3
|
|
10009022: f7ff f8b1 bl 10008188 <xTaskCreate>
|
|
10009026: 2800 cmp r0, #0
|
|
10009028: d001 beq.n 1000902e <xTimerCreateTimerTask+0x2e>
|
|
1000902a: b003 add sp, #12
|
|
1000902c: bd00 pop {pc}
|
|
1000902e: 4b07 ldr r3, [pc, #28] @ (1000904c <xTimerCreateTimerTask+0x4c>)
|
|
10009030: 4a07 ldr r2, [pc, #28] @ (10009050 <xTimerCreateTimerTask+0x50>)
|
|
10009032: 211a movs r1, #26
|
|
10009034: 4807 ldr r0, [pc, #28] @ (10009054 <xTimerCreateTimerTask+0x54>)
|
|
10009036: 31ff adds r1, #255 @ 0xff
|
|
10009038: f7f9 fa24 bl 10002484 <__assert_func>
|
|
1000903c: 20021d30 .word 0x20021d30
|
|
10009040: 1000b2f0 .word 0x1000b2f0
|
|
10009044: 10008f89 .word 0x10008f89
|
|
10009048: 20021d34 .word 0x20021d34
|
|
1000904c: 1000b2f8 .word 0x1000b2f8
|
|
10009050: 1000b31c .word 0x1000b31c
|
|
10009054: 1000b290 .word 0x1000b290
|
|
|
|
10009058 <xTimerPendFunctionCallFromISR>:
|
|
10009058: b510 push {r4, lr}
|
|
1000905a: b084 sub sp, #16
|
|
1000905c: 0014 movs r4, r2
|
|
1000905e: 001a movs r2, r3
|
|
10009060: 2302 movs r3, #2
|
|
10009062: 425b negs r3, r3
|
|
10009064: 9300 str r3, [sp, #0]
|
|
10009066: 9001 str r0, [sp, #4]
|
|
10009068: 9102 str r1, [sp, #8]
|
|
1000906a: 9403 str r4, [sp, #12]
|
|
1000906c: 4b03 ldr r3, [pc, #12] @ (1000907c <xTimerPendFunctionCallFromISR+0x24>)
|
|
1000906e: 6818 ldr r0, [r3, #0]
|
|
10009070: 2300 movs r3, #0
|
|
10009072: 4669 mov r1, sp
|
|
10009074: f7fe fc9a bl 100079ac <xQueueGenericSendFromISR>
|
|
10009078: b004 add sp, #16
|
|
1000907a: bd10 pop {r4, pc}
|
|
1000907c: 20021d30 .word 0x20021d30
|
|
|
|
10009080 <adc_init>:
|
|
10009080: 2301 movs r3, #1
|
|
10009082: 4a08 ldr r2, [pc, #32] @ (100090a4 <adc_init+0x24>)
|
|
10009084: 6013 str r3, [r2, #0]
|
|
10009086: 4a08 ldr r2, [pc, #32] @ (100090a8 <adc_init+0x28>)
|
|
10009088: 6013 str r3, [r2, #0]
|
|
1000908a: 4b08 ldr r3, [pc, #32] @ (100090ac <adc_init+0x2c>)
|
|
1000908c: 689a ldr r2, [r3, #8]
|
|
1000908e: 2301 movs r3, #1
|
|
10009090: 4393 bics r3, r2
|
|
10009092: d1fa bne.n 1000908a <adc_init+0xa>
|
|
10009094: 4b06 ldr r3, [pc, #24] @ (100090b0 <adc_init+0x30>)
|
|
10009096: 2201 movs r2, #1
|
|
10009098: 601a str r2, [r3, #0]
|
|
1000909a: 4b05 ldr r3, [pc, #20] @ (100090b0 <adc_init+0x30>)
|
|
1000909c: 681b ldr r3, [r3, #0]
|
|
1000909e: 05db lsls r3, r3, #23
|
|
100090a0: d5fb bpl.n 1000909a <adc_init+0x1a>
|
|
100090a2: 4770 bx lr
|
|
100090a4: 4000e000 .word 0x4000e000
|
|
100090a8: 4000f000 .word 0x4000f000
|
|
100090ac: 4000c000 .word 0x4000c000
|
|
100090b0: 4004c000 .word 0x4004c000
|
|
|
|
100090b4 <strlen>:
|
|
100090b4: b510 push {r4, lr}
|
|
100090b6: 0783 lsls r3, r0, #30
|
|
100090b8: d00a beq.n 100090d0 <strlen+0x1c>
|
|
100090ba: 0003 movs r3, r0
|
|
100090bc: 2103 movs r1, #3
|
|
100090be: e002 b.n 100090c6 <strlen+0x12>
|
|
100090c0: 3301 adds r3, #1
|
|
100090c2: 420b tst r3, r1
|
|
100090c4: d005 beq.n 100090d2 <strlen+0x1e>
|
|
100090c6: 781a ldrb r2, [r3, #0]
|
|
100090c8: 2a00 cmp r2, #0
|
|
100090ca: d1f9 bne.n 100090c0 <strlen+0xc>
|
|
100090cc: 1a18 subs r0, r3, r0
|
|
100090ce: bd10 pop {r4, pc}
|
|
100090d0: 0003 movs r3, r0
|
|
100090d2: 6819 ldr r1, [r3, #0]
|
|
100090d4: 4a0c ldr r2, [pc, #48] @ (10009108 <strlen+0x54>)
|
|
100090d6: 4c0d ldr r4, [pc, #52] @ (1000910c <strlen+0x58>)
|
|
100090d8: 188a adds r2, r1, r2
|
|
100090da: 438a bics r2, r1
|
|
100090dc: 4222 tst r2, r4
|
|
100090de: d10f bne.n 10009100 <strlen+0x4c>
|
|
100090e0: 6859 ldr r1, [r3, #4]
|
|
100090e2: 4a09 ldr r2, [pc, #36] @ (10009108 <strlen+0x54>)
|
|
100090e4: 3304 adds r3, #4
|
|
100090e6: 188a adds r2, r1, r2
|
|
100090e8: 438a bics r2, r1
|
|
100090ea: 4222 tst r2, r4
|
|
100090ec: d108 bne.n 10009100 <strlen+0x4c>
|
|
100090ee: 6859 ldr r1, [r3, #4]
|
|
100090f0: 4a05 ldr r2, [pc, #20] @ (10009108 <strlen+0x54>)
|
|
100090f2: 3304 adds r3, #4
|
|
100090f4: 188a adds r2, r1, r2
|
|
100090f6: 438a bics r2, r1
|
|
100090f8: 4222 tst r2, r4
|
|
100090fa: d0f1 beq.n 100090e0 <strlen+0x2c>
|
|
100090fc: e000 b.n 10009100 <strlen+0x4c>
|
|
100090fe: 3301 adds r3, #1
|
|
10009100: 781a ldrb r2, [r3, #0]
|
|
10009102: 2a00 cmp r2, #0
|
|
10009104: d1fb bne.n 100090fe <strlen+0x4a>
|
|
10009106: e7e1 b.n 100090cc <strlen+0x18>
|
|
10009108: fefefeff .word 0xfefefeff
|
|
1000910c: 80808080 .word 0x80808080
|
|
|
|
10009110 <_fini>:
|
|
10009110: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
10009112: 46c0 nop @ (mov r8, r8)
|
|
10009114: 0000 movs r0, r0
|
|
...
|
|
|
|
10009118 <__flash_do_cmd_veneer>:
|
|
10009118: b401 push {r0}
|
|
1000911a: 4802 ldr r0, [pc, #8] @ (10009124 <__flash_do_cmd_veneer+0xc>)
|
|
1000911c: 4684 mov ip, r0
|
|
1000911e: bc01 pop {r0}
|
|
10009120: 4760 bx ip
|
|
10009122: bf00 nop
|
|
10009124: 20000125 .word 0x20000125
|
|
|
|
10009128 <__mutex_exit_veneer>:
|
|
10009128: b401 push {r0}
|
|
1000912a: 4802 ldr r0, [pc, #8] @ (10009134 <__mutex_exit_veneer+0xc>)
|
|
1000912c: 4684 mov ip, r0
|
|
1000912e: bc01 pop {r0}
|
|
10009130: 4760 bx ip
|
|
10009132: bf00 nop
|
|
10009134: 200002fd .word 0x200002fd
|
|
|
|
10009138 <____aeabi_ldiv0_veneer>:
|
|
10009138: b401 push {r0}
|
|
1000913a: 4802 ldr r0, [pc, #8] @ (10009144 <____aeabi_ldiv0_veneer+0xc>)
|
|
1000913c: 4684 mov ip, r0
|
|
1000913e: bc01 pop {r0}
|
|
10009140: 4760 bx ip
|
|
10009142: bf00 nop
|
|
10009144: 20000a21 .word 0x20000a21
|
|
|
|
10009148 <__reset_non_control_endpoints_veneer>:
|
|
10009148: b401 push {r0}
|
|
1000914a: 4802 ldr r0, [pc, #8] @ (10009154 <__reset_non_control_endpoints_veneer+0xc>)
|
|
1000914c: 4684 mov ip, r0
|
|
1000914e: bc01 pop {r0}
|
|
10009150: 4760 bx ip
|
|
10009152: bf00 nop
|
|
10009154: 2000033d .word 0x2000033d
|
|
|
|
10009158 <__e15_is_critical_frame_period_veneer>:
|
|
10009158: b401 push {r0}
|
|
1000915a: 4802 ldr r0, [pc, #8] @ (10009164 <__e15_is_critical_frame_period_veneer+0xc>)
|
|
1000915c: 4684 mov ip, r0
|
|
1000915e: bc01 pop {r0}
|
|
10009160: 4760 bx ip
|
|
10009162: bf00 nop
|
|
10009164: 20000605 .word 0x20000605
|
|
|
|
10009168 <____aeabi_idiv0_veneer>:
|
|
10009168: b401 push {r0}
|
|
1000916a: 4802 ldr r0, [pc, #8] @ (10009174 <____aeabi_idiv0_veneer+0xc>)
|
|
1000916c: 4684 mov ip, r0
|
|
1000916e: bc01 pop {r0}
|
|
10009170: 4760 bx ip
|
|
10009172: bf00 nop
|
|
10009174: 20000a21 .word 0x20000a21
|
|
|
|
10009178 <__mutex_try_enter_veneer>:
|
|
10009178: b401 push {r0}
|
|
1000917a: 4802 ldr r0, [pc, #8] @ (10009184 <__mutex_try_enter_veneer+0xc>)
|
|
1000917c: 4684 mov ip, r0
|
|
1000917e: bc01 pop {r0}
|
|
10009180: 4760 bx ip
|
|
10009182: bf00 nop
|
|
10009184: 200001fd .word 0x200001fd
|
|
|
|
10009188 <__mutex_enter_timeout_ms_veneer>:
|
|
10009188: b401 push {r0}
|
|
1000918a: 4802 ldr r0, [pc, #8] @ (10009194 <__mutex_enter_timeout_ms_veneer+0xc>)
|
|
1000918c: 4684 mov ip, r0
|
|
1000918e: bc01 pop {r0}
|
|
10009190: 4760 bx ip
|
|
10009192: bf00 nop
|
|
10009194: 200002e3 .word 0x200002e3
|
|
|
|
10009198 <__dcd_event_handler_veneer>:
|
|
10009198: b401 push {r0}
|
|
1000919a: 4802 ldr r0, [pc, #8] @ (100091a4 <__dcd_event_handler_veneer+0xc>)
|
|
1000919c: 4684 mov ip, r0
|
|
1000919e: bc01 pop {r0}
|
|
100091a0: 4760 bx ip
|
|
100091a2: bf00 nop
|
|
100091a4: 20000875 .word 0x20000875
|
|
|
|
100091a8 <__e15_is_bulkin_ep_veneer>:
|
|
100091a8: b401 push {r0}
|
|
100091aa: 4802 ldr r0, [pc, #8] @ (100091b4 <__e15_is_bulkin_ep_veneer+0xc>)
|
|
100091ac: 4684 mov ip, r0
|
|
100091ae: bc01 pop {r0}
|
|
100091b0: 4760 bx ip
|
|
100091b2: bf00 nop
|
|
100091b4: 200005d9 .word 0x200005d9
|
|
|
|
100091b8 <__mutex_try_enter_block_until_veneer>:
|
|
100091b8: b401 push {r0}
|
|
100091ba: 4802 ldr r0, [pc, #8] @ (100091c4 <__mutex_try_enter_block_until_veneer+0xc>)
|
|
100091bc: 4684 mov ip, r0
|
|
100091be: bc01 pop {r0}
|
|
100091c0: 4760 bx ip
|
|
100091c2: bf00 nop
|
|
100091c4: 200002b1 .word 0x200002b1
|
|
|
|
100091c8 <__hw_endpoint_start_next_buffer_veneer>:
|
|
100091c8: b401 push {r0}
|
|
100091ca: 4802 ldr r0, [pc, #8] @ (100091d4 <__hw_endpoint_start_next_buffer_veneer+0xc>)
|
|
100091cc: 4684 mov ip, r0
|
|
100091ce: bc01 pop {r0}
|
|
100091d0: 4760 bx ip
|
|
100091d2: bf00 nop
|
|
100091d4: 200007a9 .word 0x200007a9
|
|
|
|
100091d8 <__hw_endpoint_reset_transfer_veneer>:
|
|
100091d8: b401 push {r0}
|
|
100091da: 4802 ldr r0, [pc, #8] @ (100091e4 <__hw_endpoint_reset_transfer_veneer+0xc>)
|
|
100091dc: 4684 mov ip, r0
|
|
100091de: bc01 pop {r0}
|
|
100091e0: 4760 bx ip
|
|
100091e2: bf00 nop
|
|
100091e4: 20000745 .word 0x20000745
|
|
|
|
100091e8 <___hw_endpoint_buffer_control_update32_veneer>:
|
|
100091e8: b401 push {r0}
|
|
100091ea: 4802 ldr r0, [pc, #8] @ (100091f4 <___hw_endpoint_buffer_control_update32_veneer+0xc>)
|
|
100091ec: 4684 mov ip, r0
|
|
100091ee: bc01 pop {r0}
|
|
100091f0: 4760 bx ip
|
|
100091f2: bf00 nop
|
|
100091f4: 20000751 .word 0x20000751
|
|
|
|
Disassembly of section .data:
|
|
|
|
200000c0 <flash_init_boot2_copyout>:
|
|
200000c0: 4b09 ldr r3, [pc, #36] @ (200000e8 <flash_init_boot2_copyout+0x28>)
|
|
200000c2: 781b ldrb r3, [r3, #0]
|
|
200000c4: 2b00 cmp r3, #0
|
|
200000c6: d008 beq.n 200000da <flash_init_boot2_copyout+0x1a>
|
|
200000c8: e00c b.n 200000e4 <flash_init_boot2_copyout+0x24>
|
|
200000ca: 009a lsls r2, r3, #2
|
|
200000cc: 2180 movs r1, #128 @ 0x80
|
|
200000ce: 0549 lsls r1, r1, #21
|
|
200000d0: 1851 adds r1, r2, r1
|
|
200000d2: 6808 ldr r0, [r1, #0]
|
|
200000d4: 4905 ldr r1, [pc, #20] @ (200000ec <flash_init_boot2_copyout+0x2c>)
|
|
200000d6: 5050 str r0, [r2, r1]
|
|
200000d8: 3301 adds r3, #1
|
|
200000da: 2b3f cmp r3, #63 @ 0x3f
|
|
200000dc: ddf5 ble.n 200000ca <flash_init_boot2_copyout+0xa>
|
|
200000de: 4b02 ldr r3, [pc, #8] @ (200000e8 <flash_init_boot2_copyout+0x28>)
|
|
200000e0: 2201 movs r2, #1
|
|
200000e2: 701a strb r2, [r3, #0]
|
|
200000e4: 4770 bx lr
|
|
200000e6: 46c0 nop @ (mov r8, r8)
|
|
200000e8: 20021d3f .word 0x20021d3f
|
|
200000ec: 2000114c .word 0x2000114c
|
|
|
|
200000f0 <flash_enable_xip_via_boot2>:
|
|
200000f0: b510 push {r4, lr}
|
|
200000f2: 4b01 ldr r3, [pc, #4] @ (200000f8 <flash_enable_xip_via_boot2+0x8>)
|
|
200000f4: 4798 blx r3
|
|
200000f6: bd10 pop {r4, pc}
|
|
200000f8: 2000114d .word 0x2000114d
|
|
|
|
200000fc <flash_cs_force>:
|
|
200000fc: 2800 cmp r0, #0
|
|
200000fe: d00a beq.n 20000116 <flash_cs_force+0x1a>
|
|
20000100: 2303 movs r3, #3
|
|
20000102: 021b lsls r3, r3, #8
|
|
20000104: 4a05 ldr r2, [pc, #20] @ (2000011c <flash_cs_force+0x20>)
|
|
20000106: 6812 ldr r2, [r2, #0]
|
|
20000108: 4053 eors r3, r2
|
|
2000010a: 22c0 movs r2, #192 @ 0xc0
|
|
2000010c: 0092 lsls r2, r2, #2
|
|
2000010e: 4013 ands r3, r2
|
|
20000110: 4a03 ldr r2, [pc, #12] @ (20000120 <flash_cs_force+0x24>)
|
|
20000112: 6013 str r3, [r2, #0]
|
|
20000114: 4770 bx lr
|
|
20000116: 2302 movs r3, #2
|
|
20000118: e7f3 b.n 20000102 <flash_cs_force+0x6>
|
|
2000011a: 46c0 nop @ (mov r8, r8)
|
|
2000011c: 4001800c .word 0x4001800c
|
|
20000120: 4001900c .word 0x4001900c
|
|
|
|
20000124 <flash_do_cmd>:
|
|
20000124: b5f0 push {r4, r5, r6, r7, lr}
|
|
20000126: 46d6 mov lr, sl
|
|
20000128: 464f mov r7, r9
|
|
2000012a: 4646 mov r6, r8
|
|
2000012c: b5c0 push {r6, r7, lr}
|
|
2000012e: 0007 movs r7, r0
|
|
20000130: 000e movs r6, r1
|
|
20000132: 0015 movs r5, r2
|
|
20000134: 2318 movs r3, #24
|
|
20000136: 469a mov sl, r3
|
|
20000138: 881b ldrh r3, [r3, #0]
|
|
2000013a: 2214 movs r2, #20
|
|
2000013c: 4690 mov r8, r2
|
|
2000013e: 8810 ldrh r0, [r2, #0]
|
|
20000140: 4928 ldr r1, [pc, #160] @ (200001e4 <flash_do_cmd+0xc0>)
|
|
20000142: 4798 blx r3
|
|
20000144: 4681 mov r9, r0
|
|
20000146: 4653 mov r3, sl
|
|
20000148: 881b ldrh r3, [r3, #0]
|
|
2000014a: 4642 mov r2, r8
|
|
2000014c: 8810 ldrh r0, [r2, #0]
|
|
2000014e: 4926 ldr r1, [pc, #152] @ (200001e8 <flash_do_cmd+0xc4>)
|
|
20000150: 4798 blx r3
|
|
20000152: 0004 movs r4, r0
|
|
20000154: 4653 mov r3, sl
|
|
20000156: 881b ldrh r3, [r3, #0]
|
|
20000158: 4642 mov r2, r8
|
|
2000015a: 8810 ldrh r0, [r2, #0]
|
|
2000015c: 4923 ldr r1, [pc, #140] @ (200001ec <flash_do_cmd+0xc8>)
|
|
2000015e: 4798 blx r3
|
|
20000160: 4680 mov r8, r0
|
|
20000162: 464b mov r3, r9
|
|
20000164: 2b00 cmp r3, #0
|
|
20000166: d00c beq.n 20000182 <flash_do_cmd+0x5e>
|
|
20000168: 2c00 cmp r4, #0
|
|
2000016a: d00a beq.n 20000182 <flash_do_cmd+0x5e>
|
|
2000016c: 2800 cmp r0, #0
|
|
2000016e: d008 beq.n 20000182 <flash_do_cmd+0x5e>
|
|
20000170: f7ff ffa6 bl 200000c0 <flash_init_boot2_copyout>
|
|
20000174: 47c8 blx r9
|
|
20000176: 47a0 blx r4
|
|
20000178: 2000 movs r0, #0
|
|
2000017a: f7ff ffbf bl 200000fc <flash_cs_force>
|
|
2000017e: 002a movs r2, r5
|
|
20000180: e00f b.n 200001a2 <flash_do_cmd+0x7e>
|
|
20000182: 4b1b ldr r3, [pc, #108] @ (200001f0 <flash_do_cmd+0xcc>)
|
|
20000184: 4a1b ldr r2, [pc, #108] @ (200001f4 <flash_do_cmd+0xd0>)
|
|
20000186: 481c ldr r0, [pc, #112] @ (200001f8 <flash_do_cmd+0xd4>)
|
|
20000188: 2180 movs r1, #128 @ 0x80
|
|
2000018a: f000 fc85 bl 20000a98 <____assert_func_veneer>
|
|
2000018e: 2b00 cmp r3, #0
|
|
20000190: d007 beq.n 200001a2 <flash_do_cmd+0x7e>
|
|
20000192: 2a00 cmp r2, #0
|
|
20000194: d005 beq.n 200001a2 <flash_do_cmd+0x7e>
|
|
20000196: 23c0 movs r3, #192 @ 0xc0
|
|
20000198: 055b lsls r3, r3, #21
|
|
2000019a: 6e1b ldr r3, [r3, #96] @ 0x60
|
|
2000019c: 7033 strb r3, [r6, #0]
|
|
2000019e: 3a01 subs r2, #1
|
|
200001a0: 3601 adds r6, #1
|
|
200001a2: 002b movs r3, r5
|
|
200001a4: 4313 orrs r3, r2
|
|
200001a6: d012 beq.n 200001ce <flash_do_cmd+0xaa>
|
|
200001a8: 23c0 movs r3, #192 @ 0xc0
|
|
200001aa: 055b lsls r3, r3, #21
|
|
200001ac: 6a9c ldr r4, [r3, #40] @ 0x28
|
|
200001ae: 2308 movs r3, #8
|
|
200001b0: 4023 ands r3, r4
|
|
200001b2: 07a4 lsls r4, r4, #30
|
|
200001b4: d5eb bpl.n 2000018e <flash_do_cmd+0x6a>
|
|
200001b6: 2d00 cmp r5, #0
|
|
200001b8: d0e9 beq.n 2000018e <flash_do_cmd+0x6a>
|
|
200001ba: 1b51 subs r1, r2, r5
|
|
200001bc: 290d cmp r1, #13
|
|
200001be: d8e6 bhi.n 2000018e <flash_do_cmd+0x6a>
|
|
200001c0: 7838 ldrb r0, [r7, #0]
|
|
200001c2: 21c0 movs r1, #192 @ 0xc0
|
|
200001c4: 0549 lsls r1, r1, #21
|
|
200001c6: 6608 str r0, [r1, #96] @ 0x60
|
|
200001c8: 3d01 subs r5, #1
|
|
200001ca: 3701 adds r7, #1
|
|
200001cc: e7df b.n 2000018e <flash_do_cmd+0x6a>
|
|
200001ce: 2001 movs r0, #1
|
|
200001d0: f7ff ff94 bl 200000fc <flash_cs_force>
|
|
200001d4: 47c0 blx r8
|
|
200001d6: f7ff ff8b bl 200000f0 <flash_enable_xip_via_boot2>
|
|
200001da: bce0 pop {r5, r6, r7}
|
|
200001dc: 46ba mov sl, r7
|
|
200001de: 46b1 mov r9, r6
|
|
200001e0: 46a8 mov r8, r5
|
|
200001e2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
200001e4: 00004649 .word 0x00004649
|
|
200001e8: 00005845 .word 0x00005845
|
|
200001ec: 00004346 .word 0x00004346
|
|
200001f0: 100093e4 .word 0x100093e4
|
|
200001f4: 10009424 .word 0x10009424
|
|
200001f8: 100092f8 .word 0x100092f8
|
|
|
|
200001fc <mutex_try_enter>:
|
|
200001fc: b570 push {r4, r5, r6, lr}
|
|
200001fe: 0004 movs r4, r0
|
|
20000200: 6802 ldr r2, [r0, #0]
|
|
20000202: f3ef 8510 mrs r5, PRIMASK
|
|
20000206: b672 cpsid i
|
|
20000208: 6813 ldr r3, [r2, #0]
|
|
2000020a: 2b00 cmp r3, #0
|
|
2000020c: d0fc beq.n 20000208 <mutex_try_enter+0xc>
|
|
2000020e: f3bf 8f5f dmb sy
|
|
20000212: 6863 ldr r3, [r4, #4]
|
|
20000214: 1c5a adds r2, r3, #1
|
|
20000216: d00b beq.n 20000230 <mutex_try_enter+0x34>
|
|
20000218: 2900 cmp r1, #0
|
|
2000021a: d00e beq.n 2000023a <mutex_try_enter+0x3e>
|
|
2000021c: 600b str r3, [r1, #0]
|
|
2000021e: 2000 movs r0, #0
|
|
20000220: 6823 ldr r3, [r4, #0]
|
|
20000222: f3bf 8f5f dmb sy
|
|
20000226: 2200 movs r2, #0
|
|
20000228: 601a str r2, [r3, #0]
|
|
2000022a: f385 8810 msr PRIMASK, r5
|
|
2000022e: bd70 pop {r4, r5, r6, pc}
|
|
20000230: f000 fc22 bl 20000a78 <__ulPortLockGetCurrentOwnerId_veneer>
|
|
20000234: 6060 str r0, [r4, #4]
|
|
20000236: 2001 movs r0, #1
|
|
20000238: e7f2 b.n 20000220 <mutex_try_enter+0x24>
|
|
2000023a: 2000 movs r0, #0
|
|
2000023c: e7f0 b.n 20000220 <mutex_try_enter+0x24>
|
|
...
|
|
|
|
20000240 <mutex_enter_block_until>:
|
|
20000240: b5f0 push {r4, r5, r6, r7, lr}
|
|
20000242: b083 sub sp, #12
|
|
20000244: 0004 movs r4, r0
|
|
20000246: 0017 movs r7, r2
|
|
20000248: 001e movs r6, r3
|
|
2000024a: 6803 ldr r3, [r0, #0]
|
|
2000024c: 2b00 cmp r3, #0
|
|
2000024e: d017 beq.n 20000280 <mutex_enter_block_until+0x40>
|
|
20000250: f000 fc12 bl 20000a78 <__ulPortLockGetCurrentOwnerId_veneer>
|
|
20000254: 9001 str r0, [sp, #4]
|
|
20000256: 6825 ldr r5, [r4, #0]
|
|
20000258: f3ef 8110 mrs r1, PRIMASK
|
|
2000025c: b672 cpsid i
|
|
2000025e: 6828 ldr r0, [r5, #0]
|
|
20000260: 2800 cmp r0, #0
|
|
20000262: d0fc beq.n 2000025e <mutex_enter_block_until+0x1e>
|
|
20000264: f3bf 8f5f dmb sy
|
|
20000268: 6865 ldr r5, [r4, #4]
|
|
2000026a: 3501 adds r5, #1
|
|
2000026c: d00e beq.n 2000028c <mutex_enter_block_until+0x4c>
|
|
2000026e: 003a movs r2, r7
|
|
20000270: 0033 movs r3, r6
|
|
20000272: 0020 movs r0, r4
|
|
20000274: f000 fbf8 bl 20000a68 <__xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout_veneer>
|
|
20000278: 2800 cmp r0, #0
|
|
2000027a: d0ec beq.n 20000256 <mutex_enter_block_until+0x16>
|
|
2000027c: 2000 movs r0, #0
|
|
2000027e: e00f b.n 200002a0 <mutex_enter_block_until+0x60>
|
|
20000280: 4b08 ldr r3, [pc, #32] @ (200002a4 <mutex_enter_block_until+0x64>)
|
|
20000282: 4a09 ldr r2, [pc, #36] @ (200002a8 <mutex_enter_block_until+0x68>)
|
|
20000284: 4809 ldr r0, [pc, #36] @ (200002ac <mutex_enter_block_until+0x6c>)
|
|
20000286: 2185 movs r1, #133 @ 0x85
|
|
20000288: f000 fc06 bl 20000a98 <____assert_func_veneer>
|
|
2000028c: 9b01 ldr r3, [sp, #4]
|
|
2000028e: 6063 str r3, [r4, #4]
|
|
20000290: 6823 ldr r3, [r4, #0]
|
|
20000292: f3bf 8f5f dmb sy
|
|
20000296: 2200 movs r2, #0
|
|
20000298: 601a str r2, [r3, #0]
|
|
2000029a: f381 8810 msr PRIMASK, r1
|
|
2000029e: 2001 movs r0, #1
|
|
200002a0: b003 add sp, #12
|
|
200002a2: bdf0 pop {r4, r5, r6, r7, pc}
|
|
200002a4: 10009810 .word 0x10009810
|
|
200002a8: 10009868 .word 0x10009868
|
|
200002ac: 100097d8 .word 0x100097d8
|
|
|
|
200002b0 <mutex_try_enter_block_until>:
|
|
200002b0: b5f0 push {r4, r5, r6, r7, lr}
|
|
200002b2: b083 sub sp, #12
|
|
200002b4: 0007 movs r7, r0
|
|
200002b6: 0016 movs r6, r2
|
|
200002b8: 001d movs r5, r3
|
|
200002ba: a901 add r1, sp, #4
|
|
200002bc: f7ff ff9e bl 200001fc <mutex_try_enter>
|
|
200002c0: 1e04 subs r4, r0, #0
|
|
200002c2: d002 beq.n 200002ca <mutex_try_enter_block_until+0x1a>
|
|
200002c4: 0020 movs r0, r4
|
|
200002c6: b003 add sp, #12
|
|
200002c8: bdf0 pop {r4, r5, r6, r7, pc}
|
|
200002ca: f000 fbd5 bl 20000a78 <__ulPortLockGetCurrentOwnerId_veneer>
|
|
200002ce: 9b01 ldr r3, [sp, #4]
|
|
200002d0: 4298 cmp r0, r3
|
|
200002d2: d0f7 beq.n 200002c4 <mutex_try_enter_block_until+0x14>
|
|
200002d4: 0032 movs r2, r6
|
|
200002d6: 002b movs r3, r5
|
|
200002d8: 0038 movs r0, r7
|
|
200002da: f7ff ffb1 bl 20000240 <mutex_enter_block_until>
|
|
200002de: 0004 movs r4, r0
|
|
200002e0: e7f0 b.n 200002c4 <mutex_try_enter_block_until+0x14>
|
|
|
|
200002e2 <mutex_enter_timeout_ms>:
|
|
200002e2: b510 push {r4, lr}
|
|
200002e4: b082 sub sp, #8
|
|
200002e6: 0004 movs r4, r0
|
|
200002e8: 4668 mov r0, sp
|
|
200002ea: f000 fbad bl 20000a48 <__make_timeout_time_ms_veneer>
|
|
200002ee: 9a00 ldr r2, [sp, #0]
|
|
200002f0: 9b01 ldr r3, [sp, #4]
|
|
200002f2: 0020 movs r0, r4
|
|
200002f4: f7ff ffa4 bl 20000240 <mutex_enter_block_until>
|
|
200002f8: b002 add sp, #8
|
|
200002fa: bd10 pop {r4, pc}
|
|
|
|
200002fc <mutex_exit>:
|
|
200002fc: b510 push {r4, lr}
|
|
200002fe: 6802 ldr r2, [r0, #0]
|
|
20000300: f3ef 8110 mrs r1, PRIMASK
|
|
20000304: b672 cpsid i
|
|
20000306: 6813 ldr r3, [r2, #0]
|
|
20000308: 2b00 cmp r3, #0
|
|
2000030a: d0fc beq.n 20000306 <mutex_exit+0xa>
|
|
2000030c: f3bf 8f5f dmb sy
|
|
20000310: 6843 ldr r3, [r0, #4]
|
|
20000312: 3301 adds r3, #1
|
|
20000314: d005 beq.n 20000322 <mutex_exit+0x26>
|
|
20000316: 2301 movs r3, #1
|
|
20000318: 425b negs r3, r3
|
|
2000031a: 6043 str r3, [r0, #4]
|
|
2000031c: f000 fbb4 bl 20000a88 <__vPortLockInternalSpinUnlockWithNotify_veneer>
|
|
20000320: bd10 pop {r4, pc}
|
|
20000322: 4b03 ldr r3, [pc, #12] @ (20000330 <mutex_exit+0x34>)
|
|
20000324: 4a03 ldr r2, [pc, #12] @ (20000334 <mutex_exit+0x38>)
|
|
20000326: 4804 ldr r0, [pc, #16] @ (20000338 <mutex_exit+0x3c>)
|
|
20000328: 21b4 movs r1, #180 @ 0xb4
|
|
2000032a: f000 fbb5 bl 20000a98 <____assert_func_veneer>
|
|
2000032e: 46c0 nop @ (mov r8, r8)
|
|
20000330: 10009824 .word 0x10009824
|
|
20000334: 1000985c .word 0x1000985c
|
|
20000338: 100097d8 .word 0x100097d8
|
|
|
|
2000033c <reset_non_control_endpoints>:
|
|
2000033c: b510 push {r4, lr}
|
|
2000033e: 2300 movs r3, #0
|
|
20000340: e008 b.n 20000354 <reset_non_control_endpoints+0x18>
|
|
20000342: 3301 adds r3, #1
|
|
20000344: 00da lsls r2, r3, #3
|
|
20000346: 2100 movs r1, #0
|
|
20000348: 4808 ldr r0, [pc, #32] @ (2000036c <reset_non_control_endpoints+0x30>)
|
|
2000034a: 5011 str r1, [r2, r0]
|
|
2000034c: 4684 mov ip, r0
|
|
2000034e: 4462 add r2, ip
|
|
20000350: 6051 str r1, [r2, #4]
|
|
20000352: b2db uxtb r3, r3
|
|
20000354: 2b0e cmp r3, #14
|
|
20000356: d9f4 bls.n 20000342 <reset_non_control_endpoints+0x6>
|
|
20000358: 4805 ldr r0, [pc, #20] @ (20000370 <reset_non_control_endpoints+0x34>)
|
|
2000035a: 22f0 movs r2, #240 @ 0xf0
|
|
2000035c: 0092 lsls r2, r2, #2
|
|
2000035e: 2100 movs r1, #0
|
|
20000360: f000 fbaa bl 20000ab8 <____wrap_memset_veneer>
|
|
20000364: 4b03 ldr r3, [pc, #12] @ (20000374 <reset_non_control_endpoints+0x38>)
|
|
20000366: 4a04 ldr r2, [pc, #16] @ (20000378 <reset_non_control_endpoints+0x3c>)
|
|
20000368: 601a str r2, [r3, #0]
|
|
2000036a: bd10 pop {r4, pc}
|
|
2000036c: 50100000 .word 0x50100000
|
|
20000370: 20001340 .word 0x20001340
|
|
20000374: 20001704 .word 0x20001704
|
|
20000378: 50100180 .word 0x50100180
|
|
|
|
2000037c <hw_handle_buff_status>:
|
|
2000037c: b5f0 push {r4, r5, r6, r7, lr}
|
|
2000037e: 46ce mov lr, r9
|
|
20000380: 4647 mov r7, r8
|
|
20000382: b580 push {r7, lr}
|
|
20000384: b085 sub sp, #20
|
|
20000386: 4b23 ldr r3, [pc, #140] @ (20000414 <hw_handle_buff_status+0x98>)
|
|
20000388: 6d9f ldr r7, [r3, #88] @ 0x58
|
|
2000038a: 2400 movs r4, #0
|
|
2000038c: 2601 movs r6, #1
|
|
2000038e: e003 b.n 20000398 <hw_handle_buff_status+0x1c>
|
|
20000390: 43b7 bics r7, r6
|
|
20000392: 0076 lsls r6, r6, #1
|
|
20000394: 3401 adds r4, #1
|
|
20000396: b2e4 uxtb r4, r4
|
|
20000398: 2f00 cmp r7, #0
|
|
2000039a: d036 beq.n 2000040a <hw_handle_buff_status+0x8e>
|
|
2000039c: 2c1f cmp r4, #31
|
|
2000039e: d834 bhi.n 2000040a <hw_handle_buff_status+0x8e>
|
|
200003a0: 423e tst r6, r7
|
|
200003a2: d0f6 beq.n 20000392 <hw_handle_buff_status+0x16>
|
|
200003a4: 4b1c ldr r3, [pc, #112] @ (20000418 <hw_handle_buff_status+0x9c>)
|
|
200003a6: 659e str r6, [r3, #88] @ 0x58
|
|
200003a8: 0863 lsrs r3, r4, #1
|
|
200003aa: 4699 mov r9, r3
|
|
200003ac: 2301 movs r3, #1
|
|
200003ae: 4063 eors r3, r4
|
|
200003b0: 2201 movs r2, #1
|
|
200003b2: 401a ands r2, r3
|
|
200003b4: 4690 mov r8, r2
|
|
200003b6: 464b mov r3, r9
|
|
200003b8: 005d lsls r5, r3, #1
|
|
200003ba: 4445 add r5, r8
|
|
200003bc: 016d lsls r5, r5, #5
|
|
200003be: 4b17 ldr r3, [pc, #92] @ (2000041c <hw_handle_buff_status+0xa0>)
|
|
200003c0: 18ed adds r5, r5, r3
|
|
200003c2: 0028 movs r0, r5
|
|
200003c4: f000 fa2e bl 20000824 <hw_endpoint_xfer_continue>
|
|
200003c8: 2800 cmp r0, #0
|
|
200003ca: d0e1 beq.n 20000390 <hw_handle_buff_status+0x14>
|
|
200003cc: 4a13 ldr r2, [pc, #76] @ (2000041c <hw_handle_buff_status+0xa0>)
|
|
200003ce: 464b mov r3, r9
|
|
200003d0: 005b lsls r3, r3, #1
|
|
200003d2: 4443 add r3, r8
|
|
200003d4: 015b lsls r3, r3, #5
|
|
200003d6: 18d3 adds r3, r2, r3
|
|
200003d8: 789a ldrb r2, [r3, #2]
|
|
200003da: 4691 mov r9, r2
|
|
200003dc: 8adb ldrh r3, [r3, #22]
|
|
200003de: 4698 mov r8, r3
|
|
200003e0: 220c movs r2, #12
|
|
200003e2: 2100 movs r1, #0
|
|
200003e4: a801 add r0, sp, #4
|
|
200003e6: f000 fb67 bl 20000ab8 <____wrap_memset_veneer>
|
|
200003ea: 2307 movs r3, #7
|
|
200003ec: 466a mov r2, sp
|
|
200003ee: 7153 strb r3, [r2, #5]
|
|
200003f0: 466b mov r3, sp
|
|
200003f2: 464a mov r2, r9
|
|
200003f4: 721a strb r2, [r3, #8]
|
|
200003f6: 4643 mov r3, r8
|
|
200003f8: 9303 str r3, [sp, #12]
|
|
200003fa: 2101 movs r1, #1
|
|
200003fc: a801 add r0, sp, #4
|
|
200003fe: f000 fa39 bl 20000874 <dcd_event_handler>
|
|
20000402: 0028 movs r0, r5
|
|
20000404: f000 f99e bl 20000744 <hw_endpoint_reset_transfer>
|
|
20000408: e7c2 b.n 20000390 <hw_handle_buff_status+0x14>
|
|
2000040a: b005 add sp, #20
|
|
2000040c: bcc0 pop {r6, r7}
|
|
2000040e: 46b9 mov r9, r7
|
|
20000410: 46b0 mov r8, r6
|
|
20000412: bdf0 pop {r4, r5, r6, r7, pc}
|
|
20000414: 50110000 .word 0x50110000
|
|
20000418: 50113000 .word 0x50113000
|
|
2000041c: 20001300 .word 0x20001300
|
|
|
|
20000420 <dcd_rp2040_irq>:
|
|
20000420: b570 push {r4, r5, r6, lr}
|
|
20000422: b084 sub sp, #16
|
|
20000424: 4a63 ldr r2, [pc, #396] @ (200005b4 <dcd_rp2040_irq+0x194>)
|
|
20000426: 2398 movs r3, #152 @ 0x98
|
|
20000428: 58d5 ldr r5, [r2, r3]
|
|
2000042a: 2380 movs r3, #128 @ 0x80
|
|
2000042c: 029b lsls r3, r3, #10
|
|
2000042e: 002c movs r4, r5
|
|
20000430: 401c ands r4, r3
|
|
20000432: 421d tst r5, r3
|
|
20000434: d040 beq.n 200004b8 <dcd_rp2040_irq+0x98>
|
|
20000436: 4b60 ldr r3, [pc, #384] @ (200005b8 <dcd_rp2040_irq+0x198>)
|
|
20000438: 6a9a ldr r2, [r3, #40] @ 0x28
|
|
2000043a: 4b60 ldr r3, [pc, #384] @ (200005bc <dcd_rp2040_irq+0x19c>)
|
|
2000043c: 601a str r2, [r3, #0]
|
|
2000043e: 2400 movs r4, #0
|
|
20000440: 2100 movs r1, #0
|
|
20000442: e009 b.n 20000458 <dcd_rp2040_irq+0x38>
|
|
20000444: 4b5e ldr r3, [pc, #376] @ (200005c0 <dcd_rp2040_irq+0x1a0>)
|
|
20000446: 185b adds r3, r3, r1
|
|
20000448: 333c adds r3, #60 @ 0x3c
|
|
2000044a: 2200 movs r2, #0
|
|
2000044c: 701a strb r2, [r3, #0]
|
|
2000044e: f000 f9ab bl 200007a8 <hw_endpoint_start_next_buffer>
|
|
20000452: 0031 movs r1, r6
|
|
20000454: 3401 adds r4, #1
|
|
20000456: b2e4 uxtb r4, r4
|
|
20000458: 2c0f cmp r4, #15
|
|
2000045a: d818 bhi.n 2000048e <dcd_rp2040_irq+0x6e>
|
|
2000045c: 01a6 lsls r6, r4, #6
|
|
2000045e: 0030 movs r0, r6
|
|
20000460: 3020 adds r0, #32
|
|
20000462: 4b57 ldr r3, [pc, #348] @ (200005c0 <dcd_rp2040_irq+0x1a0>)
|
|
20000464: 18c0 adds r0, r0, r3
|
|
20000466: 199b adds r3, r3, r6
|
|
20000468: 333b adds r3, #59 @ 0x3b
|
|
2000046a: 781b ldrb r3, [r3, #0]
|
|
2000046c: 2b02 cmp r3, #2
|
|
2000046e: d1f1 bne.n 20000454 <dcd_rp2040_irq+0x34>
|
|
20000470: 4b53 ldr r3, [pc, #332] @ (200005c0 <dcd_rp2040_irq+0x1a0>)
|
|
20000472: 199b adds r3, r3, r6
|
|
20000474: 333a adds r3, #58 @ 0x3a
|
|
20000476: 781e ldrb r6, [r3, #0]
|
|
20000478: 2e00 cmp r6, #0
|
|
2000047a: d0eb beq.n 20000454 <dcd_rp2040_irq+0x34>
|
|
2000047c: 4b50 ldr r3, [pc, #320] @ (200005c0 <dcd_rp2040_irq+0x1a0>)
|
|
2000047e: 01a1 lsls r1, r4, #6
|
|
20000480: 185b adds r3, r3, r1
|
|
20000482: 333c adds r3, #60 @ 0x3c
|
|
20000484: 781b ldrb r3, [r3, #0]
|
|
20000486: 2b00 cmp r3, #0
|
|
20000488: d1dc bne.n 20000444 <dcd_rp2040_irq+0x24>
|
|
2000048a: 0031 movs r1, r6
|
|
2000048c: e7e2 b.n 20000454 <dcd_rp2040_irq+0x34>
|
|
2000048e: 2900 cmp r1, #0
|
|
20000490: d108 bne.n 200004a4 <dcd_rp2040_irq+0x84>
|
|
20000492: 4b4c ldr r3, [pc, #304] @ (200005c4 <dcd_rp2040_irq+0x1a4>)
|
|
20000494: 781b ldrb r3, [r3, #0]
|
|
20000496: 2b00 cmp r3, #0
|
|
20000498: d104 bne.n 200004a4 <dcd_rp2040_irq+0x84>
|
|
2000049a: 4a4b ldr r2, [pc, #300] @ (200005c8 <dcd_rp2040_irq+0x1a8>)
|
|
2000049c: 3390 adds r3, #144 @ 0x90
|
|
2000049e: 2180 movs r1, #128 @ 0x80
|
|
200004a0: 0289 lsls r1, r1, #10
|
|
200004a2: 50d1 str r1, [r2, r3]
|
|
200004a4: 4b43 ldr r3, [pc, #268] @ (200005b4 <dcd_rp2040_irq+0x194>)
|
|
200004a6: 6c99 ldr r1, [r3, #72] @ 0x48
|
|
200004a8: 0549 lsls r1, r1, #21
|
|
200004aa: 0d49 lsrs r1, r1, #21
|
|
200004ac: 2201 movs r2, #1
|
|
200004ae: 2000 movs r0, #0
|
|
200004b0: f000 fb0a bl 20000ac8 <__dcd_event_sof_veneer>
|
|
200004b4: 2480 movs r4, #128 @ 0x80
|
|
200004b6: 02a4 lsls r4, r4, #10
|
|
200004b8: 06eb lsls r3, r5, #27
|
|
200004ba: d409 bmi.n 200004d0 <dcd_rp2040_irq+0xb0>
|
|
200004bc: 03eb lsls r3, r5, #15
|
|
200004be: d529 bpl.n 20000514 <dcd_rp2040_irq+0xf4>
|
|
200004c0: 2380 movs r3, #128 @ 0x80
|
|
200004c2: 025b lsls r3, r3, #9
|
|
200004c4: 431c orrs r4, r3
|
|
200004c6: ab01 add r3, sp, #4
|
|
200004c8: 4a40 ldr r2, [pc, #256] @ (200005cc <dcd_rp2040_irq+0x1ac>)
|
|
200004ca: 801a strh r2, [r3, #0]
|
|
200004cc: 2600 movs r6, #0
|
|
200004ce: e00b b.n 200004e8 <dcd_rp2040_irq+0xc8>
|
|
200004d0: 2310 movs r3, #16
|
|
200004d2: 431c orrs r4, r3
|
|
200004d4: f7ff ff52 bl 2000037c <hw_handle_buff_status>
|
|
200004d8: e7f0 b.n 200004bc <dcd_rp2040_irq+0x9c>
|
|
200004da: ab01 add r3, sp, #4
|
|
200004dc: 5d98 ldrb r0, [r3, r6]
|
|
200004de: f000 faa3 bl 20000a28 <__hw_endpoint_get_by_addr_veneer>
|
|
200004e2: 2301 movs r3, #1
|
|
200004e4: 70c3 strb r3, [r0, #3]
|
|
200004e6: 3601 adds r6, #1
|
|
200004e8: 2e01 cmp r6, #1
|
|
200004ea: d9f6 bls.n 200004da <dcd_rp2040_irq+0xba>
|
|
200004ec: ae01 add r6, sp, #4
|
|
200004ee: 220c movs r2, #12
|
|
200004f0: 2100 movs r1, #0
|
|
200004f2: 0030 movs r0, r6
|
|
200004f4: f000 fae0 bl 20000ab8 <____wrap_memset_veneer>
|
|
200004f8: 2306 movs r3, #6
|
|
200004fa: 7073 strb r3, [r6, #1]
|
|
200004fc: 4a34 ldr r2, [pc, #208] @ (200005d0 <dcd_rp2040_irq+0x1b0>)
|
|
200004fe: ab02 add r3, sp, #8
|
|
20000500: ca03 ldmia r2!, {r0, r1}
|
|
20000502: c303 stmia r3!, {r0, r1}
|
|
20000504: 2101 movs r1, #1
|
|
20000506: 0030 movs r0, r6
|
|
20000508: f000 f9b4 bl 20000874 <dcd_event_handler>
|
|
2000050c: 4b2e ldr r3, [pc, #184] @ (200005c8 <dcd_rp2040_irq+0x1a8>)
|
|
2000050e: 2280 movs r2, #128 @ 0x80
|
|
20000510: 0292 lsls r2, r2, #10
|
|
20000512: 651a str r2, [r3, #80] @ 0x50
|
|
20000514: 04eb lsls r3, r5, #19
|
|
20000516: d407 bmi.n 20000528 <dcd_rp2040_irq+0x108>
|
|
20000518: 046b lsls r3, r5, #17
|
|
2000051a: d41e bmi.n 2000055a <dcd_rp2040_irq+0x13a>
|
|
2000051c: 042b lsls r3, r5, #16
|
|
2000051e: d42f bmi.n 20000580 <dcd_rp2040_irq+0x160>
|
|
20000520: 42ac cmp r4, r5
|
|
20000522: d141 bne.n 200005a8 <dcd_rp2040_irq+0x188>
|
|
20000524: b004 add sp, #16
|
|
20000526: bd70 pop {r4, r5, r6, pc}
|
|
20000528: 2380 movs r3, #128 @ 0x80
|
|
2000052a: 015b lsls r3, r3, #5
|
|
2000052c: 431c orrs r4, r3
|
|
2000052e: 4b21 ldr r3, [pc, #132] @ (200005b4 <dcd_rp2040_irq+0x194>)
|
|
20000530: 2200 movs r2, #0
|
|
20000532: 601a str r2, [r3, #0]
|
|
20000534: f7ff ff02 bl 2000033c <reset_non_control_endpoints>
|
|
20000538: ae01 add r6, sp, #4
|
|
2000053a: 220c movs r2, #12
|
|
2000053c: 2100 movs r1, #0
|
|
2000053e: 0030 movs r0, r6
|
|
20000540: f000 faba bl 20000ab8 <____wrap_memset_veneer>
|
|
20000544: 2301 movs r3, #1
|
|
20000546: 7073 strb r3, [r6, #1]
|
|
20000548: 2101 movs r1, #1
|
|
2000054a: 0030 movs r0, r6
|
|
2000054c: f000 f992 bl 20000874 <dcd_event_handler>
|
|
20000550: 4b1d ldr r3, [pc, #116] @ (200005c8 <dcd_rp2040_irq+0x1a8>)
|
|
20000552: 2280 movs r2, #128 @ 0x80
|
|
20000554: 0312 lsls r2, r2, #12
|
|
20000556: 651a str r2, [r3, #80] @ 0x50
|
|
20000558: e7de b.n 20000518 <dcd_rp2040_irq+0xf8>
|
|
2000055a: 2380 movs r3, #128 @ 0x80
|
|
2000055c: 01db lsls r3, r3, #7
|
|
2000055e: 431c orrs r4, r3
|
|
20000560: ae01 add r6, sp, #4
|
|
20000562: 220c movs r2, #12
|
|
20000564: 2100 movs r1, #0
|
|
20000566: 0030 movs r0, r6
|
|
20000568: f000 faa6 bl 20000ab8 <____wrap_memset_veneer>
|
|
2000056c: 2304 movs r3, #4
|
|
2000056e: 7073 strb r3, [r6, #1]
|
|
20000570: 2101 movs r1, #1
|
|
20000572: 0030 movs r0, r6
|
|
20000574: f000 f97e bl 20000874 <dcd_event_handler>
|
|
20000578: 4b13 ldr r3, [pc, #76] @ (200005c8 <dcd_rp2040_irq+0x1a8>)
|
|
2000057a: 2210 movs r2, #16
|
|
2000057c: 651a str r2, [r3, #80] @ 0x50
|
|
2000057e: e7cd b.n 2000051c <dcd_rp2040_irq+0xfc>
|
|
20000580: 2380 movs r3, #128 @ 0x80
|
|
20000582: 021b lsls r3, r3, #8
|
|
20000584: 431c orrs r4, r3
|
|
20000586: ae01 add r6, sp, #4
|
|
20000588: 220c movs r2, #12
|
|
2000058a: 2100 movs r1, #0
|
|
2000058c: 0030 movs r0, r6
|
|
2000058e: f000 fa93 bl 20000ab8 <____wrap_memset_veneer>
|
|
20000592: 2305 movs r3, #5
|
|
20000594: 7073 strb r3, [r6, #1]
|
|
20000596: 2101 movs r1, #1
|
|
20000598: 0030 movs r0, r6
|
|
2000059a: f000 f96b bl 20000874 <dcd_event_handler>
|
|
2000059e: 4b0a ldr r3, [pc, #40] @ (200005c8 <dcd_rp2040_irq+0x1a8>)
|
|
200005a0: 2280 movs r2, #128 @ 0x80
|
|
200005a2: 0112 lsls r2, r2, #4
|
|
200005a4: 651a str r2, [r3, #80] @ 0x50
|
|
200005a6: e7bb b.n 20000520 <dcd_rp2040_irq+0x100>
|
|
200005a8: 0021 movs r1, r4
|
|
200005aa: 4069 eors r1, r5
|
|
200005ac: 4809 ldr r0, [pc, #36] @ (200005d4 <dcd_rp2040_irq+0x1b4>)
|
|
200005ae: f000 fa7b bl 20000aa8 <__panic_veneer>
|
|
200005b2: 46c0 nop @ (mov r8, r8)
|
|
200005b4: 50110000 .word 0x50110000
|
|
200005b8: 40054000 .word 0x40054000
|
|
200005bc: 200012ec .word 0x200012ec
|
|
200005c0: 20001300 .word 0x20001300
|
|
200005c4: 20021d3d .word 0x20021d3d
|
|
200005c8: 50113000 .word 0x50113000
|
|
200005cc: ffff8000 .word 0xffff8000
|
|
200005d0: 50100000 .word 0x50100000
|
|
200005d4: 1000a5ec .word 0x1000a5ec
|
|
|
|
200005d8 <e15_is_bulkin_ep>:
|
|
200005d8: 4b09 ldr r3, [pc, #36] @ (20000600 <e15_is_bulkin_ep+0x28>)
|
|
200005da: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
200005dc: 079b lsls r3, r3, #30
|
|
200005de: d40c bmi.n 200005fa <e15_is_bulkin_ep+0x22>
|
|
200005e0: 7883 ldrb r3, [r0, #2]
|
|
200005e2: 09db lsrs r3, r3, #7
|
|
200005e4: 2b01 cmp r3, #1
|
|
200005e6: d001 beq.n 200005ec <e15_is_bulkin_ep+0x14>
|
|
200005e8: 2000 movs r0, #0
|
|
200005ea: e007 b.n 200005fc <e15_is_bulkin_ep+0x24>
|
|
200005ec: 7ec3 ldrb r3, [r0, #27]
|
|
200005ee: 2b02 cmp r3, #2
|
|
200005f0: d001 beq.n 200005f6 <e15_is_bulkin_ep+0x1e>
|
|
200005f2: 2000 movs r0, #0
|
|
200005f4: e002 b.n 200005fc <e15_is_bulkin_ep+0x24>
|
|
200005f6: 2001 movs r0, #1
|
|
200005f8: e000 b.n 200005fc <e15_is_bulkin_ep+0x24>
|
|
200005fa: 2000 movs r0, #0
|
|
200005fc: 4770 bx lr
|
|
200005fe: 46c0 nop @ (mov r8, r8)
|
|
20000600: 50110000 .word 0x50110000
|
|
|
|
20000604 <e15_is_critical_frame_period>:
|
|
20000604: b510 push {r4, lr}
|
|
20000606: f7ff ffe7 bl 200005d8 <e15_is_bulkin_ep>
|
|
2000060a: 2800 cmp r0, #0
|
|
2000060c: d009 beq.n 20000622 <e15_is_critical_frame_period+0x1e>
|
|
2000060e: 4b06 ldr r3, [pc, #24] @ (20000628 <e15_is_critical_frame_period+0x24>)
|
|
20000610: 6a9b ldr r3, [r3, #40] @ 0x28
|
|
20000612: 4a06 ldr r2, [pc, #24] @ (2000062c <e15_is_critical_frame_period+0x28>)
|
|
20000614: 6812 ldr r2, [r2, #0]
|
|
20000616: 1a9b subs r3, r3, r2
|
|
20000618: 4a05 ldr r2, [pc, #20] @ (20000630 <e15_is_critical_frame_period+0x2c>)
|
|
2000061a: 4694 mov ip, r2
|
|
2000061c: 4463 add r3, ip
|
|
2000061e: 2bc6 cmp r3, #198 @ 0xc6
|
|
20000620: d800 bhi.n 20000624 <e15_is_critical_frame_period+0x20>
|
|
20000622: bd10 pop {r4, pc}
|
|
20000624: 2000 movs r0, #0
|
|
20000626: e7fc b.n 20000622 <e15_is_critical_frame_period+0x1e>
|
|
20000628: 40054000 .word 0x40054000
|
|
2000062c: 200012ec .word 0x200012ec
|
|
20000630: fffffce0 .word 0xfffffce0
|
|
|
|
20000634 <prepare_ep_buffer>:
|
|
20000634: b5f8 push {r3, r4, r5, r6, r7, lr}
|
|
20000636: 0004 movs r4, r0
|
|
20000638: 000f movs r7, r1
|
|
2000063a: 8a83 ldrh r3, [r0, #20]
|
|
2000063c: 8b02 ldrh r2, [r0, #24]
|
|
2000063e: 1c1e adds r6, r3, #0
|
|
20000640: 4293 cmp r3, r2
|
|
20000642: d900 bls.n 20000646 <prepare_ep_buffer+0x12>
|
|
20000644: 1c16 adds r6, r2, #0
|
|
20000646: b2b6 uxth r6, r6
|
|
20000648: 1b9b subs r3, r3, r6
|
|
2000064a: 82a3 strh r3, [r4, #20]
|
|
2000064c: 2280 movs r2, #128 @ 0x80
|
|
2000064e: 00d2 lsls r2, r2, #3
|
|
20000650: 4332 orrs r2, r6
|
|
20000652: 78e3 ldrb r3, [r4, #3]
|
|
20000654: 2b00 cmp r3, #0
|
|
20000656: d013 beq.n 20000680 <prepare_ep_buffer+0x4c>
|
|
20000658: 2580 movs r5, #128 @ 0x80
|
|
2000065a: 01ad lsls r5, r5, #6
|
|
2000065c: 4315 orrs r5, r2
|
|
2000065e: 2201 movs r2, #1
|
|
20000660: 4053 eors r3, r2
|
|
20000662: 70e3 strb r3, [r4, #3]
|
|
20000664: 7863 ldrb r3, [r4, #1]
|
|
20000666: 2b00 cmp r3, #0
|
|
20000668: d00c beq.n 20000684 <prepare_ep_buffer+0x50>
|
|
2000066a: 8aa3 ldrh r3, [r4, #20]
|
|
2000066c: 2b00 cmp r3, #0
|
|
2000066e: d102 bne.n 20000676 <prepare_ep_buffer+0x42>
|
|
20000670: 2380 movs r3, #128 @ 0x80
|
|
20000672: 01db lsls r3, r3, #7
|
|
20000674: 431d orrs r5, r3
|
|
20000676: 2f00 cmp r7, #0
|
|
20000678: d000 beq.n 2000067c <prepare_ep_buffer+0x48>
|
|
2000067a: 042d lsls r5, r5, #16
|
|
2000067c: 0028 movs r0, r5
|
|
2000067e: bdf8 pop {r3, r4, r5, r6, r7, pc}
|
|
20000680: 2500 movs r5, #0
|
|
20000682: e7eb b.n 2000065c <prepare_ep_buffer+0x28>
|
|
20000684: 68e0 ldr r0, [r4, #12]
|
|
20000686: 01bb lsls r3, r7, #6
|
|
20000688: 18c0 adds r0, r0, r3
|
|
2000068a: 6921 ldr r1, [r4, #16]
|
|
2000068c: 0032 movs r2, r6
|
|
2000068e: f000 fa23 bl 20000ad8 <____wrap_memcpy_veneer>
|
|
20000692: 6923 ldr r3, [r4, #16]
|
|
20000694: 199b adds r3, r3, r6
|
|
20000696: 6123 str r3, [r4, #16]
|
|
20000698: 2380 movs r3, #128 @ 0x80
|
|
2000069a: 021b lsls r3, r3, #8
|
|
2000069c: 431d orrs r5, r3
|
|
2000069e: e7e4 b.n 2000066a <prepare_ep_buffer+0x36>
|
|
|
|
200006a0 <sync_ep_buffer>:
|
|
200006a0: b570 push {r4, r5, r6, lr}
|
|
200006a2: 0004 movs r4, r0
|
|
200006a4: 6883 ldr r3, [r0, #8]
|
|
200006a6: 681b ldr r3, [r3, #0]
|
|
200006a8: 2900 cmp r1, #0
|
|
200006aa: d000 beq.n 200006ae <sync_ep_buffer+0xe>
|
|
200006ac: 0c1b lsrs r3, r3, #16
|
|
200006ae: 059d lsls r5, r3, #22
|
|
200006b0: 0dad lsrs r5, r5, #22
|
|
200006b2: 7862 ldrb r2, [r4, #1]
|
|
200006b4: 2a00 cmp r2, #0
|
|
200006b6: d112 bne.n 200006de <sync_ep_buffer+0x3e>
|
|
200006b8: 041b lsls r3, r3, #16
|
|
200006ba: d409 bmi.n 200006d0 <sync_ep_buffer+0x30>
|
|
200006bc: 8ae3 ldrh r3, [r4, #22]
|
|
200006be: 195b adds r3, r3, r5
|
|
200006c0: 82e3 strh r3, [r4, #22]
|
|
200006c2: 8b23 ldrh r3, [r4, #24]
|
|
200006c4: 42ab cmp r3, r5
|
|
200006c6: d901 bls.n 200006cc <sync_ep_buffer+0x2c>
|
|
200006c8: 2300 movs r3, #0
|
|
200006ca: 82a3 strh r3, [r4, #20]
|
|
200006cc: 0028 movs r0, r5
|
|
200006ce: bd70 pop {r4, r5, r6, pc}
|
|
200006d0: 4b0e ldr r3, [pc, #56] @ (2000070c <sync_ep_buffer+0x6c>)
|
|
200006d2: 4a0f ldr r2, [pc, #60] @ (20000710 <sync_ep_buffer+0x70>)
|
|
200006d4: 2181 movs r1, #129 @ 0x81
|
|
200006d6: 480f ldr r0, [pc, #60] @ (20000714 <sync_ep_buffer+0x74>)
|
|
200006d8: 0049 lsls r1, r1, #1
|
|
200006da: f000 f9dd bl 20000a98 <____assert_func_veneer>
|
|
200006de: 041b lsls r3, r3, #16
|
|
200006e0: d50d bpl.n 200006fe <sync_ep_buffer+0x5e>
|
|
200006e2: 6920 ldr r0, [r4, #16]
|
|
200006e4: 68e3 ldr r3, [r4, #12]
|
|
200006e6: 0189 lsls r1, r1, #6
|
|
200006e8: 1859 adds r1, r3, r1
|
|
200006ea: 002a movs r2, r5
|
|
200006ec: f000 f9f4 bl 20000ad8 <____wrap_memcpy_veneer>
|
|
200006f0: 8ae3 ldrh r3, [r4, #22]
|
|
200006f2: 195b adds r3, r3, r5
|
|
200006f4: 82e3 strh r3, [r4, #22]
|
|
200006f6: 6923 ldr r3, [r4, #16]
|
|
200006f8: 195b adds r3, r3, r5
|
|
200006fa: 6123 str r3, [r4, #16]
|
|
200006fc: e7e1 b.n 200006c2 <sync_ep_buffer+0x22>
|
|
200006fe: 4b06 ldr r3, [pc, #24] @ (20000718 <sync_ep_buffer+0x78>)
|
|
20000700: 4a03 ldr r2, [pc, #12] @ (20000710 <sync_ep_buffer+0x70>)
|
|
20000702: 210a movs r1, #10
|
|
20000704: 4803 ldr r0, [pc, #12] @ (20000714 <sync_ep_buffer+0x74>)
|
|
20000706: 31ff adds r1, #255 @ 0xff
|
|
20000708: f000 f9c6 bl 20000a98 <____assert_func_veneer>
|
|
2000070c: 1000a66c .word 0x1000a66c
|
|
20000710: 1000a754 .word 0x1000a754
|
|
20000714: 1000a68c .word 0x1000a68c
|
|
20000718: 1000a6e0 .word 0x1000a6e0
|
|
|
|
2000071c <_hw_endpoint_xfer_sync>:
|
|
2000071c: b510 push {r4, lr}
|
|
2000071e: 0004 movs r4, r0
|
|
20000720: 6883 ldr r3, [r0, #8]
|
|
20000722: 681b ldr r3, [r3, #0]
|
|
20000724: 2100 movs r1, #0
|
|
20000726: f7ff ffbb bl 200006a0 <sync_ep_buffer>
|
|
2000072a: 6863 ldr r3, [r4, #4]
|
|
2000072c: 681b ldr r3, [r3, #0]
|
|
2000072e: 005b lsls r3, r3, #1
|
|
20000730: d502 bpl.n 20000738 <_hw_endpoint_xfer_sync+0x1c>
|
|
20000732: 8b23 ldrh r3, [r4, #24]
|
|
20000734: 4283 cmp r3, r0
|
|
20000736: d000 beq.n 2000073a <_hw_endpoint_xfer_sync+0x1e>
|
|
20000738: bd10 pop {r4, pc}
|
|
2000073a: 2101 movs r1, #1
|
|
2000073c: 0020 movs r0, r4
|
|
2000073e: f7ff ffaf bl 200006a0 <sync_ep_buffer>
|
|
20000742: e7f9 b.n 20000738 <_hw_endpoint_xfer_sync+0x1c>
|
|
|
|
20000744 <hw_endpoint_reset_transfer>:
|
|
20000744: 2300 movs r3, #0
|
|
20000746: 7683 strb r3, [r0, #26]
|
|
20000748: 8283 strh r3, [r0, #20]
|
|
2000074a: 82c3 strh r3, [r0, #22]
|
|
2000074c: 6103 str r3, [r0, #16]
|
|
2000074e: 4770 bx lr
|
|
|
|
20000750 <_hw_endpoint_buffer_control_update32>:
|
|
20000750: b510 push {r4, lr}
|
|
20000752: 2900 cmp r1, #0
|
|
20000754: d002 beq.n 2000075c <_hw_endpoint_buffer_control_update32+0xc>
|
|
20000756: 6883 ldr r3, [r0, #8]
|
|
20000758: 681b ldr r3, [r3, #0]
|
|
2000075a: 4019 ands r1, r3
|
|
2000075c: 2a00 cmp r2, #0
|
|
2000075e: d00f beq.n 20000780 <_hw_endpoint_buffer_control_update32+0x30>
|
|
20000760: 4311 orrs r1, r2
|
|
20000762: 0552 lsls r2, r2, #21
|
|
20000764: d50c bpl.n 20000780 <_hw_endpoint_buffer_control_update32+0x30>
|
|
20000766: 6882 ldr r2, [r0, #8]
|
|
20000768: 6813 ldr r3, [r2, #0]
|
|
2000076a: 055b lsls r3, r3, #21
|
|
2000076c: d40b bmi.n 20000786 <_hw_endpoint_buffer_control_update32+0x36>
|
|
2000076e: 4b0b ldr r3, [pc, #44] @ (2000079c <_hw_endpoint_buffer_control_update32+0x4c>)
|
|
20000770: 400b ands r3, r1
|
|
20000772: 6013 str r3, [r2, #0]
|
|
20000774: e7ff b.n 20000776 <_hw_endpoint_buffer_control_update32+0x26>
|
|
20000776: e7ff b.n 20000778 <_hw_endpoint_buffer_control_update32+0x28>
|
|
20000778: e7ff b.n 2000077a <_hw_endpoint_buffer_control_update32+0x2a>
|
|
2000077a: e7ff b.n 2000077c <_hw_endpoint_buffer_control_update32+0x2c>
|
|
2000077c: e7ff b.n 2000077e <_hw_endpoint_buffer_control_update32+0x2e>
|
|
2000077e: e7ff b.n 20000780 <_hw_endpoint_buffer_control_update32+0x30>
|
|
20000780: 6883 ldr r3, [r0, #8]
|
|
20000782: 6019 str r1, [r3, #0]
|
|
20000784: bd10 pop {r4, pc}
|
|
20000786: 7883 ldrb r3, [r0, #2]
|
|
20000788: 217f movs r1, #127 @ 0x7f
|
|
2000078a: 4019 ands r1, r3
|
|
2000078c: 09db lsrs r3, r3, #7
|
|
2000078e: 4a04 ldr r2, [pc, #16] @ (200007a0 <_hw_endpoint_buffer_control_update32+0x50>)
|
|
20000790: 009b lsls r3, r3, #2
|
|
20000792: 4804 ldr r0, [pc, #16] @ (200007a4 <_hw_endpoint_buffer_control_update32+0x54>)
|
|
20000794: 589a ldr r2, [r3, r2]
|
|
20000796: f000 f987 bl 20000aa8 <__panic_veneer>
|
|
2000079a: 46c0 nop @ (mov r8, r8)
|
|
2000079c: fffffbff .word 0xfffffbff
|
|
200007a0: 20000b98 .word 0x20000b98
|
|
200007a4: 1000a700 .word 0x1000a700
|
|
|
|
200007a8 <hw_endpoint_start_next_buffer>:
|
|
200007a8: b570 push {r4, r5, r6, lr}
|
|
200007aa: 0004 movs r4, r0
|
|
200007ac: 6843 ldr r3, [r0, #4]
|
|
200007ae: 681e ldr r6, [r3, #0]
|
|
200007b0: 2100 movs r1, #0
|
|
200007b2: f7ff ff3f bl 20000634 <prepare_ep_buffer>
|
|
200007b6: 2580 movs r5, #128 @ 0x80
|
|
200007b8: 016d lsls r5, r5, #5
|
|
200007ba: 4305 orrs r5, r0
|
|
200007bc: 4b16 ldr r3, [pc, #88] @ (20000818 <hw_endpoint_start_next_buffer+0x70>)
|
|
200007be: 6c1b ldr r3, [r3, #64] @ 0x40
|
|
200007c0: 079b lsls r3, r3, #30
|
|
200007c2: d515 bpl.n 200007f0 <hw_endpoint_start_next_buffer+0x48>
|
|
200007c4: 78a3 ldrb r3, [r4, #2]
|
|
200007c6: 065b lsls r3, r3, #25
|
|
200007c8: d117 bne.n 200007fa <hw_endpoint_start_next_buffer+0x52>
|
|
200007ca: 2300 movs r3, #0
|
|
200007cc: 8aa2 ldrh r2, [r4, #20]
|
|
200007ce: 2a00 cmp r2, #0
|
|
200007d0: d001 beq.n 200007d6 <hw_endpoint_start_next_buffer+0x2e>
|
|
200007d2: 2b00 cmp r3, #0
|
|
200007d4: d015 beq.n 20000802 <hw_endpoint_start_next_buffer+0x5a>
|
|
200007d6: 4b11 ldr r3, [pc, #68] @ (2000081c <hw_endpoint_start_next_buffer+0x74>)
|
|
200007d8: 401e ands r6, r3
|
|
200007da: 2380 movs r3, #128 @ 0x80
|
|
200007dc: 059b lsls r3, r3, #22
|
|
200007de: 4333 orrs r3, r6
|
|
200007e0: 6862 ldr r2, [r4, #4]
|
|
200007e2: 6013 str r3, [r2, #0]
|
|
200007e4: 002a movs r2, r5
|
|
200007e6: 2100 movs r1, #0
|
|
200007e8: 0020 movs r0, r4
|
|
200007ea: f7ff ffb1 bl 20000750 <_hw_endpoint_buffer_control_update32>
|
|
200007ee: bd70 pop {r4, r5, r6, pc}
|
|
200007f0: 78a3 ldrb r3, [r4, #2]
|
|
200007f2: 09db lsrs r3, r3, #7
|
|
200007f4: d103 bne.n 200007fe <hw_endpoint_start_next_buffer+0x56>
|
|
200007f6: 3301 adds r3, #1
|
|
200007f8: e7e8 b.n 200007cc <hw_endpoint_start_next_buffer+0x24>
|
|
200007fa: 2301 movs r3, #1
|
|
200007fc: e7e6 b.n 200007cc <hw_endpoint_start_next_buffer+0x24>
|
|
200007fe: 2300 movs r3, #0
|
|
20000800: e7e4 b.n 200007cc <hw_endpoint_start_next_buffer+0x24>
|
|
20000802: 2101 movs r1, #1
|
|
20000804: 0020 movs r0, r4
|
|
20000806: f7ff ff15 bl 20000634 <prepare_ep_buffer>
|
|
2000080a: 4305 orrs r5, r0
|
|
2000080c: 4a04 ldr r2, [pc, #16] @ (20000820 <hw_endpoint_start_next_buffer+0x78>)
|
|
2000080e: 4032 ands r2, r6
|
|
20000810: 23a0 movs r3, #160 @ 0xa0
|
|
20000812: 05db lsls r3, r3, #23
|
|
20000814: 4313 orrs r3, r2
|
|
20000816: e7e3 b.n 200007e0 <hw_endpoint_start_next_buffer+0x38>
|
|
20000818: 50110000 .word 0x50110000
|
|
2000081c: afffffff .word 0xafffffff
|
|
20000820: dfffffff .word 0xdfffffff
|
|
|
|
20000824 <hw_endpoint_xfer_continue>:
|
|
20000824: b570 push {r4, r5, r6, lr}
|
|
20000826: 0004 movs r4, r0
|
|
20000828: 7e85 ldrb r5, [r0, #26]
|
|
2000082a: 2d00 cmp r5, #0
|
|
2000082c: d006 beq.n 2000083c <hw_endpoint_xfer_continue+0x18>
|
|
2000082e: f7ff ff75 bl 2000071c <_hw_endpoint_xfer_sync>
|
|
20000832: 8aa3 ldrh r3, [r4, #20]
|
|
20000834: 2b00 cmp r3, #0
|
|
20000836: d10b bne.n 20000850 <hw_endpoint_xfer_continue+0x2c>
|
|
20000838: 0028 movs r0, r5
|
|
2000083a: bd70 pop {r4, r5, r6, pc}
|
|
2000083c: 7883 ldrb r3, [r0, #2]
|
|
2000083e: 217f movs r1, #127 @ 0x7f
|
|
20000840: 4019 ands r1, r3
|
|
20000842: 09db lsrs r3, r3, #7
|
|
20000844: 4a09 ldr r2, [pc, #36] @ (2000086c <hw_endpoint_xfer_continue+0x48>)
|
|
20000846: 009b lsls r3, r3, #2
|
|
20000848: 4809 ldr r0, [pc, #36] @ (20000870 <hw_endpoint_xfer_continue+0x4c>)
|
|
2000084a: 589a ldr r2, [r3, r2]
|
|
2000084c: f000 f92c bl 20000aa8 <__panic_veneer>
|
|
20000850: 0020 movs r0, r4
|
|
20000852: f7ff fed7 bl 20000604 <e15_is_critical_frame_period>
|
|
20000856: 1e05 subs r5, r0, #0
|
|
20000858: d003 beq.n 20000862 <hw_endpoint_xfer_continue+0x3e>
|
|
2000085a: 2301 movs r3, #1
|
|
2000085c: 7723 strb r3, [r4, #28]
|
|
2000085e: 2500 movs r5, #0
|
|
20000860: e7ea b.n 20000838 <hw_endpoint_xfer_continue+0x14>
|
|
20000862: 0020 movs r0, r4
|
|
20000864: f7ff ffa0 bl 200007a8 <hw_endpoint_start_next_buffer>
|
|
20000868: e7e6 b.n 20000838 <hw_endpoint_xfer_continue+0x14>
|
|
2000086a: 46c0 nop @ (mov r8, r8)
|
|
2000086c: 20000b98 .word 0x20000b98
|
|
20000870: 1000a720 .word 0x1000a720
|
|
|
|
20000874 <dcd_event_handler>:
|
|
20000874: b570 push {r4, r5, r6, lr}
|
|
20000876: b084 sub sp, #16
|
|
20000878: 0005 movs r5, r0
|
|
2000087a: 7843 ldrb r3, [r0, #1]
|
|
2000087c: 2b04 cmp r3, #4
|
|
2000087e: d048 beq.n 20000912 <dcd_event_handler+0x9e>
|
|
20000880: d806 bhi.n 20000890 <dcd_event_handler+0x1c>
|
|
20000882: 2b02 cmp r3, #2
|
|
20000884: d023 beq.n 200008ce <dcd_event_handler+0x5a>
|
|
20000886: 2b03 cmp r3, #3
|
|
20000888: d000 beq.n 2000088c <dcd_event_handler+0x18>
|
|
2000088a: e0a9 b.n 200009e0 <dcd_event_handler+0x16c>
|
|
2000088c: 2400 movs r4, #0
|
|
2000088e: e066 b.n 2000095e <dcd_event_handler+0xea>
|
|
20000890: 2b05 cmp r3, #5
|
|
20000892: d000 beq.n 20000896 <dcd_event_handler+0x22>
|
|
20000894: e0a4 b.n 200009e0 <dcd_event_handler+0x16c>
|
|
20000896: 4b5c ldr r3, [pc, #368] @ (20000a08 <dcd_event_handler+0x194>)
|
|
20000898: 781b ldrb r3, [r3, #0]
|
|
2000089a: 07db lsls r3, r3, #31
|
|
2000089c: d537 bpl.n 2000090e <dcd_event_handler+0x9a>
|
|
2000089e: 4a5a ldr r2, [pc, #360] @ (20000a08 <dcd_event_handler+0x194>)
|
|
200008a0: 7813 ldrb r3, [r2, #0]
|
|
200008a2: 2104 movs r1, #4
|
|
200008a4: 438b bics r3, r1
|
|
200008a6: 7013 strb r3, [r2, #0]
|
|
200008a8: 4b58 ldr r3, [pc, #352] @ (20000a0c <dcd_event_handler+0x198>)
|
|
200008aa: 681c ldr r4, [r3, #0]
|
|
200008ac: 0020 movs r0, r4
|
|
200008ae: 3014 adds r0, #20
|
|
200008b0: f000 f8d2 bl 20000a58 <__critical_section_enter_blocking_veneer>
|
|
200008b4: 0029 movs r1, r5
|
|
200008b6: 0020 movs r0, r4
|
|
200008b8: f000 f8be bl 20000a38 <__tu_fifo_write_veneer>
|
|
200008bc: 6962 ldr r2, [r4, #20]
|
|
200008be: 69a3 ldr r3, [r4, #24]
|
|
200008c0: f3bf 8f5f dmb sy
|
|
200008c4: 2100 movs r1, #0
|
|
200008c6: 6011 str r1, [r2, #0]
|
|
200008c8: f383 8810 msr PRIMASK, r3
|
|
200008cc: e01f b.n 2000090e <dcd_event_handler+0x9a>
|
|
200008ce: 4b4e ldr r3, [pc, #312] @ (20000a08 <dcd_event_handler+0x194>)
|
|
200008d0: 781a ldrb r2, [r3, #0]
|
|
200008d2: 2101 movs r1, #1
|
|
200008d4: 438a bics r2, r1
|
|
200008d6: 701a strb r2, [r3, #0]
|
|
200008d8: 781a ldrb r2, [r3, #0]
|
|
200008da: 3101 adds r1, #1
|
|
200008dc: 438a bics r2, r1
|
|
200008de: 701a strb r2, [r3, #0]
|
|
200008e0: 2600 movs r6, #0
|
|
200008e2: 705e strb r6, [r3, #1]
|
|
200008e4: 781a ldrb r2, [r3, #0]
|
|
200008e6: 3102 adds r1, #2
|
|
200008e8: 438a bics r2, r1
|
|
200008ea: 701a strb r2, [r3, #0]
|
|
200008ec: 4b47 ldr r3, [pc, #284] @ (20000a0c <dcd_event_handler+0x198>)
|
|
200008ee: 681c ldr r4, [r3, #0]
|
|
200008f0: 0020 movs r0, r4
|
|
200008f2: 3014 adds r0, #20
|
|
200008f4: f000 f8b0 bl 20000a58 <__critical_section_enter_blocking_veneer>
|
|
200008f8: 0029 movs r1, r5
|
|
200008fa: 0020 movs r0, r4
|
|
200008fc: f000 f89c bl 20000a38 <__tu_fifo_write_veneer>
|
|
20000900: 6962 ldr r2, [r4, #20]
|
|
20000902: 69a3 ldr r3, [r4, #24]
|
|
20000904: f3bf 8f5f dmb sy
|
|
20000908: 6016 str r6, [r2, #0]
|
|
2000090a: f383 8810 msr PRIMASK, r3
|
|
2000090e: b004 add sp, #16
|
|
20000910: bd70 pop {r4, r5, r6, pc}
|
|
20000912: 4b3d ldr r3, [pc, #244] @ (20000a08 <dcd_event_handler+0x194>)
|
|
20000914: 781b ldrb r3, [r3, #0]
|
|
20000916: 07db lsls r3, r3, #31
|
|
20000918: d5f9 bpl.n 2000090e <dcd_event_handler+0x9a>
|
|
2000091a: 4a3b ldr r2, [pc, #236] @ (20000a08 <dcd_event_handler+0x194>)
|
|
2000091c: 7813 ldrb r3, [r2, #0]
|
|
2000091e: 2104 movs r1, #4
|
|
20000920: 430b orrs r3, r1
|
|
20000922: 7013 strb r3, [r2, #0]
|
|
20000924: 4b39 ldr r3, [pc, #228] @ (20000a0c <dcd_event_handler+0x198>)
|
|
20000926: 681c ldr r4, [r3, #0]
|
|
20000928: 0020 movs r0, r4
|
|
2000092a: 3014 adds r0, #20
|
|
2000092c: f000 f894 bl 20000a58 <__critical_section_enter_blocking_veneer>
|
|
20000930: 0029 movs r1, r5
|
|
20000932: 0020 movs r0, r4
|
|
20000934: f000 f880 bl 20000a38 <__tu_fifo_write_veneer>
|
|
20000938: 6962 ldr r2, [r4, #20]
|
|
2000093a: 69a3 ldr r3, [r4, #24]
|
|
2000093c: f3bf 8f5f dmb sy
|
|
20000940: 2100 movs r1, #0
|
|
20000942: 6011 str r1, [r2, #0]
|
|
20000944: f383 8810 msr PRIMASK, r3
|
|
20000948: e7e1 b.n 2000090e <dcd_event_handler+0x9a>
|
|
2000094a: 0062 lsls r2, r4, #1
|
|
2000094c: 1912 adds r2, r2, r4
|
|
2000094e: 00d2 lsls r2, r2, #3
|
|
20000950: 4b2f ldr r3, [pc, #188] @ (20000a10 <dcd_event_handler+0x19c>)
|
|
20000952: 681b ldr r3, [r3, #0]
|
|
20000954: 189b adds r3, r3, r2
|
|
20000956: 2b00 cmp r3, #0
|
|
20000958: d113 bne.n 20000982 <dcd_event_handler+0x10e>
|
|
2000095a: 3401 adds r4, #1
|
|
2000095c: b2e4 uxtb r4, r4
|
|
2000095e: 4b2d ldr r3, [pc, #180] @ (20000a14 <dcd_event_handler+0x1a0>)
|
|
20000960: 781b ldrb r3, [r3, #0]
|
|
20000962: 42a3 cmp r3, r4
|
|
20000964: d316 bcc.n 20000994 <dcd_event_handler+0x120>
|
|
20000966: 4a2c ldr r2, [pc, #176] @ (20000a18 <dcd_event_handler+0x1a4>)
|
|
20000968: 2a00 cmp r2, #0
|
|
2000096a: d011 beq.n 20000990 <dcd_event_handler+0x11c>
|
|
2000096c: 42a3 cmp r3, r4
|
|
2000096e: d8ec bhi.n 2000094a <dcd_event_handler+0xd6>
|
|
20000970: 1ae3 subs r3, r4, r3
|
|
20000972: b2db uxtb r3, r3
|
|
20000974: 2b00 cmp r3, #0
|
|
20000976: d1f0 bne.n 2000095a <dcd_event_handler+0xe6>
|
|
20000978: 005a lsls r2, r3, #1
|
|
2000097a: 18d3 adds r3, r2, r3
|
|
2000097c: 00db lsls r3, r3, #3
|
|
2000097e: 4a27 ldr r2, [pc, #156] @ (20000a1c <dcd_event_handler+0x1a8>)
|
|
20000980: 189b adds r3, r3, r2
|
|
20000982: 695b ldr r3, [r3, #20]
|
|
20000984: 2b00 cmp r3, #0
|
|
20000986: d0e8 beq.n 2000095a <dcd_event_handler+0xe6>
|
|
20000988: 7828 ldrb r0, [r5, #0]
|
|
2000098a: 6869 ldr r1, [r5, #4]
|
|
2000098c: 4798 blx r3
|
|
2000098e: e7e4 b.n 2000095a <dcd_event_handler+0xe6>
|
|
20000990: 0023 movs r3, r4
|
|
20000992: e7ef b.n 20000974 <dcd_event_handler+0x100>
|
|
20000994: 4b1c ldr r3, [pc, #112] @ (20000a08 <dcd_event_handler+0x194>)
|
|
20000996: 781b ldrb r3, [r3, #0]
|
|
20000998: 075b lsls r3, r3, #29
|
|
2000099a: d5b8 bpl.n 2000090e <dcd_event_handler+0x9a>
|
|
2000099c: 4a1a ldr r2, [pc, #104] @ (20000a08 <dcd_event_handler+0x194>)
|
|
2000099e: 7813 ldrb r3, [r2, #0]
|
|
200009a0: 2104 movs r1, #4
|
|
200009a2: 438b bics r3, r1
|
|
200009a4: 7013 strb r3, [r2, #0]
|
|
200009a6: 220c movs r2, #12
|
|
200009a8: 2100 movs r1, #0
|
|
200009aa: a801 add r0, sp, #4
|
|
200009ac: f000 f884 bl 20000ab8 <____wrap_memset_veneer>
|
|
200009b0: 782b ldrb r3, [r5, #0]
|
|
200009b2: 466a mov r2, sp
|
|
200009b4: 7113 strb r3, [r2, #4]
|
|
200009b6: 2305 movs r3, #5
|
|
200009b8: 7153 strb r3, [r2, #5]
|
|
200009ba: 4b14 ldr r3, [pc, #80] @ (20000a0c <dcd_event_handler+0x198>)
|
|
200009bc: 681c ldr r4, [r3, #0]
|
|
200009be: 0020 movs r0, r4
|
|
200009c0: 3014 adds r0, #20
|
|
200009c2: f000 f849 bl 20000a58 <__critical_section_enter_blocking_veneer>
|
|
200009c6: a901 add r1, sp, #4
|
|
200009c8: 0020 movs r0, r4
|
|
200009ca: f000 f835 bl 20000a38 <__tu_fifo_write_veneer>
|
|
200009ce: 6962 ldr r2, [r4, #20]
|
|
200009d0: 69a3 ldr r3, [r4, #24]
|
|
200009d2: f3bf 8f5f dmb sy
|
|
200009d6: 2100 movs r1, #0
|
|
200009d8: 6011 str r1, [r2, #0]
|
|
200009da: f383 8810 msr PRIMASK, r3
|
|
200009de: e796 b.n 2000090e <dcd_event_handler+0x9a>
|
|
200009e0: 4b0a ldr r3, [pc, #40] @ (20000a0c <dcd_event_handler+0x198>)
|
|
200009e2: 681c ldr r4, [r3, #0]
|
|
200009e4: 0020 movs r0, r4
|
|
200009e6: 3014 adds r0, #20
|
|
200009e8: f000 f836 bl 20000a58 <__critical_section_enter_blocking_veneer>
|
|
200009ec: 0029 movs r1, r5
|
|
200009ee: 0020 movs r0, r4
|
|
200009f0: f000 f822 bl 20000a38 <__tu_fifo_write_veneer>
|
|
200009f4: 6962 ldr r2, [r4, #20]
|
|
200009f6: 69a3 ldr r3, [r4, #24]
|
|
200009f8: f3bf 8f5f dmb sy
|
|
200009fc: 2100 movs r1, #0
|
|
200009fe: 6011 str r1, [r2, #0]
|
|
20000a00: f383 8810 msr PRIMASK, r3
|
|
20000a04: e783 b.n 2000090e <dcd_event_handler+0x9a>
|
|
20000a06: 46c0 nop @ (mov r8, r8)
|
|
20000a08: 20001020 .word 0x20001020
|
|
20000a0c: 20001078 .word 0x20001078
|
|
20000a10: 20000cf8 .word 0x20000cf8
|
|
20000a14: 20021d3c .word 0x20021d3c
|
|
20000a18: 10004511 .word 0x10004511
|
|
20000a1c: 1000a7f0 .word 0x1000a7f0
|
|
|
|
20000a20 <__aeabi_idiv0>:
|
|
20000a20: 4770 bx lr
|
|
20000a22: 46c0 nop @ (mov r8, r8)
|
|
20000a24: 0000 movs r0, r0
|
|
...
|
|
|
|
20000a28 <__hw_endpoint_get_by_addr_veneer>:
|
|
20000a28: b401 push {r0}
|
|
20000a2a: 4802 ldr r0, [pc, #8] @ (20000a34 <__hw_endpoint_get_by_addr_veneer+0xc>)
|
|
20000a2c: 4684 mov ip, r0
|
|
20000a2e: bc01 pop {r0}
|
|
20000a30: 4760 bx ip
|
|
20000a32: bf00 nop
|
|
20000a34: 10004a69 .word 0x10004a69
|
|
|
|
20000a38 <__tu_fifo_write_veneer>:
|
|
20000a38: b401 push {r0}
|
|
20000a3a: 4802 ldr r0, [pc, #8] @ (20000a44 <__tu_fifo_write_veneer+0xc>)
|
|
20000a3c: 4684 mov ip, r0
|
|
20000a3e: bc01 pop {r0}
|
|
20000a40: 4760 bx ip
|
|
20000a42: bf00 nop
|
|
20000a44: 100068cf .word 0x100068cf
|
|
|
|
20000a48 <__make_timeout_time_ms_veneer>:
|
|
20000a48: b401 push {r0}
|
|
20000a4a: 4802 ldr r0, [pc, #8] @ (20000a54 <__make_timeout_time_ms_veneer+0xc>)
|
|
20000a4c: 4684 mov ip, r0
|
|
20000a4e: bc01 pop {r0}
|
|
20000a50: 4760 bx ip
|
|
20000a52: bf00 nop
|
|
20000a54: 1000120f .word 0x1000120f
|
|
|
|
20000a58 <__critical_section_enter_blocking_veneer>:
|
|
20000a58: b401 push {r0}
|
|
20000a5a: 4802 ldr r0, [pc, #8] @ (20000a64 <__critical_section_enter_blocking_veneer+0xc>)
|
|
20000a5c: 4684 mov ip, r0
|
|
20000a5e: bc01 pop {r0}
|
|
20000a60: 4760 bx ip
|
|
20000a62: bf00 nop
|
|
20000a64: 10004ea5 .word 0x10004ea5
|
|
|
|
20000a68 <__xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout_veneer>:
|
|
20000a68: b401 push {r0}
|
|
20000a6a: 4802 ldr r0, [pc, #8] @ (20000a74 <__xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout_veneer+0xc>)
|
|
20000a6c: 4684 mov ip, r0
|
|
20000a6e: bc01 pop {r0}
|
|
20000a70: 4760 bx ip
|
|
20000a72: bf00 nop
|
|
20000a74: 1000709d .word 0x1000709d
|
|
|
|
20000a78 <__ulPortLockGetCurrentOwnerId_veneer>:
|
|
20000a78: b401 push {r0}
|
|
20000a7a: 4802 ldr r0, [pc, #8] @ (20000a84 <__ulPortLockGetCurrentOwnerId_veneer+0xc>)
|
|
20000a7c: 4684 mov ip, r0
|
|
20000a7e: bc01 pop {r0}
|
|
20000a80: 4760 bx ip
|
|
20000a82: bf00 nop
|
|
20000a84: 10006f25 .word 0x10006f25
|
|
|
|
20000a88 <__vPortLockInternalSpinUnlockWithNotify_veneer>:
|
|
20000a88: b401 push {r0}
|
|
20000a8a: 4802 ldr r0, [pc, #8] @ (20000a94 <__vPortLockInternalSpinUnlockWithNotify_veneer+0xc>)
|
|
20000a8c: 4684 mov ip, r0
|
|
20000a8e: bc01 pop {r0}
|
|
20000a90: 4760 bx ip
|
|
20000a92: bf00 nop
|
|
20000a94: 10007015 .word 0x10007015
|
|
|
|
20000a98 <____assert_func_veneer>:
|
|
20000a98: b401 push {r0}
|
|
20000a9a: 4802 ldr r0, [pc, #8] @ (20000aa4 <____assert_func_veneer+0xc>)
|
|
20000a9c: 4684 mov ip, r0
|
|
20000a9e: bc01 pop {r0}
|
|
20000aa0: 4760 bx ip
|
|
20000aa2: bf00 nop
|
|
20000aa4: 10002485 .word 0x10002485
|
|
|
|
20000aa8 <__panic_veneer>:
|
|
20000aa8: b401 push {r0}
|
|
20000aaa: 4802 ldr r0, [pc, #8] @ (20000ab4 <__panic_veneer+0xc>)
|
|
20000aac: 4684 mov ip, r0
|
|
20000aae: bc01 pop {r0}
|
|
20000ab0: 4760 bx ip
|
|
20000ab2: bf00 nop
|
|
20000ab4: 100025b5 .word 0x100025b5
|
|
|
|
20000ab8 <____wrap_memset_veneer>:
|
|
20000ab8: b401 push {r0}
|
|
20000aba: 4802 ldr r0, [pc, #8] @ (20000ac4 <____wrap_memset_veneer+0xc>)
|
|
20000abc: 4684 mov ip, r0
|
|
20000abe: bc01 pop {r0}
|
|
20000ac0: 4760 bx ip
|
|
20000ac2: bf00 nop
|
|
20000ac4: 10004111 .word 0x10004111
|
|
|
|
20000ac8 <__dcd_event_sof_veneer>:
|
|
20000ac8: b401 push {r0}
|
|
20000aca: 4802 ldr r0, [pc, #8] @ (20000ad4 <__dcd_event_sof_veneer+0xc>)
|
|
20000acc: 4684 mov ip, r0
|
|
20000ace: bc01 pop {r0}
|
|
20000ad0: 4760 bx ip
|
|
20000ad2: bf00 nop
|
|
20000ad4: 10004b79 .word 0x10004b79
|
|
|
|
20000ad8 <____wrap_memcpy_veneer>:
|
|
20000ad8: b401 push {r0}
|
|
20000ada: 4802 ldr r0, [pc, #8] @ (20000ae4 <____wrap_memcpy_veneer+0xc>)
|
|
20000adc: 4684 mov ip, r0
|
|
20000ade: bc01 pop {r0}
|
|
20000ae0: 4760 bx ip
|
|
20000ae2: bf00 nop
|
|
20000ae4: 1000411d .word 0x1000411d
|
|
|
|
20000ae8 <striped_spin_lock_num>:
|
|
20000ae8: 00000010 ....
|
|
|
|
20000aec <irq_handler_chain_slots>:
|
|
20000aec: 00000000 .word 0x00000000
|
|
20000af0: 00010000 .word 0x00010000
|
|
...
|
|
20000afc: 00020000 .word 0x00020000
|
|
...
|
|
20000b08: 00030000 .word 0x00030000
|
|
...
|
|
20000b14: 00ff0000 .word 0x00ff0000
|
|
20000b18: 00000000 .word 0x00000000
|
|
|
|
20000b1c <irq_handler_chain_first_slot>:
|
|
20000b1c: b501 push {r0, lr}
|
|
20000b1e: 6848 ldr r0, [r1, #4]
|
|
20000b20: 3101 adds r1, #1
|
|
20000b22: 468e mov lr, r1
|
|
20000b24: 4700 bx r0
|
|
|
|
20000b26 <irq_handler_chain_remove_tail>:
|
|
20000b26: 4670 mov r0, lr
|
|
20000b28: 3809 subs r0, #9
|
|
20000b2a: 4901 ldr r1, [pc, #4] @ (20000b30 <irq_handler_chain_remove_tail+0xa>)
|
|
20000b2c: 4788 blx r1
|
|
20000b2e: bd01 pop {r0, pc}
|
|
20000b30: 1000103d .word 0x1000103d
|
|
|
|
20000b34 <default_alarm_pool>:
|
|
20000b34: 20000b4c 00000000 20000bf0 20001280 L.. ....... ...
|
|
...
|
|
|
|
20000b4c <default_alarm_pool_heap>:
|
|
20000b4c: 20001290 00000000 00000000 00000010 ... ............
|
|
20000b5c: 00000000 ....
|
|
|
|
20000b60 <aeabi_bits_funcs>:
|
|
20000b60: 00003350 .word 0x00003350
|
|
20000b64: 0000334c .word 0x0000334c
|
|
20000b68: 00003354 .word 0x00003354
|
|
20000b6c: 00003352 .word 0x00003352
|
|
|
|
20000b70 <aeabi_bits_funcs_end>:
|
|
20000b70: 0000534d .word 0x0000534d
|
|
20000b74: 0000434d .word 0x0000434d
|
|
20000b78: 00003453 .word 0x00003453
|
|
20000b7c: 00003443 .word 0x00003443
|
|
|
|
20000b80 <stdio_usb>:
|
|
20000b80: 10004915 00000000 1000488d 10004545 .I.......H..EE..
|
|
20000b90: 00000000 00000100 ........
|
|
|
|
20000b98 <ep_dir_string>:
|
|
20000b98: 1000a74c 1000a750 L...P...
|
|
|
|
20000ba0 <_usbd_qdef>:
|
|
20000ba0: 2000107c 000c0010 00000000 00000000 |.. ............
|
|
...
|
|
|
|
20000bbc <_usbd_rhport>:
|
|
20000bbc: .
|
|
|
|
20000bbd <ucLaunchCoreNum>:
|
|
20000bbd: ...
|
|
|
|
20000bc0 <uxTopUsedPriority>:
|
|
20000bc0: 0000001f ....
|
|
|
|
20000bc4 <malloc_mutex>:
|
|
...
|
|
|
|
20000bcc <print_mutex>:
|
|
...
|
|
|
|
20000bd4 <__mutex_array_end>:
|
|
20000bd4: 10004101 .word 0x10004101
|
|
20000bd8: 1000379d .word 0x1000379d
|
|
20000bdc: 10003e29 .word 0x10003e29
|
|
20000be0: 10004079 .word 0x10004079
|
|
|
|
20000be4 <__frame_dummy_init_array_entry>:
|
|
20000be4: 100002e5 10000609 100071b1 .........q..
|